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drivers
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clk
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meson
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meson8b.c
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Author
2019-04-01
clk: meson: meson8b: add the video decoder clock trees
Martin Blumenstingl
2019-04-01
clk: meson: meson8b: add the VPU clock trees
Martin Blumenstingl
2019-04-01
clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2
Martin Blumenstingl
2019-04-01
clk: meson: meson8b: use a separate clock table for Meson8m2
Martin Blumenstingl
2019-02-13
clk: meson: meson8b: fix the naming of the APB clocks
Martin Blumenstingl
2019-02-02
clk: meson: rework and clean drivers dependencies
Jerome Brunet
2019-01-07
clk: meson: meson8b: add the GPU clock tree
Martin Blumenstingl
2019-01-07
clk: meson: meson8b: use a separate clock table for Meson8
Martin Blumenstingl
2018-12-03
clk: meson: meson8b: add the read-only video clock trees
Martin Blumenstingl
2018-12-03
clk: meson: meson8b: add the fractional divider for vid_pll_dco
Martin Blumenstingl
2018-12-03
clk: meson: meson8b: fix the offset of vid_pll_dco's N value
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: add the CPU clock post divider clocks
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: allow changing the CPU clock tree
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: run from the XTAL when changing the CPU frequency
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: add support for more M/N values in sys_pll
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: fix the width of the cpu_scale_div clock
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table
Martin Blumenstingl
2018-11-23
clk: meson: meson8b: use the HHI syscon if available
Martin Blumenstingl
2018-09-26
clk: meson: meson8b: use the regmap in the internal reset controller
Martin Blumenstingl
2018-09-26
clk: meson: meson8b: register the clock controller early
Martin Blumenstingl
2018-09-26
clk: meson: clk-pll: drop hard-coded rates from pll tables
Jerome Brunet
2018-09-26
clk: meson: clk-pll: remove od parameters
Jerome Brunet
2018-09-26
clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary
Jerome Brunet
2018-09-26
clk: meson: clk-pll: add enable bit
Jerome Brunet
2018-06-09
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2018-05-21
clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL
Martin Blumenstingl
2018-05-18
clk: meson: use SPDX license identifiers consistently
Jerome Brunet
2018-05-15
clk: meson: meson8b: add support for the NAND clocks
Martin Blumenstingl
2018-04-25
clk: meson: meson8b: fix meson8b_cpu_clk parent clock name
Martin Blumenstingl
2018-04-25
clk: meson: meson8b: fix meson8b_fclk_div3_div clock name
Martin Blumenstingl
2018-03-14
clk: meson: Drop unused local variable and add static
Stephen Boyd
2018-03-13
clk: meson: clean-up clk81 clocks
Jerome Brunet
2018-03-13
clk: meson: add fdiv clock gates
Jerome Brunet
2018-03-13
clk: meson: add mpll pre-divider
Jerome Brunet
2018-03-13
clk: meson: add fractional part of meson8b fixed_pll
Jerome Brunet
2018-03-13
clk: meson: rework meson8b cpu clock
Jerome Brunet
2018-03-13
clk: meson: split divider and gate part of mpll
Jerome Brunet
2018-03-13
clk: meson: migrate plls clocks to clk_regmap
Jerome Brunet
2018-03-13
clk: meson: migrate mplls clocks to clk_regmap
Jerome Brunet
2018-03-13
clk: meson: migrate muxes to clk_regmap
Jerome Brunet
2018-03-13
clk: meson: migrate dividers to clk_regmap
Jerome Brunet
2018-03-13
clk: meson: migrate gates to clk_regmap
Jerome Brunet
2018-03-13
clk: meson: add regmap to the clock controllers
Jerome Brunet
2018-03-13
clk: meson: remove obsolete comments
Jerome Brunet
2018-03-13
clk: meson: only one loop index is necessary in probe
Jerome Brunet
2018-03-13
clk: meson: use devm_of_clk_add_hw_provider
Jerome Brunet
2017-12-14
clk: meson: make the spinlock naming more specific
Yixun Lan
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