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path: root/drivers/clk/pistachio
AgeCommit message (Expand)Author
2022-09-28clk: pistachio: Fix initconst confusionAndi Kleen
2022-02-25clk: pistachio: Declare mux table as const u32[]Jonathan Neuschäfer
2021-08-12clk: pistachio: Make it selectable for generic MIPS kernelJiaxun Yang
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422Thomas Gleixner
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner
2018-11-06clk: pistachio: constify clk_ops structuresJulia Lawall
2015-08-26clk: pistachio: correct critical clock listDamien.Horsley
2015-08-26clk: pistachio: Fix PLL rate calculation in integer modeZdenko Pulitika
2015-08-26clk: pistachio: Fix override of clk-pll settings from boot loaderZdenko Pulitika
2015-08-26clk: pistachio: Fix 32bit integer overflowsZdenko Pulitika
2015-08-24clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd
2015-07-20clk: pistachio: Include clk.hStephen Boyd
2015-06-04clk: pistachio: Add sanity checks on PLL configurationKevin Cernekee
2015-06-04clk: pistachio: Lock the PLL when enabled upon rate changeEzequiel Garcia
2015-06-04clk: pistachio: Add a pll_lock() helper for clarityEzequiel Garcia
2015-03-31CLK: Pistachio: Register external clock gatesAndrew Bresticker
2015-03-31CLK: Pistachio: Register system interface gate clocksAndrew Bresticker
2015-03-31CLK: Pistachio: Register peripheral clocksAndrew Bresticker
2015-03-31CLK: Pistachio: Register core clocksAndrew Bresticker
2015-03-31CLK: Pistachio: Add PLL driverAndrew Bresticker
2015-03-31CLK: Add basic infrastructure for Pistachio clocksAndrew Bresticker