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path: root/drivers/clk/qcom/clk-pll.c
AgeCommit message (Expand)Author
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner
2016-11-01clk: qcom: Enable FSM mode for votable alpha PLLsRajendra Nayak
2015-08-24clk: qcom: Convert to clk_hw based provider APIsStephen Boyd
2015-07-28Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd
2015-07-27clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon
2015-07-07clk: qcom: Add support for SR2 PLLsGeorgi Djakov
2015-03-26clk: qcom: fix simple_return.cocci warningsFengguang Wu
2015-02-02clk: Add rate constraints to clocksTomeu Vizoso
2014-12-03clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso
2014-09-22clk: qcom: Add support for setting rates on PLLsStephen Boyd
2014-07-15clk: qcom: pll: Add support for configuring SR PLLsStephen Boyd
2014-01-16clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd