| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-06-18 | clk: renesas: r8a77995: Add CMM clocks | Jacopo Mondi |
| 2019-04-02 | clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC | Takeshi Kihara |
| 2018-12-04 | clk: renesas: r8a77995: Simplify PLL3 multiplier/divider | Geert Uytterhoeven |
| 2018-12-04 | clk: renesas: r8a77995: Add missing CPEX clock | Geert Uytterhoeven |
| 2018-12-04 | clk: renesas: r8a77995: Remove non-existent SSP clocks | Geert Uytterhoeven |
| 2018-12-04 | clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks | Geert Uytterhoeven |
| 2018-12-04 | clk: renesas: r8a77995: Correct parent clock of DU | Geert Uytterhoeven |
| 2018-10-18 | Merge branch 'clk-renesas' into clk-next | Stephen Boyd |
| 2018-08-30 | clk: renesas: use SPDX identifier for Renesas drivers | Wolfram Sang |
| 2018-08-27 | clk: renesas: r8a77995: Correct RCLK handling | Geert Uytterhoeven |
| 2017-10-16 | clk: renesas: r8a77995: Correct parent clock of INTC-AP | Geert Uytterhoeven |
| 2017-08-16 | clk: renesas: cpg-mssr: Add R8A77995 support | Geert Uytterhoeven |
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