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clk
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renesas
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Author
2023-11-20
clk: renesas: rzg2l: Fix computation formula
Claudiu Beznea
2023-11-20
clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
Claudiu Beznea
2023-11-20
clk: renesas: rzg2l: Trust value returned by hardware
Claudiu Beznea
2023-11-20
clk: renesas: rzg2l: Lock around writes to mux register
Claudiu Beznea
2023-11-20
clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
Claudiu Beznea
2023-11-20
clk: renesas: rcar-gen3: Extend SDnH divider table
Dirk Behme
2023-07-19
clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write
Biju Das
2023-03-17
clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
Wolfram Sang
2022-12-31
clk: renesas: r8a779f0: Fix SCIF parent clocks
Wolfram Sang
2022-12-31
clk: renesas: r8a779f0: Fix HSCIF parent clocks
Wolfram Sang
2022-12-31
clk: renesas: r9a06g032: Repair grave increment error
Marek Vasut
2022-12-31
clk: renesas: r8a779a0: Fix SD0H clock name
Wolfram Sang
2022-12-31
clk: renesas: r8a779f0: Fix SD0H clock name
Geert Uytterhoeven
2022-10-26
clk: renesas: r8a779g0: Fix HSCIF parent clocks
Geert Uytterhoeven
2022-10-18
clk: renesas: r8a779g0: Add SASYNCPER clocks
Geert Uytterhoeven
2022-09-18
clk: renesas: r8a779g0: Add EtherAVB clocks
Geert Uytterhoeven
2022-09-18
clk: renesas: r8a779g0: Add PFC/GPIO clocks
Geert Uytterhoeven
2022-09-18
clk: renesas: r8a779g0: Add I2C clocks
Geert Uytterhoeven
2022-09-18
clk: renesas: r8a779g0: Add watchdog clock
Geert Uytterhoeven
2022-08-29
clk: renesas: r8a779f0: Add MSIOF clocks
Wolfram Sang
2022-08-29
clk: renesas: r9a09g011: Add IIC clock and reset entries
Phil Edworthy
2022-08-22
clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
Biju Das
2022-08-22
clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
Wolfram Sang
2022-08-15
clk: renesas: r8a779f0: Add CMT clocks
Wolfram Sang
2022-08-15
clk: renesas: r8a779f0: Add SDH0 clock
Wolfram Sang
2022-07-05
clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
Andi Kleen
2022-07-05
clk: renesas: r9a07g043: Add support for RZ/Five SoC
Lad Prabhakar
2022-06-17
clk: renesas: r8a779f0: Add HSCIF clocks
Wolfram Sang
2022-06-17
clk: renesas: r8a779f0: Add PCIe clocks
Yoshihiro Shimoda
2022-06-17
clk: renesas: r8a779f0: Add Z0 and Z1 clock support
Geert Uytterhoeven
2022-06-13
clk: renesas: rza1: Remove struct rz_cpg
Geert Uytterhoeven
2022-06-13
clk: renesas: r8a7779: Remove struct r8a7779_cpg
Geert Uytterhoeven
2022-06-13
clk: renesas: r8a7778: Remove struct r8a7778_cpg
Geert Uytterhoeven
2022-06-13
clk: renesas: sh73a0: Remove sh73a0_cpg.reg
Geert Uytterhoeven
2022-06-13
clk: renesas: r8a7740: Remove r8a7740_cpg.reg
Geert Uytterhoeven
2022-06-13
clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
Geert Uytterhoeven
2022-06-13
clk: renesas: r8a779f0: Add SDHI0 clock
Wolfram Sang
2022-06-13
clk: renesas: r8a779f0: Add thermal clock
Wolfram Sang
2022-06-07
clk: renesas: rzg2l: Fix reset status function
Biju Das
2022-06-06
clk: renesas: r9a06g032: Fix UART clkgrp bitsel
Ralph Siemsen
2022-06-06
clk: renesas: r9a06g032: Drop some unused fields
Ralph Siemsen
2022-06-06
clk: renesas: r9a09g011: Add WDT clock and reset entries
Phil Edworthy
2022-06-06
clk: renesas: r9a09g011: Add PFC clock and reset entries
Phil Edworthy
2022-06-06
clk: renesas: r9a07g044: Add POEG clock and reset entries
Biju Das
2022-06-06
clk: renesas: r9a07g044: Add GPT clock and reset entry
Biju Das
2022-05-29
Merge tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
2022-05-19
clk: renesas: r9a06g032: Probe possible children
Miquel Raynal
2022-05-19
clk: renesas: r9a06g032: Export function to set dmamux
Miquel Raynal
2022-05-06
clk: renesas: r9a09g011: Add eth clock and reset entries
Phil Edworthy
2022-05-06
clk: renesas: Add RZ/V2M support using the rzg2l driver
Phil Edworthy
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