aboutsummaryrefslogtreecommitdiff
path: root/drivers/clk/renesas
AgeCommit message (Expand)Author
2021-10-15clk: renesas: r8a779[56]x: Add MLP clocksAndrey Gusakov
2021-10-08clk: renesas: r9a07g044: Add SDHI clock and reset entriesBiju Das
2021-10-08clk: renesas: rzg2l: Add SDHI clk mux supportBiju Das
2021-10-08clk: renesas: r8a779a0: Add RPC supportWolfram Sang
2021-10-08clk: renesas: cpg-lib: Move RPC clock registration to the libraryWolfram Sang
2021-10-08clk: renesas: r9a07g044: Add clock and reset entries for SPI Multi I/O Bus Co...Lad Prabhakar
2021-09-28clk: renesas: r8a779a0: Add Z0 and Z1 clock supportGeert Uytterhoeven
2021-09-24clk: renesas: r9a07g044: Add GbEthernet clock/resetBiju Das
2021-09-24clk: renesas: rzg2l: Add support to handle coupled clocksBiju Das
2021-09-24clk: renesas: r9a07g044: Add ethernet clock sourcesBiju Das
2021-09-24clk: renesas: rzg2l: Add support to handle MUX clocksBiju Das
2021-09-24clk: renesas: r8a779a0: Add TPU clockWolfram Sang
2021-09-24clk: renesas: rzg2l: Fix clk status functionBiju Das
2021-09-24clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK criticalBiju Das
2021-09-02Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-08-29Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2021-08-28clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereferenceAdam Ford
2021-08-13clk: renesas: Make CLK_R9A06G032 invisibleGeert Uytterhoeven
2021-07-26clk: renesas: r9a07g044: Add entry for fixed clock P0_DIV2Lad Prabhakar
2021-07-19clk: renesas: r9a07g044: Add clock and reset entries for ADCLad Prabhakar
2021-07-19clk: renesas: r9a07g044: Add clock and reset entries for CANFDLad Prabhakar
2021-07-19clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]Geert Uytterhoeven
2021-07-19clk: renesas: r9a07g044: Add GPIO clock and reset entriesLad Prabhakar
2021-07-19clk: renesas: r9a07g044: Add SSIF-2 clock and reset entriesBiju Das
2021-07-19clk: renesas: r9a07g044: Add USB clocks/resetsBiju Das
2021-07-19clk: renesas: r9a07g044: Add DMAC clocks/resetsBiju Das
2021-07-19clk: renesas: r9a07g044: Add I2C clocks/resetsBiju Das
2021-07-19clk: renesas: r8a779a0: Add the DSI clocksKieran Bingham
2021-07-19clk: renesas: r8a779a0: Add the DU clockKieran Bingham
2021-07-19clk: renesas: rzg2: Rename i2c-dvfs to iic-pmicGeert Uytterhoeven
2021-07-19clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()Lad Prabhakar
2021-07-19clk: renesas: rzg2l: Avoid mixing error pointers and NULLDan Carpenter
2021-07-19clk: renesas: rzg2l: Fix a double free on errorDan Carpenter
2021-07-19clk: renesas: rzg2l: Fix return value and unused assignmentYang Li
2021-07-19clk: renesas: rzg2l: Remove unneeded semicolonYang Li
2021-07-12dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitionsBiju Das
2021-07-12clk: renesas: r9a07g044: Add P2 Clock supportBiju Das
2021-07-12clk: renesas: r9a07g044: Fix P1 ClockBiju Das
2021-07-12clk: renesas: r9a07g044: Rename divider tableBiju Das
2021-07-12clk: renesas: rzg2l: Add multi clock PM supportBiju Das
2021-06-10clk: renesas: Add support for R9A07G044 SoCLad Prabhakar
2021-06-10clk: renesas: Add CPG core wrapper for RZ/G2L SoCLad Prabhakar
2021-05-27clk: renesas: r8a77995: Add ZA2 clockKuninori Morimoto
2021-05-27clk: renesas: cpg-mssr: Make srstclr[] comment block consistentGeert Uytterhoeven
2021-05-27clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitionsGeert Uytterhoeven
2021-05-11clk: renesas: r9a06g032: Switch to .determine_rate()Geert Uytterhoeven
2021-05-11clk: renesas: div6: Implement range checkingGeert Uytterhoeven
2021-05-11clk: renesas: div6: Consider all parents for requested rateGeert Uytterhoeven
2021-05-11clk: renesas: div6: Switch to .determine_rate()Geert Uytterhoeven
2021-05-11clk: renesas: div6: Simplify src mask handlingGeert Uytterhoeven