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path: root/drivers/clk/socfpga/clk.h
AgeCommit message (Expand)Author
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen
2015-08-24clk: socfpga: Add a second parent option for the dbg_base_clkDinh Nguyen
2015-07-28clk: socfpga: switch to GENMASK()Andy Shevchenko
2015-07-20clk: socfpga: Remove clk.h and clkdev.h includesStephen Boyd
2015-05-21clk: socfpga: add a clock driver for the Arria 10 platformDinh Nguyen
2015-05-21clk: socfpga: update clk.h so for Arria10 platform to useDinh Nguyen
2014-05-12clk: socfpga: add divider registers to the main pll outputsDinh Nguyen
2014-02-18clk: socfpga: split clk codeSteffen Trumtrar