aboutsummaryrefslogtreecommitdiff
path: root/drivers/clk/sunxi
AgeCommit message (Expand)Author
2015-07-02Merge tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/li...Linus Torvalds
2015-06-16drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driverPaul Gortmaker
2015-06-02clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCsHans de Goede
2015-05-05clk: sunxi: Fix of_io_request_and_map error checkMaxime Ripard
2015-03-25clk: sunxi: Add pll6 / 4 clock output to sun4i-a10-pll6Chen-Yu Tsai
2015-03-25clk: sunxi: Make divs clocks specify which output is the base factor clockChen-Yu Tsai
2015-03-21clk: sunxi: Register divs clocks before factor clocksChen-Yu Tsai
2015-03-21clk: sunxi: Add "cpu" to list of protected clocks for sun5iChen-Yu Tsai
2015-03-21clk: sunxi: Add muxable ahb factors clock for sun5i and sun7iChen-Yu Tsai
2015-02-23clk: sunxi: Add support for sun9i A80 USB clocks and resetsChen-Yu Tsai
2015-02-23clk: sunxi: Move USB clocks to separate fileChen-Yu Tsai
2015-02-21Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds
2015-02-02clk: Add rate constraints to clocksTomeu Vizoso
2015-01-25sunxi: clk: Set sun6i-pll1 n_start = 1Hans de Goede
2015-01-25clk: sunxi: rewrite sun9i_a80_get_pll4_factors()Hans de Goede
2015-01-20clk: sunxi: Add driver for A80 MMC config clocks/resetsChen-Yu Tsai
2015-01-19clk: sunxi: Add mod0 and mmc module clock support for A80Chen-Yu Tsai
2015-01-14clk: sunxi: Add a common setup function for mmc module clocksChen-Yu Tsai
2015-01-14clk: sunxi: Remove custom phase functionMaxime Ripard
2015-01-14clk: sunxi: Rework MMC phase clocksMaxime Ripard
2015-01-06clk: sunxi: Propagate rate changes to parent for mux clocksChen-Yu Tsai
2015-01-06clk: sunxi: Make the mod0 clk driver also a platform driverHans de Goede
2015-01-05ARM: sunxi: Add "allwinner,sun6i-a31s" to mach-sunxiHans de Goede
2014-12-21clk: sunxi: Fix factor clocks usage for sun9i core clocksChen-Yu Tsai
2014-12-21clk: sunxi: Give sunxi_factors_register a registers parameterHans de Goede
2014-12-21clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-dividerChen-Yu Tsai
2014-12-21clk: sunxi: Remove ahb1_sdram from sun6i/sun8i protected clocks listChen-Yu Tsai
2014-12-03clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso
2014-11-23clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT muxHans de Goede
2014-11-23clk: sunxi: Implement A31 PLL6 as a divs clock for 2x outputChen-Yu Tsai
2014-11-23clk: sunxi: Specify number of child clocks for divs clocksChen-Yu Tsai
2014-11-23clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driverChen-Yu Tsai
2014-11-11clk: sunxi: unify APB1 clockEmilio López
2014-10-21clk: sunxi: Add support for bus clock gates on Allwinner A80 SoCChen-Yu Tsai
2014-10-21clk: sunxi: Add support for A80 basic bus clocksChen-Yu Tsai
2014-10-21clk: sunxi: make factors clock mux mask configurableChen-Yu Tsai
2014-09-27Merge tag 'sunxi-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kerne...Mike Turquette
2014-09-27clk: sunxi: Add sun8i MBUS clock supportChen-Yu Tsai
2014-09-27clk: sunxi: mod0: Introduce MMC proper phase handlingMaxime Ripard
2014-09-27clk: sunxi: Move mbus to mod0 fileMaxime Ripard
2014-09-27clk: sunxi: Move mod0 clock to a file of its ownMaxime Ripard
2014-09-27clk: sunxi: Introduce mbus compatibleMaxime Ripard
2014-09-27clk: sunxi: factors: Invert the probing logicMaxime Ripard
2014-09-25clk: Remove .owner field for driverKiran Padwal
2014-09-13clk: sunxi: add correct divider table for sun4i-apb0 clockChen-Yu Tsai
2014-07-28clk: sunxi: staticize structures and arraysEmilio López
2014-07-28clk: sunxi: add __iomem markings to MMIO pointersEmilio López
2014-07-25Merge tag 'sunxi-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kerne...Mike Turquette
2014-07-15clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 supportChen-Yu Tsai
2014-07-15clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indicesChen-Yu Tsai
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-19 14:14:49 +0000