Age | Commit message (Expand) | Author |
2019-05-07 | Merge branches 'clk-sa', 'clk-aspeed', 'clk-samsung', 'clk-ingenic' and 'clk-... | Stephen Boyd |
2019-04-23 | clk: core: replace clk_{readl,writel} with {readl,writel} | Jonas Gorski |
2019-04-11 | clk: tegra: Make tegra_clk_super_mux_ops static | YueHaibing |
2019-03-14 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds |
2019-03-08 | Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and ... | Stephen Boyd |
2019-02-22 | clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings | YueHaibing |
2019-02-18 | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static | Wei Yongjun |
2019-02-15 | Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Arnd Bergmann |
2019-02-06 | clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 | Peter De Schrijver |
2019-02-06 | clk: tegra: dfll: add CVB tables for Tegra210 | Joseph Lo |
2019-02-06 | clk: tegra: dfll: round down voltages based on alignment | Joseph Lo |
2019-02-06 | clk: tegra: dfll: support PWM regulator control | Joseph Lo |
2019-02-06 | clk: tegra: dfll: CVB calculation alignment with the regulator | Joseph Lo |
2019-02-06 | clk: tegra: dfll: registration for multiple SoCs | Peter De Schrijver |
2019-01-09 | clk: tegra: dfll: Fix a potential Oop in remove() | Dan Carpenter |
2018-12-14 | Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and '... | Stephen Boyd |
2018-12-14 | clk: tegra: Return the exact clock rate from clk_round_rate | Robert Yang |
2018-12-14 | clk: tegra30: Use Tegra CPU powergate helper function | Jon Hunter |
2018-12-14 | clk: tegra: Fix maximum audio sync clock for Tegra124/210 | Jon Hunter |
2018-12-14 | clk: tegra: get rid of duplicate defines | Marcel Ziswiler |
2018-11-28 | clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro | Yangtao Li |
2018-11-08 | clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC | Dmitry Osipenko |
2018-11-08 | clk: tegra20: Turn EMC clock gate into divider | Dmitry Osipenko |
2018-10-16 | clk: tegra210: Include size.h for compilation ease | Stephen Boyd |
2018-10-16 | clk: tegra: Fixes for MBIST work around | Joseph Lo |
2018-10-16 | clk: tegra: probe deferral error reporting | Marcel Ziswiler |
2018-08-14 | Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',... | Stephen Boyd |
2018-08-14 | Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-te... | Stephen Boyd |
2018-07-25 | clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks | Peter De-Schrijver |
2018-07-25 | clk: tegra: Add sdmmc mux divider clock | Peter De-Schrijver |
2018-07-25 | clk: tegra: Refactor fractional divider calculation | Peter De Schrijver |
2018-07-25 | clk: tegra: Fix includes required by fence_udelay() | Aapo Vienamo |
2018-07-08 | clk: tegra: emc: Avoid out-of-bounds bug | Dmitry Osipenko |
2018-07-08 | clk: tegra: Mark Memory Controller clock as critical | Dmitry Osipenko |
2018-07-08 | clk: tegra: Make vde a child of pll_c3 | Thierry Reding |
2018-07-08 | clk: tegra: Make vic03 a child of pll_c3 | Thierry Reding |
2018-07-08 | clk: tegra: bpmp: Don't crash when a clock fails to register | Mikko Perttunen |
2018-06-12 | treewide: kzalloc() -> kcalloc() | Kees Cook |
2018-06-04 | Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and... | Stephen Boyd |
2018-06-01 | clk: tegra: no need to check return value of debugfs_create functions | Greg Kroah-Hartman |
2018-05-18 | clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20 | Dmitry Osipenko |
2018-05-18 | clk: tegra20: Correct parents of CDEV1/2 clocks | Dmitry Osipenko |
2018-05-18 | clk: tegra20: Add DEV1/DEV2 OSC dividers | Dmitry Osipenko |
2018-03-12 | clk: tegra: Fix pll_u rate configuration | Marcel Ziswiler |
2018-03-12 | clk: tegra: Specify VDE clock rate | Dmitry Osipenko |
2018-03-12 | clk: tegra20: Correct PLL_C_OUT1 setup | Dmitry Osipenko |
2018-03-12 | clk: tegra: Mark HCLK, SCLK and EMC as critical | Dmitry Osipenko |
2018-03-08 | clk: tegra: MBIST work around for Tegra210 | Peter De Schrijver |
2018-03-08 | clk: tegra: add fence_delay for clock registers | Peter De Schrijver |
2018-03-08 | clk: tegra: Add la clock for Tegra210 | Peter De Schrijver |