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2022-09-19gpio: mlxbf2: Use generic_handle_irq_safe()Sebastian Andrzej Siewior
On PREEMPT_RT enabled kernels the demultiplex interrupt handler is force threaded and runs with interrupts enabled. The invocation of generic_handle_irq() with interrupts enabled triggers a lockdep warning due to a non-irq safe lock acquisition. Instead of disabling interrupts on the driver level, use generic_handle_domain_irq_safe(). [ tglx: Split out from combo patch ] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/YnkfWFzvusFFktSt@linutronix.de
2022-09-16Merge tag 'gpio-fixes-for-v6.0-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio fixes from Bartosz Golaszewski: - fix the level-low interrupt type support in gpio-mpc8xxx - convert another two drivers to using immutable irq chips - MAINTAINERS update * tag 'gpio-fixes-for-v6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: mt7621: Make the irqchip immutable gpio: ixp4xx: Make irqchip immutable MAINTAINERS: Update HiSilicon GPIO Driver maintainer gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type in mpc85xx
2022-09-16Merge tag 'pinctrl-v6.0-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Nothing special, just driver fixes: - Fix IRQ wakeup and pins for UFS and SDC2 issues on the Qualcomm SC8180x - Fix the Rockchip driver to support interrupt on both rising and falling edges. - Name the Allwinner A100 R_PIO properly - Fix several issues with the Ocelot interrupts" * tag 'pinctrl-v6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: ocelot: Fix interrupt controller pinctrl: sunxi: Fix name for A100 R_PIO pinctrl: rockchip: Enhance support for IRQ_TYPE_EDGE_BOTH pinctrl: qcom: sc8180x: Fix wrong pin numbers pinctrl: qcom: sc8180x: Fix gpio_wakeirq_map
2022-09-14gpio: mt7621: Make the irqchip immutableSergio Paracuellos
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning to indicate if the gpiolib is altering the internals of irqchips. Following this change the following warnings are now observed for the mt7621 driver: gpio gpiochip0: (1e000600.gpio-bank0): not an immutable chip, please consider fixing it! gpio gpiochip1: (1e000600.gpio-bank1): not an immutable chip, please consider fixing it! gpio gpiochip2: (1e000600.gpio-bank2): not an immutable chip, please consider fixing it! Fix this by making the irqchip in the mt7621 driver immutable. Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-13gpio: ixp4xx: Make irqchip immutableLinus Walleij
This turns the IXP4xx GPIO irqchip into an immutable irqchip, a bit different from the standard template due to being hierarchical. Tested on the IXP4xx which uses drivers/ata/pata_ixp4xx_cf.c for a rootfs on compact flash with IRQs from this GPIO block to the CF ATA controller. Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-07gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type in mpc85xxPali Rohár
Commit e39d5ef67804 ("powerpc/5xxx: extend mpc8xxx_gpio driver to support mpc512x gpios") implemented support for IRQ_TYPE_LEVEL_LOW flow type in mpc512x via falling edge type. Do same for mpc85xx which support was added in commit 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio"). Fixes probing of lm90 hwmon driver on mpc85xx based board which use level interrupt. Without it kernel prints error and refuse lm90 to work: [ 15.258370] genirq: Setting trigger mode 8 for irq 49 failed (mpc8xxx_irq_set_type+0x0/0xf8) [ 15.267168] lm90 0-004c: cannot request IRQ 49 [ 15.272708] lm90: probe of 0-004c failed with error -22 Fixes: 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-03gpio: ws16c48: Make irq_chip immutableWilliam Breathitt Gray
Kernel warns about mutable irq_chips: "not an immutable chip, please consider fixing!" Make the struct irq_chip const, flag it as IRQCHIP_IMMUTABLE, add the new helper functions, and call the appropriate gpiolib functions. Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-03gpio: 104-idio-16: Make irq_chip immutableWilliam Breathitt Gray
Kernel warns about mutable irq_chips: "not an immutable chip, please consider fixing!" Make the struct irq_chip const, flag it as IRQCHIP_IMMUTABLE, add the new helper functions, and call the appropriate gpiolib functions. Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-03gpio: 104-idi-48: Make irq_chip immutableWilliam Breathitt Gray
Kernel warns about mutable irq_chips: "not an immutable chip, please consider fixing!" Make the struct irq_chip const, flag it as IRQCHIP_IMMUTABLE, add the new helper functions, and call the appropriate gpiolib functions. Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-09-03gpio: 104-dio-48e: Make irq_chip immutableWilliam Breathitt Gray
Kernel warns about mutable irq_chips: "not an immutable chip, please consider fixing!" Make the struct irq_chip const, flag it as IRQCHIP_IMMUTABLE, add the new helper functions, and call the appropriate gpiolib functions. Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-31gpio: realtek-otto: switch to 32-bit I/OSander Vanheule
By using 16-bit I/O on the GPIO peripheral, which is apparently not safe on MIPS, the IMR can end up containing garbage. This then results in interrupt triggers for lines that don't have an interrupt handler associated. The irq_desc lookup fails, and the ISR will not be cleared, keeping the CPU busy until reboot, or until another IMR operation restores the correct value. This situation appears to happen very rarely, for < 0.5% of IMR writes. Instead of using 8-bit or 16-bit I/O operations on the 32-bit memory mapped peripheral registers, switch to using 32-bit I/O only, operating on the entire bank for all single bit line settings. For 2-bit line settings, with 16-bit port values, stick to manual (un)packing. This issue has been seen on RTL8382M (HPE 1920-16G), RTL8391M (Netgear GS728TP v2), and RTL8393M (D-Link DGS-1210-52 F3, Zyxel GS1900-48). Reported-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> # DGS-1210-52 Reported-by: Birger Koblitz <mail@birger-koblitz.de> # GS728TP Reported-by: Jan Hoffmann <jan@3e8.eu> # 1920-16G Fixes: 0d82fb1127fb ("gpio: Add Realtek Otto GPIO support") Signed-off-by: Sander Vanheule <sander@svanheule.net> Cc: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-31gpio: pca953x: Add mutex_lock for regcache sync in PMHaibo Chen
The regcache sync will set the cache_bypass = true, at that time, when there is regmap write operation, it will bypass the regmap cache, then the regcache sync will write back the value from cache to register, which is not as our expectation. Though regmap already use its internal lock to avoid such issue, but this driver force disable the regmap internal lock in its regmap config: disable_locking = true To avoid this issue, use the driver's own lock to do the protect in system PM. Fixes: b76574300504 ("gpio: pca953x: Restore registers after suspend/resume cycle") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-28gpio: mockup: remove gpio debugfs when remove deviceWei Yongjun
GPIO mockup debugfs is created in gpio_mockup_probe() but forgot to remove when remove device. This patch add a devm managed callback for removing them. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-25pinctrl: rockchip: Enhance support for IRQ_TYPE_EDGE_BOTHJoão H. Spies
Switching between falling/rising edges for IRQ_TYPE_EDGE_BOTH on pins that require debounce can cause the device to lose events due to a desync between pin state and irq type. This problem is resolved by switching between IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_LEVEL_HIGH instead. Fixes: 936ee2675eee ("gpio/rockchip: add driver for rockchip gpio") Signed-off-by: João H. Spies <jhlspies@gmail.com> Link: https://lore.kernel.org/r/20220808025121.110223-1-jhlspies@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-19gpio: pxa: use devres for the clock structBartosz Golaszewski
The clock is never released after probe(). Use devres to not leak resources. Reported-by: Hulk Robot <hulkci@huawei.com> Reported-by: Yuan Can <yuancan@huawei.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-04Merge tag 'gpio-updates-for-v6.0-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "Here are the updates for this merge window from the GPIO subsystem. We have more lines removed than added thanks to dropping of a driver for a platform that's no longer supported. Otherwise the changes are pretty straightforward: support for some new models, various improvements to existing drivers, some tweaks to the core library code and DT bindings updates. Summary: - remove gpio-vr41xx driver as the only platform using it got dropped too - add support for suspend/resume to gpio-davinci - improvements to the GPIO character device code - add support for disabling bias for in-kernel users (up until now only user-space could set it) - drop unused devm_gpio_free() - fix a refcount issue in gpiolib OF - use device match helpers where applicable - add support for a new model to gpio-rockchip - non-functional improvements in gpio-adp5588 - improve and simplify teardown in gpio-twl4030 and gpio-ucb1400 - modernize the gpio-74xx-mmio and gpio-adnp drivers - coding style improvements in gpio-xilinx, gpio-104-idi-48 - support new model (pca9571) in gpio-pca9570 - convert the DT bindings to YAML for gpio-mvebu and update the document - don't return error codes from remove() in gpio-brcmstb - add a library for the intel 8255 PPI interface and use it in drivers - reduce using magic numbers and improve code readability in several drivers - convert DT bindings to YAML for gpio-tpic2810 - add new models to DT bindings for gpio-frl-imx - Kconfig improvements - other minor tweaks and improvements" * tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (52 commits) dt-bindings: gpio: fsl-imx-gpio: Add i.MXRT compatibles gpio: 74xx-mmio: Use bits instead of plain numbers for flags gpio: xilinx: add missing blank line after declarations MAINTAINERS: Update Intel 8255 GPIO driver file list gpio: gpio-mm: Implement and utilize register structures gpio: 104-idi-48: Implement and utilize register structures gpio: 104-dio-48e: Implement and utilize register structures gpio: i8255: Introduce the Intel 8255 interface library module gpio: 104-idio-16: Implement and utilize register structures gpio: ws16c48: Implement and utilize register structures gpio: remove VR41XX related gpio driver dt-bindings: gpio: add pull-disable flag gpiolib: acpi: support bias pull disable gpiolib: of: support bias pull disable gpiolib: add support for bias pull disable gpio: 74xx-mmio: use bits.h macros for all masks gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in() gpio: 74xx-mmio: Make use of device properties gpiolib: cdev: compile out HTE unless CONFIG_HTE selected gpiolib: cdev: consolidate edge detector configuration flags ...
2022-08-04Merge tag 'spdx-6.0-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx Pull SPDX updates from Greg KH: "Here is the set of SPDX comment updates for 6.0-rc1. Nothing huge here, just a number of updated SPDX license tags and cleanups based on the review of a number of common patterns in GPLv2 boilerplate text. Also included in here are a few other minor updates, two USB files, and one Documentation file update to get the SPDX lines correct. All of these have been in the linux-next tree for a very long time" * tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits) Documentation: samsung-s3c24xx: Add blank line after SPDX directive x86/crypto: Remove stray comment terminator treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE ...
2022-08-01Merge tag 'irq-core-2022-08-01' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "Updates for interrupt core and drivers: Core: - Fix a few inconsistencies between UP and SMP vs interrupt affinities - Small updates and cleanups all over the place New drivers: - LoongArch interrupt controller - Renesas RZ/G2L interrupt controller Updates: - Hotpath optimization for SiFive PLIC - Workaround for broken PLIC edge triggered interrupts - Simall cleanups and improvements as usual" * tag 'irq-core-2022-08-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits) irqchip/mmp: Declare init functions in common header file irqchip/mips-gic: Check the return value of ioremap() in gic_of_init() genirq: Use for_each_action_of_desc in actions_show() irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch irqchip: Add LoongArch CPU interrupt controller support irqchip: Add Loongson Extended I/O interrupt controller support irqchip/loongson-liointc: Add ACPI init support irqchip/loongson-pch-msi: Add ACPI init support irqchip/loongson-pch-pic: Add ACPI init support irqchip: Add Loongson PCH LPC controller support LoongArch: Prepare to support multiple pch-pic and pch-msi irqdomain LoongArch: Use ACPI_GENERIC_GSI for gsi handling genirq/generic_chip: Export irq_unmap_generic_chip ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback APCI: irq: Add support for multiple GSI domains LoongArch: Provisionally add ACPICA data structures irqdomain: Use hwirq_max instead of revmap_size for NOMAP domains irqdomain: Report irq number for NOMAP domains irqchip/gic-v3: Fix comment typo dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoC ...
2022-07-28gpio: 74xx-mmio: Use bits instead of plain numbers for flagsAndy Shevchenko
The initial code was misleading to use bitwise AND against plain number, and the commit d3054ba1db62 ("gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()") missed that. Switch definitions to be defined bits for the correct comparison. Fixes: d3054ba1db62 ("gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-26gpio: xilinx: add missing blank line after declarationsShubhrajyoti Datta
Add a missing blank line. No functional changes. WARNING: Missing a blank line after declarations 128: FILE: drivers/gpio/gpio-xilinx.c:120: + void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); + xgpio_set_value32(a, bit, xgpio_readreg(addr)); WARNING: Missing a blank line after declarations 136: FILE: drivers/gpio/gpio-xilinx.c:126: + void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); + xgpio_writereg(addr, xgpio_get_value32(a, bit)); Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-22Merge tag 'gpio-fixes-for-v5.19-rc8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio fixes from Bartosz Golaszewski: - fix several regmap usage issues in gpio-pca953x - fix out-of-tree build for GPIO selftests - fix integer overflow in gpio-xilinx * tag 'gpio-fixes-for-v5.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: gpio-xilinx: Fix integer overflow selftests: gpio: fix include path to kernel headers for out of tree builds gpio: pca953x: use the correct register address when regcache sync during init gpio: pca953x: use the correct range when do regmap sync gpio: pca953x: only use single read/write for No AI mode
2022-07-22gpio: gpio-xilinx: Fix integer overflowSrinivas Neeli
Current implementation is not able to configure more than 32 pins due to incorrect data type. So type casting with unsigned long to avoid it. Fixes: 02b3f84d9080 ("xilinx: Switch to use bitmap APIs") Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: gpio-mm: Implement and utilize register structuresWilliam Breathitt Gray
Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. The GPIO-MM device features an Intel 8255 compatible GPIO interface, so the i8255 GPIO module is selected and utilized as well. Tested-by: Fred Eckert <Frede@cmslaser.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: 104-idi-48: Implement and utilize register structuresWilliam Breathitt Gray
Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. The 104-IDI-48 device features an Intel 8255 compatible GPIO interface, so the i8255 GPIO module is selected and utilized as well. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: John Hentges <jhentges@accesio.com> Cc: Jay Dolan <jay.dolan@accesio.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: 104-dio-48e: Implement and utilize register structuresWilliam Breathitt Gray
Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. The 104-DIO-48E device features an Intel 8255 compatible GPIO interface, so the i8255 GPIO module is selected and utilized as well. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: John Hentges <jhentges@accesio.com> Cc: Jay Dolan <jay.dolan@accesio.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: i8255: Introduce the Intel 8255 interface library moduleWilliam Breathitt Gray
Exposes consumer library functions providing support for interfaces compatible with the venerable Intel 8255 Programmable Peripheral Interface (PPI). The Intel 8255 PPI first appeared in the early 1970s, initially for the Intel 8080 and later appearing in the original IBM-PC. The popularity of the original Intel 8255 chip led to many subsequent variants and clones of the interface in various chips and integrated circuits. Although still popular, interfaces compatible with the Intel 8255 PPI are nowdays typically found embedded in larger VLSI processing chips and FPGA components rather than as discrete ICs. A CONFIG_GPIO_I8255 Kconfig option is introduced by this patch. Modules wanting access to these i8255 library functions should select this Kconfig option, and import the I8255 symbol namespace. Tested-by: Fred Eckert <Frede@cmslaser.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: John Hentges <jhentges@accesio.com> Cc: Jay Dolan <jay.dolan@accesio.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: 104-idio-16: Implement and utilize register structuresWilliam Breathitt Gray
Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. Tested-by: Fred Eckert <Frede@cmslaser.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: John Hentges <jhentges@accesio.com> Cc: Jay Dolan <jay.dolan@accesio.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-20gpio: ws16c48: Implement and utilize register structuresWilliam Breathitt Gray
Reduce magic numbers and improve code readability by implementing and utilizing named register data structures. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: Paul Demetrotion <pdemetrotion@winsystems.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: remove VR41XX related gpio driverThomas Bogendoerfer
Commit d3164e2f3b0a ("MIPS: Remove VR41xx support") removed support for MIPS VR41xx platform, so remove exclusive drivers for this platform, too. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: pca953x: use the correct register address when regcache sync during initHaibo Chen
For regcache_sync_region, we need to use pca953x_recalc_addr() to get the real register address. Fixes: ec82d1eba346 ("gpio: pca953x: Zap ad-hoc reg_output cache") Fixes: 0f25fda840a9 ("gpio: pca953x: Zap ad-hoc reg_direction cache") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: pca953x: use the correct range when do regmap syncHaibo Chen
regmap will sync a range of registers, here use the correct range to make sure the sync do not touch other unexpected registers. Find on pca9557pw on imx8qxp/dxl evk board, this device support 8 pin, so only need one register(8 bits) to cover all the 8 pins's property setting. But when sync the output, we find it actually update two registers, output register and the following register. Fixes: b76574300504 ("gpio: pca953x: Restore registers after suspend/resume cycle") Fixes: ec82d1eba346 ("gpio: pca953x: Zap ad-hoc reg_output cache") Fixes: 0f25fda840a9 ("gpio: pca953x: Zap ad-hoc reg_direction cache") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: pca953x: only use single read/write for No AI modeHaibo Chen
For the device use NO AI mode(not support auto address increment), only use the single read/write when config the regmap. We meet issue on PCA9557PW on i.MX8QXP/DXL evk board, this device do not support AI mode, but when do the regmap sync, regmap will sync 3 byte data to register 1, logically this means write first data to register 1, write second data to register 2, write third data to register 3. But this device do not support AI mode, finally, these three data write only into register 1 one by one. the reault is the value of register 1 alway equal to the latest data, here is the third data, no operation happened on register 2 and register 3. This is not what we expect. Fixes: 49427232764d ("gpio: pca953x: Perform basic regmap conversion") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: acpi: support bias pull disableNuno Sá
On top of looking at PULL_UP and PULL_DOWN flags, also look at PULL_DISABLE and set the appropriate GPIO flag. The GPIO core will then pass down this to controllers that support it. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: of: support bias pull disableNuno Sá
On top of looking at PULL_UP and PULL_DOWN flags, also look at PULL_DISABLE and set the appropriate GPIO flag. The GPIO core will then pass down this to controllers that support it. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: add support for bias pull disableNuno Sá
This change prepares the gpio core to look at firmware flags and set 'FLAG_BIAS_DISABLE' if necessary. It works in similar way to 'GPIO_PULL_DOWN' and 'GPIO_PULL_UP'. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: 74xx-mmio: use bits.h macros for all masksAndy Shevchenko
Make use of the GENMASK() (far less error-prone, far more concise). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()Andy Shevchenko
It's logically better to check the IN in ->direction_input() and _OUT in ->direction_output(). While at it, replace ternary with plain if-conditional for the sake of consistency with mmio_74xx_dir_out(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: 74xx-mmio: Make use of device propertiesAndy Shevchenko
Convert the module to be property provider agnostic and allow it to be used on non-OF platforms. Add mod_devicetable.h include. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: cdev: compile out HTE unless CONFIG_HTE selectedKent Gibson
The majority of builds do not include HTE, so compile out hte functionality unless CONFIG_HTE is selected. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: cdev: consolidate edge detector configuration flagsKent Gibson
Combine the polarity_change flag, struct line eflags, and hte enable flag into a single flag variable. The combination of these flags describes the configuration state of the edge detector, so formalize and clarify that by combining them into a single variable, edflags, in struct line. The edflags is a subset of the GPIO_V2_LINE_FLAGsb relevant to the edge detector, and is also a superset of the eflags it replaces. The eflags name is still used to describe the subset of edflags corresponding to the rising/falling edge flags where edflags is masked down to that subset. This consolidation reduces the number of variables being passed, simplifies state comparisons, and provides a more extensible foundation should additional edge sources be integrated in the future. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: cdev: simplify line event identificationKent Gibson
Reorganise line event identification code to reduce code duplication, and replace if-else initializers with a helper function to improve readability. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-19gpiolib: cdev: replace if-else chains with switchesKent Gibson
Improve readability by replacing if-else chains with switch statements. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: cdev: simplify parameter in call to hte_edge_setupKent Gibson
Improve readability by using the GPIO_V2_LINE_FLAG_EDGE_BOTH instead of combining the rising and falling edge flags. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Dipen Patel <dipenp@nvidia.com> Tested-by: Dipen Patel <dipenp@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpiolib: cdev: simplify linereq_freeKent Gibson
The edge detector is only ever started after the line desc has been determined, so move edge_detector_stop() inside the line desc check, and merge the two checked regions into one. Signed-off-by: Kent Gibson <warthog618@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Dipen Patel <dipenp@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: 104-idi-48: unsigned to unsigned int cleanupAakash Sen Sharma
Remove checkpatch warnings. No functional changes. Signed-off-by: Aakash Sen Sharma <aakashsensharma@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: GPIO_SAMA5D2_PIOBU should depend on ARCH_AT91Geert Uytterhoeven
The SAMA5D2 PIOBU is only present on some AT91/Microchip SoCs. Hence add a dependency on ARCH_AT91, to prevent asking the user about this driver when configuring a kernel without AT91/Microchip SoC support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: gpiolib-of: Fix refcount bugs in of_mm_gpiochip_add_data()Liang He
We should use of_node_get() when a new reference of device_node is created. It is noted that the old reference stored in 'mm_gc->gc.of_node' should also be decreased. This patch is based on the fact that there is a call site in function 'qe_add_gpiochips()' of src file 'drivers\soc\fsl\qe\gpio.c'. In this function, of_mm_gpiochip_add_data() is contained in an iteration of for_each_compatible_node() which will automatically increase and decrease the refcount. So we need additional of_node_get() for the reference escape in of_mm_gpiochip_add_data(). Fixes: a19e3da5bc5f ("of/gpio: Kill of_gpio_chip and add members directly to gpio_chip") Signed-off-by: Liang He <windhl@126.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19gpio: lp3943: unsigned to unsigned int cleanupShinyzenith
Getting rid of checkpatch findings. No functional changes. Signed-off-by: Shinyzenith <aakashsensharma@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19Merge tag 'intel-gpio-v5.20-1' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into TEST_MERGE intel-gpio for v5.20-1 * Clean up the GPIO driver of Intel EG20 PCH The following is an automated git shortlog grouped by driver: pch: - Change PCI device macros - Use dev_err_probe()
2022-07-19gpiolib: of: Use device_match_of_node() helperAndy Shevchenko
Instead of open coding, use device_match_of_node() helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 13:30:00 +0000