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path: root/drivers/net/phy
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2014-11-12net: phy: bcm7xxx: add PHY revision D0 workaround sequenceFlorian Fainelli
PHY revision D0 requires a specific workaround sequence which needs to be applied to get the HW to behave properly in all corner cases conditions. Do this based on the revision we just read out of the HW using a specific function. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: introduce r_rc_cal_reset helperFlorian Fainelli
This function performs a R/RC calibration reset and will start being used by more than one function in the next patches, create a helper function to factor code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaroundFlorian Fainelli
bcm7445_config_init() was working around non-production version of the PHY HW block, so just remove it entirely. bcm7xxx_28nm_afe_config_init() was running for all PHY revisions greater than B0, but this workaround sequence is really specific to the B0 PHY revision, so rename the function accordingly and update the GPHY macro to use the generic config_init callback. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: only show PHY revision onceFlorian Fainelli
bcm7xxx_28nm_config_init() can be called as frequently as needed by the PHY library upon suspend/resume cycles and interface bring up/down, just print the PHY revision once and for all in order not to spam kernel logs. Fixes: d8ebfed3f11b ("net: phy: bcm7xxx: utilize PHY revision in config_init") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: enable led-mode for KSZ8081/KSZ8091Johan Hovold
Enable led-mode configuration for KSZ8081 and KSZ8091. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: clean up led-mode setupJohan Hovold
Clean up led-mode setup by introducing proper defines for PHY Control registers 1 and 2 and only passing the register to the setup function. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: refactor led-mode error handlingJohan Hovold
Refactor led-mode error handling. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: add led-mode sanity checkJohan Hovold
Make sure never to update more than two bits when setting the led mode, something which could for example change the reference-clock setting. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: disable broadcast for KSZ8081/KSZ8091Johan Hovold
Disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that this can also be configured using the B-CAST_OFF pin on KSZ9091, but that KSZ8081 lacks this pin and is also limited to addresses 0 and 3. Specifically, this allows for dual KSZ8081 setups. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: refactor broadcast disableJohan Hovold
Refactor and clean up broadcast disable. Some Micrel PHYs have a broadcast-off bit in the Operation Mode Strap Override register which can be used to disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that the KSZPHY_OMSO_RMII_OVERRIDE bit is set by default on KSZ8021/8031. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: use BIT macroJohan Hovold
Use BIT macro for bitmask definitions. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: micrel: fix config_intr error handlingJohan Hovold
Make sure never to update the control register with random data (an error code) by checking the return value after reading it. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: replace phy_drivers_register callsJohan Hovold
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: replace phy_driver_register callsJohan Hovold
Replace module init/exit which only calls phy_driver_register with module_phy_driver macro. Compile tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-05amd-xgbe-phy: Let AMD_XGBE_PHY depend on HAS_IOMEMLendacky, Thomas
The amd-xgbe-phy driver needs to perform ioremap calls, so add HAS_IOMEM to its build dependency. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-05amd-xgbe-phy: Sync PCS and PHY modes after resetLendacky, Thomas
This patch adds support to sync the states of the PCS and the PHY after a reset is performed. If the PCS and the PHY are not in the same state after reset an extra mode change would be performed. This extra mode change might not be needed if the PCS and the PHY are synced up after reset. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-04net: phy: spi_ks8995: remove sysfs bin file by registered attributeVladimir Zapolskiy
When a sysfs binary file is asked to be removed, it is found by attribute name, so strictly speaking this change is not a fix, but just in case when attribute name is changed in the driver or sysfs internals are changed, it might be better to remove the previously created file using right the same binary attribute. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David S. Miller <davem@davemloft.net> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: drivers/net/phy/marvell.c Simple overlapping changes in drivers/net/phy/marvell.c Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-28net: phy: Add SGMII Configuration for Marvell 88E1145 InitializationVince Bridgers
Marvell phy 88E1145 configuration & initialization was missing a case for initializing SGMII mode. This patch adds that case. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-28net: phy: Adding SGMII support for Marvell 88ee1145 driverViet Nga Dao
Additional code to m88e1145_config_init function to allow the driver to support SGMII mode. Signed-off-by: Viet Nga Dao <vndao@altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-24phy: marvell: Add support for 88E3016 FastEthernet PHYSebastian Hesselbarth
Marvell 88E3016 is a FastEthernet PHY that also can be found in Marvell Berlin SoCs as integrated PHY. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-14phy/micrel: KSZ8031RNL RMII clock reconfiguration bugBruno Thomsen
Bug: Unable to send and receive Ethernet packets with Micrel PHY. Affected devices: KSZ8031RNL (commercial temp) KSZ8031RNLI (industrial temp) Description: PHY device is correctly detected during probe. PHY power-up default is 25MHz crystal clock input and output 50MHz RMII clock to MAC. Reconfiguration of PHY to input 50MHz RMII clock from MAC causes PHY to become unresponsive if clock source is changed after Operation Mode Strap Override (OMSO) register setup. Cause: Long lead times on parts where clock setup match circuit design forces the usage of similar parts with wrong default setup. Solution: Swapped KSZ8031 register setup and added phy_write return code validation. Tested with Freescale i.MX28 Fast Ethernet Controler (fec). Signed-off-by: Bruno Thomsen <bth@kamstrup.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-10net/phy: micrel: Add clock support for KSZ8021/KSZ8031Sascha Hauer
The KSZ8021 and KSZ8031 support RMII reference input clocks of 25MHz and 50MHz. Both PHYs differ in the default frequency they expect after reset. If this differs from the actual input clock, then register 0x1f bit 7 must be changed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-07net: phy: adjust fixed_phy_register() return valuePetri Gynther
Adjust fixed_phy_register() to return struct phy_device *, so that it becomes easy to use fixed PHYs without device tree support: phydev = fixed_phy_register(PHY_POLL, &fixed_phy_status, NULL); fixed_phy_set_link_update(phydev, fixed_phy_link_update); phy_connect_direct(netdev, phydev, handler_fn, phy_interface); This change is a prerequisite for modifying bcmgenet driver to work without a device tree on Broadcom's MIPS-based 7xxx platforms. Signed-off-by: Petri Gynther <pgynther@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-06drivers/net/phy/Kconfig: Let MDIO_BCM_UNIMAC depend on HAS_IOMEMChen Gang
MDIO_BCM_UNIMAC needs HAS_IOMEM, so depend on it, the related error ( with allmodconfig under um): MODPOST 1205 modules ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined! Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-01net: phy: add BCM7425 and BCM7429 PHYsPetri Gynther
Signed-off-by: Petri Gynther <pgynther@google.com> Acked-by: Florian Fainelli <f.fainelli@gmai.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-23Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: arch/mips/net/bpf_jit.c drivers/net/can/flexcan.c Both the flexcan and MIPS bpf_jit conflicts were cases of simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: utilize PHY revision in config_initFlorian Fainelli
Now that the GENET and SF2 drivers have been updated to communicate us what is the revision of the BCM7xxx integrated PHY, utilize that information in the config_init() callback to call into the appropriate workaround function based on our revision. While at it, we also print the revision and patch level to help debug new chips. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: do not use PHY_BRCM_100MBPS_WARFlorian Fainelli
There is no need for the PHY driver to check PHY_BRCM_100MBPS_WAR since that is redundant with checking the PHY device supported features. Get rid of that workaround flag. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15net/phy: micrel: Disable asymmetric pause for KSZ9031Mike Looijmans
The KSZ9031 appears to suffer from the same hardware bug as described for the KSZ9021 in commit 32fcafbcd1c9f6c7013016a22a5369b4acb93577 ("net/phy: micrel: Disable asymmetric pause for KSZ9021") you have to unplug the cable and plug it back to get it to work. Remove the SUPPORTED_Asym_Pause flag for the KSZ9031 to fix this. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-08dp83640: Make use of skb_queue_purge instead of reimplementing the codeAlexander Duyck
This change makes it so that dp83640_remove can use skb_queue_purge instead of looping through itself to flush any entries out of the queue. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-07Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
2014-09-07net: phy: mdio-sun4i: don't select REGULATORBeniamino Galvani
The mdio-sun4i driver automatically selects REGULATOR and REGULATOR_FIXED_VOLTAGE because it uses the regulator API. But a driver selecting a subsystem increases the chance of generating circular Kconfig dependencies, especially when other drivers depend on the selected symbol. Since the regulator API functions are replaced with no-ops when REGULATOR is disabled, the driver can be built successfully even without regulator support and so those 'select' dependencies can be safely dropped. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-07amd-xgbe-phy: Fix build break for missing declarationTom Lendacky
A previous patch inadvertently deleted a declaration in the amd_xgbe_an_tx_training function causing the build to fail. Add the declaration for 'priv' back to the function. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-05net-timestamp: Make the clone operation stand-alone from phy timestampingAlexander Duyck
The phy timestamping takes a different path than the regular timestamping does in that it will create a clone first so that the packets needing to be timestamped can be placed in a queue, or the context block could be used. In order to support these use cases I am pulling the core of the code out so it can be used in other drivers beyond just phy devices. In addition I have added a destructor named sock_efree which is meant to provide a simple way for dropping the reference to skb exceptions that aren't part of either the receive or send windows for the socket, and I have removed some duplication in spots where this destructor could be used in place of sock_edemux. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-05amd-xgbe-phy: Checkpatch driver fixesLendacky, Thomas
This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-05amd-xgbe-phy: Enhance parallel detection to support KR speedLendacky, Thomas
Add support to allow parallel detection to work in KR speed. With both speed modes of KX and KR supported, KX must be checked first. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-05amd-xgbe-phy: Check device for current speed mode (KR/KX)Lendacky, Thomas
Since device resets can change the current mode it's possible to think the device is in a different mode than it actually is. Rather than trying to determine every place that is needed to set/save the current mode, be safe and check the devices actual mode when needed rather than trying to track it. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-01net: phy: mdio-bcm-unimac: NULL-terminate unimac_mdio_idsFlorian Fainelli
drivers/net/phy/mdio-bcm-unimac.c:195:37-38: unimac_mdio_ids is not NULL terminated at line 195 Make sure of_device_id tables are NULL terminated Generated by: scripts/coccinelle/misc/of_table.cocci Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-29net: phy: properly report internal PHYs through sysfsFlorian Fainelli
Internal PHYs may not have a valid PHY interface defined, which will show up in sysfs as "". Add an explicit check of internal PHYs to report their interface correctly. Fixes: 3d055d8d1c24 ("net: phy: expose PHY device interface mode") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27net: phy: bcm7xxx: add BCM7250 and BCM7364 PHY entriesFlorian Fainelli
Add two new entries to the Broadcom BCM7xxx internal PHY driver for BCM7250 and BCM7364 chips. Those chips share the usual 28nm process Gigabit PHY sequence and require the same workarounds so far. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27net: phy: bcm7xxx: introduce helper macroFlorian Fainelli
All 28nm Gigabit PHYs supported by the driver have the same callbacks, the only differences being the 32-bits OUI and the name. Use a macro to factor this, making it easier in the future to add new entries. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27net: phy: add generic UniMAC MDIO bus driverFlorian Fainelli
Add a generic UniMAC MDIO bus driver and its Device Tree binding, which can be used by the BCMGENET driver as-is, and the upcoming Starfighter 2 Ethernet switch MDIO bus controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27phy: fix EEE checks inside the phy_init_eee.Giuseppe CAVALLARO
According to the Std 802.3az if the EEE Adv (Reg 7.60), Link partner ability (Reg 7.61) and EEE capability (Register 3.20) bits return 0 this means no EEE is supported. So this patch fixes the checks inside the phy_init_eee function. Signed-off-by: Nandini Sharma <nandini.sharma@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: bcm7xxx: enable EEE at the PHY levelFlorian Fainelli
The 28nm Gigabit PHY on BCM7xxx chips comes out of reset with absolutely no EEE capabilities, such that we would actually return that we do not support EEE when accessing 3.20 (MDIO_PCS_EEE_ABLE) registers. Poke through the vendor-specific C45 register to enable EEE globally at the PHY level, and advertise supported EEE modes. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: allow phy_init_eee() to work with internal PHYsFlorian Fainelli
Internal PHYs do not have any specific phy_interface_t defined because they are within an Ethernet MAC or a larger IC, they will fail the early check in phy_init_eee(). Allow these PHYs to proceed with EEE initialization and report error/success by checking the standard C45 EEE-related registers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: export phy_{read,write}_mmd_indirectFlorian Fainelli
Some PHY drivers might need to access Clause 45 registers in Clause 22 compatibility mode to e.g: properly advertise EEE support when disabled by default. Export these two helper functions: phy_read_mmd_indirect() and phy_write_mmd_indirect() for drivers to use them. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: fixed: return an error for Clause 45 over 22 readsFlorian Fainelli
The fixed PHY driver does not properly emulate Clause 45 over Clause 22 MDIO reads, and as such, will return bogus values when we access such registers. Return an error when accessing these registers in order to prevent advertising bogus capabilities such as EEE support and such. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: bcm7xxx: enable auto power downFlorian Fainelli
The 28nm process BCM7xxx internal Gigabit PHYs all support automatic power down, turn on that feature as part of the configuration initialization callback. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: broadcom: move shadow 0x1C register accessors to brcmphy.hFlorian Fainelli
The shadow register 0x1C is used both by the BCM54xxx PHYs and the BCM7xxx internal PHYs, move the accessors to a common location so both drivers can use them. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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