| Age | Commit message (Expand) | Author |
|---|
| 2008-07-12 | x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d) | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: parse ioapic scope under vt-d structures | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Inter... | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization | Suresh Siddha |
| 2008-02-23 | copyright owner and author clean up for intel iommu and related files | mark gross |
| 2008-02-06 | Genericizing iova.[ch] | David Miller |
| 2008-02-01 | PCI: More Sanity checks for DMAR | Fenghua Yu |
| 2007-10-22 | Intel IOMMU: DMAR detection and parsing logic | Keshavamurthy, Anil S |
