linux.git - Linux kernel

Age	Commit message (Expand)	Author
2018-04-06	Merge branches 'clk-ti', 'clk-amlogic', 'clk-tegra' and 'clk-samsung' into cl...	Stephen Boyd
2018-03-16	clk: samsung: Mark a few things static	Stephen Boyd
2018-03-15	clk: samsung: Add fout=196608001 Hz EPLL rate entry for exynos4412	Sylwester Nawrocki
2018-03-14	clk: meson: Drop unused local variable and add static	Stephen Boyd
2018-03-14	clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devices	Marek Szyprowski
2018-03-13	clk: meson: clean-up clk81 clocks	Jerome Brunet
2018-03-13	clk: meson: add fdiv clock gates	Jerome Brunet
2018-03-13	clk: meson: add mpll pre-divider	Jerome Brunet
2018-03-13	clk: meson: axg: add hifi pll clock	Jerome Brunet
2018-03-13	clk: meson: add ROUND_CLOSEST to the pll driver	Jerome Brunet
2018-03-13	clk: meson: add gp0 frac parameter for axg and gxl	Jerome Brunet
2018-03-13	clk: meson: improve pll driver results with frac	Jerome Brunet
2018-03-13	clk: meson: remove special gp0 lock loop	Jerome Brunet
2018-03-13	clk: meson: poke pll CNTL last	Jerome Brunet
2018-03-13	clk: meson: add fractional part of meson8b fixed_pll	Jerome Brunet
2018-03-13	clk: meson: use hhi syscon if available	Jerome Brunet
2018-03-13	clk: meson: remove obsolete cpu_clk	Jerome Brunet
2018-03-13	clk: meson: rework meson8b cpu clock	Jerome Brunet
2018-03-13	clk: meson: split divider and gate part of mpll	Jerome Brunet
2018-03-13	clk: meson: migrate plls clocks to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate the audio divider clock to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate mplls clocks to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: add regmap helpers for parm	Jerome Brunet
2018-03-13	clk: meson: migrate muxes to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate dividers to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate gates to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: add regmap to the clock controllers	Jerome Brunet
2018-03-13	clk: meson: remove superseded aoclk_gate_regmap	Jerome Brunet
2018-03-13	clk: meson: switch gxbb ao_clk to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: add regmap clocks	Jerome Brunet
2018-03-13	clk: meson: remove obsolete comments	Jerome Brunet
2018-03-13	clk: meson: only one loop index is necessary in probe	Jerome Brunet
2018-03-13	clk: meson: use devm_of_clk_add_hw_provider	Jerome Brunet
2018-03-13	clk: meson: use dev pointer where possible	Jerome Brunet
2018-03-13	Merge branch 'topic/pll-fixes' into next/drivers	Neil Armstrong
2018-03-12	clk: qcom: use divider_ro_round_rate helper	Jerome Brunet
2018-03-12	clk: divider: read-only divider can propagate rate change	Jerome Brunet
2018-03-12	clk: call the clock init() callback before any other ops callback	Jerome Brunet
2018-03-12	clk: mux: add helper function for index/value translation	Jerome Brunet
2018-03-12	clk: divider: export clk_div_mask() helper	Jerome Brunet
2018-03-12	clk: fix determine rate error with pass-through clock	Jerome Brunet
2018-03-12	clk: migrate the count of orphaned clocks at init	Jerome Brunet
2018-03-12	clk: tegra: Fix pll_u rate configuration	Marcel Ziswiler
2018-03-12	clk: tegra: Specify VDE clock rate	Dmitry Osipenko
2018-03-12	clk: tegra20: Correct PLL_C_OUT1 setup	Dmitry Osipenko
2018-03-12	clk: tegra: Mark HCLK, SCLK and EMC as critical	Dmitry Osipenko
2018-03-12	clk: samsung: exynos5420: Add more entries to EPLL rate table	Sylwester Nawrocki
2018-03-12	clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clk	Sylwester Nawrocki
2018-03-08	clk: tegra: MBIST work around for Tegra210	Peter De Schrijver
2018-03-08	clk: tegra: add fence_delay for clock registers	Peter De Schrijver