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path: root/include/dt-bindings/clock/g12a-clkc.h
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2020-02-19dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDsNeil Armstrong
Add clock ids used by the SPICC Controllers of the G12A and compatible SoCs Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-26dt-bindings: clk: meson: add sm1 periph clock controller bindingsNeil Armstrong
Update the documentation to support clock driver for the Amlogic SM1 SoC and expose the GP1, DSU and the CPU 1, 2 & 3 clocks. SM1 clock tree is very close, the main differences are : - each CPU core can achieve a different frequency, albeit a common PLL - a similar tree as the clock tree has been added for the DynamIQ Shared Unit - has a new GP1 PLL used for the DynamIQ Shared Unit - SM1 has additional clocks like for CSI, NanoQ an other components Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-09clk: meson: g12a: expose CPUB clock ID for G12BNeil Armstrong
Expose the CPUB clock id to add DVFS to the second CPU cluster of the Amlogic G12B SoC. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-06-11Merge branch 'v5.3/dt' into v5.3/driversJerome Brunet
2019-06-11dt-bindings: clk: g12a-clkc: add Temperature Sensor clock IDsGuillaume La Roque
Add clock ids used by the temperature sensors of the G12A Socs Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> [fixed commit message]
2019-05-20clk: meson: fix MPLL 50M binding id typoJerome Brunet
MPLL_5OM (the capital letter o) should indeed be MPLL_50M (the number) Fix this before it gets used. Fixes: 25db146aa726 ("dt-bindings: clk: meson: add g12a periph clock controller bindings") Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-04-01dt-bindings: clk: g12a-clkc: add VDEC clock IDsMaxime Jourdan
Expose the three clocks related to the video decoder. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190319101138.27520-2-mjourdan@baylibre.com
2019-03-19dt-bindings: clk: g12a-clkc: add PCIE PLL clock IDNeil Armstrong
Add a clock ID for the reference clock feeding the USB3+PCIe Combo PHY. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190307141455.23879-3-narmstrong@baylibre.com
2019-03-19clk: meson-g12a: add cpu clock bindingsNeil Armstrong
Add Amlogic G12A Family CPU clocks bindings, only export CPU_CLK since it should be the only ID used. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190304131129.7762-2-narmstrong@baylibre.com
2019-02-04dt-bindings: clk: meson: add g12a periph clock controller bindingsJian Hu
Add new clock controller compatible and dt-bindings header for the Everything-Else domain of the g12a SoC Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190201145345.6795-3-jbrunet@baylibre.com