From 656de7e46901fe3228b592e1d9fc89c353f0fa4e Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Sat, 3 Sep 2005 15:55:42 -0700 Subject: [PATCH] ppc32: add cputable entry for 440SP Rev. A Adds the appropriate cputable entry for PPC440SP so cache line sizes are configured correctly. Signed-off-by: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/kernel/cputable.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c index 22c187c1f53f..61382341bb01 100644 --- a/arch/ppc/kernel/cputable.c +++ b/arch/ppc/kernel/cputable.c @@ -932,6 +932,16 @@ struct cpu_spec cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, }, + { /* 440SP Rev. A */ + .pvr_mask = 0xff000fff, + .pvr_value = 0x53000891, + .cpu_name = "440SP Rev. A", + .cpu_features = CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB, + .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, + .icache_bsize = 32, + .dcache_bsize = 32, + }, #endif /* CONFIG_44x */ #ifdef CONFIG_FSL_BOOKE { /* e200z5 */ -- cgit v1.2.3