From e8614292cd41971b54e60188d4e99abdc8695073 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:44 +0900 Subject: ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 Add node for fuel gauge present in Maxim 77693 PMIC. This allows control over battery charging state on Trats2 board. The fuel gauge is compatible with max17042 battery driver (Maxim 17042/17047/17050). Although datasheet rev 2.2 for MAX77693 describes fuel gauge as Maxim 17042-like, the chip on Trats2 board identifies itself as Maxim 17047-like. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index c81c4769411d..dea96574183f 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -15,6 +15,7 @@ /dts-v1/; #include "exynos4412.dtsi" #include +#include / { model = "Samsung Trats 2 based on Exynos4412"; @@ -24,6 +25,7 @@ i2c9 = &i2c_ak8975; i2c10 = &i2c_cm36651; i2c11 = &i2c_max77693; + i2c12 = &i2c_max77693_fuel; }; memory { @@ -552,6 +554,22 @@ }; }; + i2c_max77693_fuel: i2c-gpio-3 { + compatible = "i2c-gpio"; + gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + max77693-fuel-gauge@36 { + compatible = "maxim,max17047"; + interrupt-parent = <&gpx2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + reg = <0x36>; + }; + }; + mmc@12550000 { num-slots = <1>; broken-cd; -- cgit v1.2.3 From 4a235f6aa9d0ff6819201a39c334e4989b45b57b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:49 +0900 Subject: ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 Add suspend to RAM configuration for max77686 regulators. Some LDOs and bucks are disabled. This reduces energy consumption during S2R, approximately from 17 mA to 9 mA. Additionally remove old and not supported bindings: - regulator-mem-off - regulator-mem-idle - regulator-mem-on The max77686 driver does not parse them and they are not documented anywere. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Reviewed-by: Chanwoo Choi Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 72 +++++++++++++++++++-------------- 1 file changed, 42 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index dea96574183f..7ea8b7dce0cb 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -227,7 +227,6 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; }; ldo2_reg: ldo2 { @@ -236,7 +235,9 @@ regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo3_reg: ldo3 { @@ -245,7 +246,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; - regulator-mem-on; }; ldo4_reg: ldo4 { @@ -254,7 +254,6 @@ regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; - regulator-mem-on; }; ldo5_reg: ldo5 { @@ -263,7 +262,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; - regulator-mem-on; }; ldo6_reg: ldo6 { @@ -272,7 +270,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo7_reg: ldo7 { @@ -281,7 +281,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo8_reg: ldo8 { @@ -289,7 +291,9 @@ regulator-name = "VMIPI_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo9_reg: ldo9 { @@ -297,7 +301,6 @@ regulator-name = "CAM_ISP_MIPI_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-mem-idle; }; ldo10_reg: ldo10 { @@ -305,7 +308,9 @@ regulator-name = "VMIPI_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo11_reg: ldo11 { @@ -314,7 +319,9 @@ regulator-min-microvolt = <1950000>; regulator-max-microvolt = <1950000>; regulator-always-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo12_reg: ldo12 { @@ -322,7 +329,9 @@ regulator-name = "VUOTG_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo13_reg: ldo13 { @@ -330,7 +339,6 @@ regulator-name = "NFC_AVDD_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo14_reg: ldo14 { @@ -339,7 +347,9 @@ regulator-min-microvolt = <1950000>; regulator-max-microvolt = <1950000>; regulator-always-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo15_reg: ldo15 { @@ -347,7 +357,9 @@ regulator-name = "VHSIC_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo16_reg: ldo16 { @@ -355,7 +367,9 @@ regulator-name = "VHSIC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo17_reg: ldo17 { @@ -363,7 +377,6 @@ regulator-name = "CAM_SENSOR_CORE_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-mem-idle; }; ldo18_reg: ldo18 { @@ -371,7 +384,6 @@ regulator-name = "CAM_ISP_SEN_IO_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo19_reg: ldo19 { @@ -379,7 +391,6 @@ regulator-name = "VT_CAM_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo20_reg: ldo20 { @@ -387,7 +398,6 @@ regulator-name = "VDDQ_PRE_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo21_reg: ldo21 { @@ -395,7 +405,6 @@ regulator-name = "VTF_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-mem-idle; }; ldo22_reg: ldo22 { @@ -410,7 +419,6 @@ regulator-name = "TSP_AVDD_3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-mem-idle; }; ldo24_reg: ldo24 { @@ -418,7 +426,6 @@ regulator-name = "TSP_VDD_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo25_reg: ldo25 { @@ -426,7 +433,6 @@ regulator-name = "LCD_VCC_3.3V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-mem-idle; }; ldo26_reg: ldo26 { @@ -434,7 +440,6 @@ regulator-name = "MOTOR_VCC_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - regulator-mem-idle; }; buck1_reg: buck1 { @@ -444,7 +449,9 @@ regulator-max-microvolt = <1100000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck2_reg: buck2 { @@ -454,7 +461,9 @@ regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck3_reg: buck3 { @@ -464,7 +473,9 @@ regulator-max-microvolt = <1150000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck4_reg: buck4 { @@ -473,7 +484,9 @@ regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck5_reg: buck5 { @@ -512,7 +525,6 @@ regulator-name = "CAM_ISP_CORE_1.2V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1200000>; - regulator-mem-off; }; }; }; -- cgit v1.2.3 From faf9a3eaa1226bea07c8637e993f063fb128b615 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:54 +0900 Subject: ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 Remove fixed regulators (duplicating what max77686 provides) and add GPIO enable control to max77686 regulators. This gives the system full control over those regulators. Previously the state of such regulators was a mixture of what max77686 driver set over I2C and what regulator-fixed set through GPIO. Removal of 'regulator-always-on' from CAM_ISP_CORE_1.2V (buck9) allows disabling it when it is not used. Previously this regulator was always enabled because its enable state is a OR of: - ENB9 GPIO (turned always on by regulator-fixed), - BUCK9EN field in BUCK9CTRL register (off by max77686 through I2C). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 25 +++++-------------------- 1 file changed, 5 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 7ea8b7dce0cb..8072d9002945 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -58,15 +58,6 @@ #address-cells = <1>; #size-cells = <0>; - vemmc_reg: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "VMEM_VDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpk0 2 0>; - enable-active-high; - }; - cam_io_reg: voltage-regulator-1 { compatible = "regulator-fixed"; regulator-name = "CAM_SENSOR_A"; @@ -94,16 +85,6 @@ enable-active-high; }; - cam_isp_core_reg: voltage-regulator-4 { - compatible = "regulator-fixed"; - regulator-name = "CAM_ISP_CORE_1.2V_EN"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - gpio = <&gpm0 3 0>; - enable-active-high; - regulator-always-on; - }; - ps_als_reg: voltage-regulator-5 { compatible = "regulator-fixed"; regulator-name = "LED_A_3.0V"; @@ -405,6 +386,7 @@ regulator-name = "VTF_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; + maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; }; ldo22_reg: ldo22 { @@ -412,6 +394,7 @@ regulator-name = "VMEM_VDD_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; + maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; }; ldo23_reg: ldo23 { @@ -518,6 +501,7 @@ regulator-name = "VMEM_VDDF_3.0V"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; + maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; }; buck9_reg: buck9 { @@ -525,6 +509,7 @@ regulator-name = "CAM_ISP_CORE_1.2V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1200000>; + maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>; }; }; }; @@ -587,7 +572,7 @@ broken-cd; non-removable; card-detect-delay = <200>; - vmmc-supply = <&vemmc_reg>; + vmmc-supply = <&ldo22_reg>; clock-frequency = <400000000>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 3>; -- cgit v1.2.3 From 043ef1485fccd2c5ba36f6a9532b4a9697148150 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:47:39 +0900 Subject: ARM: dts: Add max77693 charger node for exynos4412-trats2 Add to Trats2 DTS new node for configuring the max77693 charger driver. Only the maxim,constant-microvolt differs from default value but set all of the optional properties anyway. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 8072d9002945..0976f4d464af 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -548,6 +548,16 @@ haptic-supply = <&ldo26_reg>; pwms = <&pwm 0 38022 0>; }; + + charger { + compatible = "maxim,max77693-charger"; + + maxim,constant-microvolt = <4350000>; + maxim,min-system-microvolt = <3600000>; + maxim,thermal-regulation-celsius = <100>; + maxim,battery-overcurrent-microamp = <3500000>; + maxim,charge-input-threshold-microvolt = <4300000>; + }; }; }; -- cgit v1.2.3 From 79f3c37c8859d973b39b64200f7bbc2a66de057c Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:49:08 +0900 Subject: ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi Assign proper FIMC-IS UART gate clock in the device DT node and not use the SRC_MASK gate. This fixes regression introduced in commit a37c82a3b3c0910019abfd22a97be1f ("clk: samsung: exynos4: Remove SRC_MASK_ISP gates"). Without this change exynos4 fimc-is driver fails to probe with an error log: [ 1.842447] ERROR: could not get clock /camera/fimc-is@12000000:uart(13) [ 1.848529] exynos4-fimc-is 12000000.fimc-is: failed to get clock: uart [ 1.855275] exynos4-fimc-is: probe of 12000000.fimc-is failed with error -2 Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index da8734e25f50..af59cab53bd9 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -226,7 +226,7 @@ <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, <&clock CLK_DIV_MCUISP0>, <&clock CLK_DIV_MCUISP1>, - <&clock CLK_SCLK_UART_ISP>, + <&clock CLK_UART_ISP_SCLK>, <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>, <&clock CLK_ACLK400_MCUISP>, <&clock CLK_DIV_ACLK400_MCUISP>; -- cgit v1.2.3 From cfe3b8933cdede8bc8cc3c03931908bb17a114f4 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:49:49 +0900 Subject: ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 In order to get exact 24MHz clock frequency value for the camera sensor and avoid rounding errors the parent clock must be CLK_XUSBXTI, not CLK_MOUT_MPLL_USER_T. Currently the sensor's master clock frequency is too high and the sensor doesn't work properly. This fixes commit 0357a4438d531ef3cf529e80ffcd208eb8e35f55 ("ARM: dts: Specify default clocks for Exynos4 camera devices"). Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 0976f4d464af..344eaa78d236 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -746,8 +746,8 @@ status = "okay"; assigned-clocks = <&clock CLK_MOUT_CAM0>, <&clock CLK_MOUT_CAM1>; - assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>, - <&clock CLK_MOUT_MPLL_USER_T>; + assigned-clock-parents = <&clock CLK_XUSBXTI>, + <&clock CLK_XUSBXTI>; fimc_0: fimc@11800000 { status = "okay"; -- cgit v1.2.3 From 440e5aefa7d6efd46f2c166cc9410237847f7721 Mon Sep 17 00:00:00 2001 From: Inha Song Date: Wed, 4 Feb 2015 07:51:38 +0900 Subject: ARM: dts: Add sound nodes for exynos4412-trats2 This patch add WM1811 audio codec, I2S interface and the sound machine nodes to enable audio on exynos4412-trats2 board. Signed-off-by: Inha Song Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 42 +++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 344eaa78d236..3de457393416 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -186,6 +186,25 @@ }; }; + i2c@138A0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + pinctrl-0 = <&i2c4_bus>; + pinctrl-names = "default"; + status = "okay"; + + wm1811: wm1811@1a { + compatible = "wlf,wm1811"; + reg = <0x1a>; + clocks = <&pmu_system_controller 0>; + clock-names = "MCLK1"; + DCVDD-supply = <&ldo3_reg>; + DBVDD1-supply = <&ldo3_reg>; + wlf,ldo1ena = <&gpj0 4 0>; + }; + }; + i2c@138D0000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; @@ -863,6 +882,24 @@ }; }; + i2s0: i2s@03830000 { + pinctrl-0 = <&i2s0_bus>; + pinctrl-names = "default"; + status = "okay"; + }; + + sound { + compatible = "samsung,trats2-audio"; + samsung,i2s-controller = <&i2s0>; + samsung,model = "Trats2"; + samsung,audio-codec = <&wm1811>; + samsung,audio-routing = + "SPK", "SPKOUTLN", + "SPK", "SPKOUTLP", + "SPK", "SPKOUTRN", + "SPK", "SPKOUTRP"; + }; + exynos-usbphy@125B0000 { status = "okay"; }; @@ -891,6 +928,11 @@ }; }; +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_XUSBXTI>; +}; + &pinctrl_0 { pinctrl-names = "default"; pinctrl-0 = <&sleep0>; -- cgit v1.2.3 From c8ef0bee5f5395b1ac96225186d56fb35107a49a Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:58:24 +0900 Subject: ARM: dts: Add syscon phandle to the video-phy node for Exynos4 This is required to fix regression after introducing the PMU device nodes required for the PMU driver modified in commit 14fc8b93d473 ("ARM: EXYNOS: Add platform driver support for Exynos PMU"). This change is needed to make MIPI DSI displays and MIPI CSI-2 camera sensors working again on Exynos4 boards. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c5dc2efb99ed..8e73b67fd628 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -76,6 +76,7 @@ compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10020710 8>; #phy-cells = <1>; + syscon = <&pmu_system_controller>; }; pd_mfc: mfc-power-domain@10023C40 { -- cgit v1.2.3 From 6c7c87a3827a992ec89bcea8a00c8531dd57801c Mon Sep 17 00:00:00 2001 From: YoungJun Cho Date: Wed, 4 Feb 2015 08:05:20 +0900 Subject: ARM: dts: add fimd device node for exynos4415 This patch adds fimd device node to exynos4415.dtsi. Signed-off-by: YoungJun Cho Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4415.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index 2007def1ab43..7f364bb45dac 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi @@ -241,6 +241,18 @@ interrupts = <0 240 0>; }; + fimd: fimd@11C00000 { + compatible = "samsung,exynos4415-fimd"; + reg = <0x11C00000 0x30000>; + interrupt-names = "fifo", "vsync", "lcd_sys"; + interrupts = <0 84 0>, <0 85 0>, <0 86 0>; + clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; + clock-names = "sclk_fimd", "fimd"; + samsung,power-domain = <&pd_lcd0>; + samsung,sysreg = <&sysreg_system_controller>; + status = "disabled"; + }; + hsotg: hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; -- cgit v1.2.3 From 59f504dc2504fb2198b3c685b0f1a4b6cc2b7edf Mon Sep 17 00:00:00 2001 From: YoungJun Cho Date: Wed, 4 Feb 2015 08:05:20 +0900 Subject: ARM: dts: add mipi dsi device node for exynos4415 This patch adds mipi dsi device node to exynos4415.dtsi. Signed-off-by: YoungJun Cho Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4415.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index 7f364bb45dac..5caea996e090 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi @@ -253,6 +253,21 @@ status = "disabled"; }; + dsi_0: dsi@11C80000 { + compatible = "samsung,exynos4415-mipi-dsi"; + reg = <0x11C80000 0x10000>; + interrupts = <0 83 0>; + samsung,phy-type = <0>; + samsung,power-domain = <&pd_lcd0>; + phys = <&mipi_phy 1>; + phy-names = "dsim"; + clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; + clock-names = "bus_clk", "pll_clk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + hsotg: hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; -- cgit v1.2.3 From e4502367a0367a7eee6b710a6e490315d16a076b Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU dt node for exynos3250 This patch adds PPMU (Platform Performance Monitoring Unit) dt node to estimate the utilization of each IP in Exynos SoC through DEVFREQ Event subsystem. This patch adds following PPMU dt nodes: - PPMU_DMC0 0x106a0000 - PPMU_DMC1 0x106b0000 - PPMU_RIGHTBUS 0x112A0000 - PPMU_LEFTBUS 0x116A0000 - PPMU_CAMIF 0x11AC0000 - PPMU_LCD0 0x11E40000 - PPMU_FSYS 0x12630000 - PPMU_3D 0x13220000 - PPMU_MFC 0x13660000 - PPMU_CPU 0x106c0000 Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250.dtsi | 74 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index acdf34401015..277b48b0b6f9 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -541,6 +541,80 @@ compatible = "arm,cortex-a7-pmu"; interrupts = <0 18 0>, <0 19 0>; }; + + ppmu_dmc0: ppmu_dmc0@106a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106a0000 0x2000>; + status = "disabled"; + }; + + ppmu_dmc1: ppmu_dmc1@106b0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106b0000 0x2000>; + status = "disabled"; + }; + + ppmu_cpu: ppmu_cpu@106c0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106c0000 0x2000>; + status = "disabled"; + }; + + ppmu_rightbus: ppmu_rightbus@112a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x112a0000 0x2000>; + clocks = <&cmu CLK_PPMURIGHT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_leftbus: ppmu_leftbus0@116a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x116a0000 0x2000>; + clocks = <&cmu CLK_PPMULEFT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_camif: ppmu_camif@11ac0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11ac0000 0x2000>; + clocks = <&cmu CLK_PPMUCAMIF>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_lcd0: ppmu_lcd0@11e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11e40000 0x2000>; + clocks = <&cmu CLK_PPMULCD0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_fsys: ppmu_fsys@12630000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12630000 0x2000>; + clocks = <&cmu CLK_PPMUFILE>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_g3d: ppmu_g3d@13220000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13220000 0x2000>; + clocks = <&cmu CLK_PPMUG3D>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc: ppmu_mfc@13660000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13660000 0x2000>; + clocks = <&cmu CLK_PPMUMFC_L>; + clock-names = "ppmu"; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From 30e0e476ae4218c4310765cdcb1775599d089270 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU dt node for exynos4 and exynos4210 This patch add PPMUs (Platform Performance Monitoring Unit) dt node for Exynos4 (Exynos4210/4212/4412) SoCs. PPMU dt node is used for monitor the utilization of each IP. The Exynos4210/Exynos4212/Exynos4412 SoC includes following PPMUs: - PPMU_DMC0 0x106A_0000 - PPMU_DMC1 0x106B_0000 - PPMU_CPU 0x106C_0000 - PPMU_ACP 0x10AE_0000 - PPMU_RIGHT_BUS 0x112A_0000 - PPMU_LEFT_BUS 0x116A_0000 - PPMU_FSYS 0x1263_0000 - PPMU_LCD0 0x11E4_0000 - PPMU_CAMIF 0x11AC_0000 - PPMU_IMAGE 0x12AA_0000 - PPMU_TV 0x12E4_0000 - PPMU_3D 0x1322_0000 - PPMU_MFC_LEFT 0x1366_0000 - PPMU_MFC_RIGHT 0x1367_0000 Additionally, the Exynos4210 SoC includes following PPMUs: - PPMU_LCD1 0x1224_0000 Signed-off-by: Chanwoo Choi Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 108 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 8 +++ 2 files changed, 116 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 8e73b67fd628..d1759bf5202f 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -653,4 +653,112 @@ samsung,sysreg = <&sys_reg>; status = "disabled"; }; + + ppmu_dmc0: ppmu_dmc0@106a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106a0000 0x2000>; + clocks = <&clock CLK_PPMUDMC0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_dmc1: ppmu_dmc1@106b0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106b0000 0x2000>; + clocks = <&clock CLK_PPMUDMC1>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_cpu: ppmu_cpu@106c0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106c0000 0x2000>; + clocks = <&clock CLK_PPMUCPU>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_acp: ppmu_acp@10ae0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106e0000 0x2000>; + status = "disabled"; + }; + + ppmu_rightbus: ppmu_rightbus@112a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x112a0000 0x2000>; + clocks = <&clock CLK_PPMURIGHT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_leftbus: ppmu_leftbus0@116a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x116a0000 0x2000>; + clocks = <&clock CLK_PPMULEFT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_camif: ppmu_camif@11ac0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11ac0000 0x2000>; + clocks = <&clock CLK_PPMUCAMIF>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_lcd0: ppmu_lcd0@11e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11e40000 0x2000>; + clocks = <&clock CLK_PPMULCD0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_fsys: ppmu_g3d@12630000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12630000 0x2000>; + status = "disabled"; + }; + + ppmu_image: ppmu_image@12aa0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12aa0000 0x2000>; + clocks = <&clock CLK_PPMUIMAGE>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_tv: ppmu_tv@12e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12e40000 0x2000>; + clocks = <&clock CLK_PPMUTV>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_g3d: ppmu_g3d@13220000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13220000 0x2000>; + clocks = <&clock CLK_PPMUG3D>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_left: ppmu_mfc_left@13660000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13660000 0x2000>; + clocks = <&clock CLK_PPMUMFC_L>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_right: ppmu_mfc_right@13670000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13670000 0x2000>; + clocks = <&clock CLK_PPMUMFC_R>; + clock-names = "ppmu"; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6728aaa2af9d..7c15880bc8ba 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -193,4 +193,12 @@ samsung,lcd-wb; }; }; + + ppmu_lcd1: ppmu_lcd1@12240000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12240000 0x2000>; + clocks = <&clock CLK_PPMULCD1>; + clock-names = "ppmu"; + status = "disabled"; + }; }; -- cgit v1.2.3 From 8d6b9b46942daf8acdd1a9ae04a1e3ba5a843f97 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato This patch adds PPMU dt node for Exynos3250 based Rinato and Monk boards. The PPMU node is used to get the utilization of DMC0/DMC1/ LEFTBUS/RIGHTBUS Block. Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 40 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos3250-rinato.dts | 40 +++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index d9a6dd525791..1d483c1c8b48 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -437,6 +437,46 @@ status = "okay"; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &xusbxti { clock-frequency = <24000000>; }; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index af7589efa567..0b9906880c0c 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -610,6 +610,46 @@ status = "okay"; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &xusbxti { clock-frequency = <24000000>; }; -- cgit v1.2.3 From 7808cae3e97140781eb3f712084caf4e44c126c9 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:11:52 +0900 Subject: ARM: dts: Add PPMU node for exynos4412-trats2 This patch add dt node for PPMU_{DMC0|DMC1|LEFTBUS|RIGHTBUS} for exynos4412-trats2 board. Each PPMU dt node includes one event of 'PPMU Count3'. Cc: Kyungmin Park Signed-off-by: Chanwoo Choi Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 40 +++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 3de457393416..d3b3f4f4653e 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -933,6 +933,46 @@ assigned-clock-parents = <&clock CLK_XUSBXTI>; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &pinctrl_0 { pinctrl-names = "default"; pinctrl-0 = <&sleep0>; -- cgit v1.2.3