From 7a8e4158bf6700607bf361dfbaaac7c901f1134a Mon Sep 17 00:00:00 2001 From: Thomas Meyer Date: Thu, 21 Sep 2017 00:29:36 +0200 Subject: MIPS: Cocci spatch "vma_pages" Use vma_pages function on vma object instead of explicit computation. Found by coccinelle spatch "api/vma_pages.cocci" Signed-off-by: Thomas Meyer Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17333/ Signed-off-by: Ralf Baechle --- arch/mips/mm/dma-default.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index c01bd20d0208..bfd504c92719 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -179,7 +179,7 @@ static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, unsigned long attrs) { - unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; + unsigned long user_count = vma_pages(vma); unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; unsigned long addr = (unsigned long)cpu_addr; unsigned long off = vma->vm_pgoff; -- cgit v1.2.3 From 7fd60db5b39f9498e97589557ec6356b2e50a6ac Mon Sep 17 00:00:00 2001 From: Harvey Hunt Date: Tue, 19 Sep 2017 13:12:01 +0100 Subject: MIPS: Ci20: Add support for rootfs on NFS to defconfig Now that ethernet support is in the kernel, add the option to use a rootfs over NFS to enable automated testing of upstream kernels on a Ci20. Signed-off-by: Harvey Hunt Signed-off-by: James Hogan Cc: Harvey Hunt Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17314/ Signed-off-by: Ralf Baechle --- arch/mips/configs/ci20_defconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index 5ea3104a3aca..a1a1f797ba2e 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -38,6 +38,8 @@ CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set @@ -110,7 +112,8 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_CONFIGFS_FS=y CONFIG_UBIFS_FS=y -# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NFS_FS=y +CONFIG_ROOT_NFS=y CONFIG_NLS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_737=y -- cgit v1.2.3 From 508c5757a72873d007e932faff5fa0014b25812d Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Mon, 18 Sep 2017 13:38:40 +0200 Subject: MIPS: make thread_saved_pc static The only user of thread_saved_pc() in non-arch-specific code was removed in commit 8243d5597793 ("sched/core: Remove pointless printout in sched_show_task()"), so it no longer needs to be globally defined for MIPS and can be made static. Signed-off-by: Tobias Klauser Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17303/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/processor.h | 2 -- arch/mips/kernel/process.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index 95b8c471f572..af34afbc32d9 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -368,8 +368,6 @@ struct task_struct; /* Free all resources held by a thread. */ #define release_thread(thread) do { } while(0) -extern unsigned long thread_saved_pc(struct task_struct *tsk); - /* * Do necessary setup to start up a newly executed thread. */ diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index c5ff6bfe2825..45d0b6b037ee 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -487,7 +487,7 @@ arch_initcall(frame_info_init); /* * Return saved PC of a blocked thread. */ -unsigned long thread_saved_pc(struct task_struct *tsk) +static unsigned long thread_saved_pc(struct task_struct *tsk) { struct thread_struct *t = &tsk->thread; -- cgit v1.2.3 From 34ae9c915f9d12f1ddaa19a23fb3e8984e6a1098 Mon Sep 17 00:00:00 2001 From: Chad Reese Date: Fri, 15 Sep 2017 12:31:28 -0500 Subject: MIPS: Add nudges to writes for bit unlocks. Flushing the writes lets other CPUs waiting for the lock to get it sooner. Signed-off-by: Chad Reese Signed-off-by: David Daney Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17289/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/bitops.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index fa57cef12a46..da1b8718861e 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -456,6 +456,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long * { smp_mb__before_llsc(); __clear_bit(nr, addr); + nudge_writes(); } /* -- cgit v1.2.3 From ac4f59f88ae84874ac444c742e87b7bf98387e8f Mon Sep 17 00:00:00 2001 From: Steven J. Hill Date: Fri, 15 Sep 2017 12:02:55 -0500 Subject: MIPS: Remove unused variable 'lastpfn' 'lastpfn' is never used for anything. Remove it. Signed-off-by: Steven J. Hill Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17276/ Signed-off-by: Ralf Baechle --- arch/mips/mm/init.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 5f6ea7d746de..84b7b592b834 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -402,7 +402,6 @@ int page_is_ram(unsigned long pagenr) void __init paging_init(void) { unsigned long max_zone_pfns[MAX_NR_ZONES]; - unsigned long lastpfn __maybe_unused; pagetable_init(); @@ -416,17 +415,14 @@ void __init paging_init(void) max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; #endif max_zone_pfns[ZONE_NORMAL] = max_low_pfn; - lastpfn = max_low_pfn; #ifdef CONFIG_HIGHMEM max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; - lastpfn = highend_pfn; if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { printk(KERN_WARNING "This processor doesn't support highmem." " %ldk highmem ignored\n", (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; - lastpfn = max_low_pfn; } #endif -- cgit v1.2.3 From e7af4d14e234d2ca9cb84ca56a976537fac4fec2 Mon Sep 17 00:00:00 2001 From: Mathieu Malaterre Date: Fri, 15 Sep 2017 21:17:54 +0200 Subject: MIPS: Ci20: Enable watchdog driver Update the Ci20's defconfig to enable the JZ4740's watchdog driver. Signed-off-by: Mathieu Malaterre Cc: Krzysztof Kozlowski Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17290/ Signed-off-by: Ralf Baechle --- arch/mips/configs/ci20_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index a1a1f797ba2e..b5f4ad8f2c45 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -95,6 +95,8 @@ CONFIG_I2C_JZ4780=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_INGENIC=y # CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_JZ4740_WDT=y CONFIG_REGULATOR=y CONFIG_REGULATOR_DEBUG=y CONFIG_REGULATOR_FIXED_VOLTAGE=y -- cgit v1.2.3 From 239e14d1952942bd902dcd09d93c80e7f2a76637 Mon Sep 17 00:00:00 2001 From: Mathieu Malaterre Date: Fri, 15 Sep 2017 21:18:36 +0200 Subject: MIPS: jz4780: DTS: Probe the jz4740-watchdog driver from devicetree The jz4740-watchdog driver supports both jz4740 & jz4780. Signed-off-by: Mathieu Malaterre Cc: Rob Herring Cc: Mark Rutland Cc: Linus Walleij Cc: Paul Cercueil Cc: PrasannaKumar Muralidharan Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17291/ Signed-off-by: Ralf Baechle --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index e906134ecaef..c4dbd44fdcd6 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -218,6 +218,11 @@ status = "disabled"; }; + watchdog: watchdog@10002000 { + compatible = "ingenic,jz4780-watchdog"; + reg = <0x10002000 0x100>; + }; + nemc: nemc@13410000 { compatible = "ingenic,jz4780-nemc"; reg = <0x13410000 0x10000>; -- cgit v1.2.3 From 7820b84be844d8d863122b1323f2a4bc2441b783 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 28 Sep 2017 12:34:04 -0500 Subject: MIPS: Allow __cpu_number_map to be larger than NR_CPUS In systems where the CPU id space is sparse, this allows a smaller NR_CPUS to be chosen, thus keeping internal data structures smaller. Signed-off-by: David Daney Signed-off-by: Carlos Munoz Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17388/ [jhogan@kernel.org: Add depends on SMP to fix "warning: symbol value '' invalid for MIPS_NR_CPU_NR_MAP"] Signed-off-by: James Hogan --- arch/mips/Kconfig | 12 +++++++++++- arch/mips/include/asm/smp.h | 2 +- arch/mips/kernel/smp.c | 2 +- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4216fd..b6af63fb8544 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -915,7 +915,8 @@ config CAVIUM_OCTEON_SOC select USE_OF select ARCH_SPARSEMEM_ENABLE select SYS_SUPPORTS_SMP - select NR_CPUS_DEFAULT_16 + select NR_CPUS_DEFAULT_64 + select MIPS_NR_CPU_NR_MAP_1024 select BUILTIN_DTB select MTD_COMPLEX_MAPPINGS select SYS_SUPPORTS_RELOCATABLE @@ -2725,6 +2726,15 @@ config NR_CPUS config MIPS_PERF_SHARED_TC_COUNTERS bool +config MIPS_NR_CPU_NR_MAP_1024 + bool + +config MIPS_NR_CPU_NR_MAP + int + depends on SMP + default 1024 if MIPS_NR_CPU_NR_MAP_1024 + default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 + # # Timer Interrupt Frequency Configuration # diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index 9e494f8d9c03..88ebd83b3bf9 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -29,7 +29,7 @@ extern cpumask_t cpu_foreign_map[]; /* Map from cpu id to sequential logical cpu number. This will only not be idempotent when cpus failed to come on-line. */ -extern int __cpu_number_map[NR_CPUS]; +extern int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; #define cpu_number_map(cpu) __cpu_number_map[cpu] /* The reverse map from sequential logical cpu number to cpu id. */ diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index bbe19b64def5..5576888e4a2a 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -48,7 +48,7 @@ #include #include -int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ +int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; /* Map physical to logical */ EXPORT_SYMBOL(__cpu_number_map); int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ -- cgit v1.2.3 From edf188bee1d908ea8181d2067ddaeefab9264688 Mon Sep 17 00:00:00 2001 From: Steven J. Hill Date: Thu, 28 Sep 2017 12:34:05 -0500 Subject: MIPS: Octeon: Remove usage of cvmx_wait() everywhere. Signed-off-by: Steven J. Hill Acked-by: David Daney Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17389/ Signed-off-by: James Hogan --- arch/mips/cavium-octeon/executive/cvmx-helper.c | 2 +- arch/mips/cavium-octeon/executive/cvmx-spi.c | 10 +++++----- arch/mips/include/asm/octeon/cvmx-fpa.h | 4 +++- arch/mips/include/asm/octeon/cvmx.h | 15 ++------------- arch/mips/pci/pcie-octeon.c | 12 ++++++------ 5 files changed, 17 insertions(+), 26 deletions(-) diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c index f24be0b5db50..75108ec669eb 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c @@ -862,7 +862,7 @@ int __cvmx_helper_errata_fix_ipd_ptr_alignment(void) */ cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), 0); - cvmx_wait(100000000ull); + __delay(100000000ull); for (retry_loop_cnt = 0; retry_loop_cnt < 10; retry_loop_cnt++) { retry_cnt = 100000; diff --git a/arch/mips/cavium-octeon/executive/cvmx-spi.c b/arch/mips/cavium-octeon/executive/cvmx-spi.c index 459e3b1eb61f..f51957a3e915 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-spi.c +++ b/arch/mips/cavium-octeon/executive/cvmx-spi.c @@ -215,7 +215,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode) spxx_clk_ctl.u64 = 0; spxx_clk_ctl.s.runbist = 1; cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); - cvmx_wait(10 * MS); + __delay(10 * MS); spxx_bist_stat.u64 = cvmx_read_csr(CVMX_SPXX_BIST_STAT(interface)); if (spxx_bist_stat.s.stat0) cvmx_dprintf @@ -265,14 +265,14 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode) spxx_clk_ctl.s.rcvtrn = 0; spxx_clk_ctl.s.srxdlck = 0; cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); - cvmx_wait(100 * MS); + __delay(100 * MS); /* Reset SRX0 DLL */ spxx_clk_ctl.s.srxdlck = 1; cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); /* Waiting for Inf0 Spi4 RX DLL to lock */ - cvmx_wait(100 * MS); + __delay(100 * MS); /* Enable dynamic alignment */ spxx_trn4_ctl.s.trntest = 0; @@ -527,7 +527,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout) spxx_clk_ctl.s.rcvtrn = 1; spxx_clk_ctl.s.srxdlck = 1; cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); - cvmx_wait(1000 * MS); + __delay(1000 * MS); /* SRX0 clear the boot bit */ spxx_trn4_ctl.u64 = cvmx_read_csr(CVMX_SPXX_TRN4_CTL(interface)); @@ -536,7 +536,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout) /* Wait for the training sequence to complete */ cvmx_dprintf("SPI%d: Waiting for training\n", interface); - cvmx_wait(1000 * MS); + __delay(1000 * MS); /* Wait a really long time here */ timeout_time = cvmx_get_cycle() + 1000ull * MS * 600; /* diff --git a/arch/mips/include/asm/octeon/cvmx-fpa.h b/arch/mips/include/asm/octeon/cvmx-fpa.h index c00501d0f7ae..29ae63606ab4 100644 --- a/arch/mips/include/asm/octeon/cvmx-fpa.h +++ b/arch/mips/include/asm/octeon/cvmx-fpa.h @@ -36,6 +36,8 @@ #ifndef __CVMX_FPA_H__ #define __CVMX_FPA_H__ +#include + #include #include @@ -165,7 +167,7 @@ static inline void cvmx_fpa_enable(void) } /* Enforce a 10 cycle delay between config and enable */ - cvmx_wait(10); + __delay(10); } /* FIXME: CVMX_FPA_CTL_STATUS read is unmodelled */ diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 205ab2ce10f8..25854abc95f8 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -30,6 +30,7 @@ #include #include +#include enum cvmx_mips_space { CVMX_MIPS_SPACE_XKSEG = 3LL, @@ -428,18 +429,6 @@ static inline uint64_t cvmx_get_cycle(void) return cycle; } -/** - * Wait for the specified number of cycle - * - */ -static inline void cvmx_wait(uint64_t cycles) -{ - uint64_t done = cvmx_get_cycle() + cycles; - - while (cvmx_get_cycle() < done) - ; /* Spin */ -} - /** * Reads a chip global cycle counter. This counts CPU cycles since * chip reset. The counter is 64 bit. @@ -481,7 +470,7 @@ static inline uint64_t cvmx_get_cycle_global(void) result = -1; \ break; \ } else \ - cvmx_wait(100); \ + __delay(100); \ } \ } while (0); \ result; \ diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c index fd2887415bc8..87ba86bd8696 100644 --- a/arch/mips/pci/pcie-octeon.c +++ b/arch/mips/pci/pcie-octeon.c @@ -639,7 +639,7 @@ static int __cvmx_pcie_rc_initialize_link_gen1(int pcie_port) cvmx_dprintf("PCIe: Port %d link timeout\n", pcie_port); return -1; } - cvmx_wait(10000); + __delay(10000); pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); } while (pciercx_cfg032.s.dlla == 0); @@ -821,7 +821,7 @@ retry: * don't poll PESCX_CTL_STATUS2[PCIERST], but simply wait a * fixed number of cycles. */ - cvmx_wait(400000); + __delay(400000); /* * PESCX_BIST_STATUS2[PCLK_RUN] was missing on pass 1 of @@ -1018,7 +1018,7 @@ retry: i = in_p_offset; while (i--) { cvmx_write64_uint32(write_address, 0); - cvmx_wait(10000); + __delay(10000); } /* @@ -1034,7 +1034,7 @@ retry: dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA); old_in_fif_p_count = dbg_data.s.data & 0xff; cvmx_write64_uint32(write_address, 0); - cvmx_wait(10000); + __delay(10000); dbg_data.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_DBG_DATA); in_fif_p_count = dbg_data.s.data & 0xff; } while (in_fif_p_count != ((old_in_fif_p_count+1) & 0xff)); @@ -1053,7 +1053,7 @@ retry: cvmx_dprintf("PCIe: Port %d aligning TLP counters as workaround to maintain ordering\n", pcie_port); while (in_fif_p_count != 0) { cvmx_write64_uint32(write_address, 0); - cvmx_wait(10000); + __delay(10000); in_fif_p_count = (in_fif_p_count + 1) & 0xff; } /* @@ -1105,7 +1105,7 @@ static int __cvmx_pcie_rc_initialize_link_gen2(int pcie_port) do { if (cvmx_get_cycle() - start_cycle > octeon_get_clock_rate()) return -1; - cvmx_wait(10000); + __delay(10000); pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); } while ((pciercx_cfg032.s.dlla == 0) || (pciercx_cfg032.s.lt == 1)); -- cgit v1.2.3 From 409fcace9963c1e8d2cb0f7ac62e8b34d47ef979 Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Thu, 2 Nov 2017 12:13:58 +0100 Subject: MIPS: math-emu: Fix final emulation phase for certain instructions Fix final phase of . emulation. Provide proper generation of SIGFPE signal and updating debugfs FP exception stats in cases of any exception flags set in preceding phases of emulation. CLASS. instruction may generate "Unimplemented Operation" FP exception. . instructions may generate "Inexact", "Unimplemented Operation", "Invalid Operation", "Overflow", and "Underflow" FP exceptions. . instructions can generate "Unimplemented Operation" and "Invalid Operation" FP exceptions. The proper final processing of the cases when any FP exception flag is set is achieved by replacing "break" statement with "goto copcsr" statement. With such solution, this patch brings the final phase of emulation of the above instructions consistent with the one corresponding to the previously implemented emulation of other related FPU instructions (ADD, SUB, etc.). Fixes: 38db37ba069f ("MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction") Fixes: e24c3bec3e8e ("MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction") Fixes: 83d43305a1df ("MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction") Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") Signed-off-by: Aleksandar Markovic Cc: Ralf Baechle Cc: Douglas Leung Cc: Goran Ferenc Cc: "Maciej W. Rozycki" Cc: Miodrag Dinic Cc: Paul Burton Cc: Petar Jovanovic Cc: Raghu Gandham Cc: linux-mips@linux-mips.org Cc: # 4.3+ Patchwork: https://patchwork.linux-mips.org/patch/17581/ Signed-off-by: James Hogan --- arch/mips/math-emu/cp1emu.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 192542dbd972..d2fcb3084279 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1795,7 +1795,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fd, MIPSInst_FD(ir)); rv.s = ieee754sp_maddf(fd, fs, ft); - break; + goto copcsr; } case fmsubf_op: { @@ -1809,7 +1809,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fd, MIPSInst_FD(ir)); rv.s = ieee754sp_msubf(fd, fs, ft); - break; + goto copcsr; } case frint_op: { @@ -1834,7 +1834,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(fs, MIPSInst_FS(ir)); rv.w = ieee754sp_2008class(fs); rfmt = w_fmt; - break; + goto copcsr; } case fmin_op: { @@ -1847,7 +1847,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(fs, MIPSInst_FS(ir)); rv.s = ieee754sp_fmin(fs, ft); - break; + goto copcsr; } case fmina_op: { @@ -1860,7 +1860,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(fs, MIPSInst_FS(ir)); rv.s = ieee754sp_fmina(fs, ft); - break; + goto copcsr; } case fmax_op: { @@ -1873,7 +1873,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(fs, MIPSInst_FS(ir)); rv.s = ieee754sp_fmax(fs, ft); - break; + goto copcsr; } case fmaxa_op: { @@ -1886,7 +1886,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(fs, MIPSInst_FS(ir)); rv.s = ieee754sp_fmaxa(fs, ft); - break; + goto copcsr; } case fabs_op: @@ -2165,7 +2165,7 @@ copcsr: DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fd, MIPSInst_FD(ir)); rv.d = ieee754dp_maddf(fd, fs, ft); - break; + goto copcsr; } case fmsubf_op: { @@ -2179,7 +2179,7 @@ copcsr: DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fd, MIPSInst_FD(ir)); rv.d = ieee754dp_msubf(fd, fs, ft); - break; + goto copcsr; } case frint_op: { @@ -2204,7 +2204,7 @@ copcsr: DPFROMREG(fs, MIPSInst_FS(ir)); rv.l = ieee754dp_2008class(fs); rfmt = l_fmt; - break; + goto copcsr; } case fmin_op: { @@ -2217,7 +2217,7 @@ copcsr: DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(fs, MIPSInst_FS(ir)); rv.d = ieee754dp_fmin(fs, ft); - break; + goto copcsr; } case fmina_op: { @@ -2230,7 +2230,7 @@ copcsr: DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(fs, MIPSInst_FS(ir)); rv.d = ieee754dp_fmina(fs, ft); - break; + goto copcsr; } case fmax_op: { @@ -2243,7 +2243,7 @@ copcsr: DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(fs, MIPSInst_FS(ir)); rv.d = ieee754dp_fmax(fs, ft); - break; + goto copcsr; } case fmaxa_op: { @@ -2256,7 +2256,7 @@ copcsr: DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(fs, MIPSInst_FS(ir)); rv.d = ieee754dp_fmaxa(fs, ft); - break; + goto copcsr; } case fabs_op: -- cgit v1.2.3 From a58f85b5d5bbe44ee9dc8eae03a4f21fa3e087cc Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Thu, 2 Nov 2017 12:13:59 +0100 Subject: MIPS: math-emu: Use preferred flavor of unsigned integer declarations Fix occurences of unsigned integer variable declarations that are not preferred by standards of checkpatch scripts. This removes a significant number of checkpatch warnings for files in math-emu directory (several files become completely warning-free), and thus makes easier to spot (now and in the future) other, perhaps more significant, checkpatch errors and warnings. Signed-off-by: Aleksandar Markovic Reviewed-by: James Hogan Cc: Ralf Baechle Cc: Douglas Leung Cc: Goran Ferenc Cc: "Maciej W. Rozycki" Cc: Manuel Lauss Cc: Miodrag Dinic Cc: Paul Burton Cc: Petar Jovanovic Cc: Raghu Gandham Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17582/ Signed-off-by: James Hogan --- arch/mips/math-emu/cp1emu.c | 18 ++++++++++-------- arch/mips/math-emu/dp_maddf.c | 8 ++++---- arch/mips/math-emu/dp_mul.c | 8 ++++---- arch/mips/math-emu/dp_sqrt.c | 4 ++-- arch/mips/math-emu/ieee754.h | 15 ++++++++------- arch/mips/math-emu/ieee754int.h | 6 +++--- arch/mips/math-emu/ieee754sp.c | 4 ++-- arch/mips/math-emu/ieee754sp.h | 2 +- arch/mips/math-emu/sp_div.c | 4 ++-- arch/mips/math-emu/sp_fint.c | 2 +- arch/mips/math-emu/sp_maddf.c | 6 +++--- arch/mips/math-emu/sp_mul.c | 10 +++++----- 12 files changed, 45 insertions(+), 42 deletions(-) diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index d2fcb3084279..9f145e1a793a 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -810,7 +810,7 @@ do { \ #define SITOREG(si, x) \ do { \ if (cop1_64bit(xcp) && !hybrid_fprs()) { \ - unsigned i; \ + unsigned int i; \ set_fpr32(&ctx->fpr[x], 0, si); \ for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ set_fpr32(&ctx->fpr[x], i, 0); \ @@ -823,7 +823,7 @@ do { \ #define SITOHREG(si, x) \ do { \ - unsigned i; \ + unsigned int i; \ set_fpr32(&ctx->fpr[x], 1, si); \ for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ set_fpr32(&ctx->fpr[x], i, 0); \ @@ -834,7 +834,7 @@ do { \ #define DITOREG(di, x) \ do { \ - unsigned fpr, i; \ + unsigned int fpr, i; \ fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \ set_fpr64(&ctx->fpr[fpr], 0, di); \ for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \ @@ -1465,7 +1465,7 @@ DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, mips_instruction ir, void __user **fault_addr) { - unsigned rcsr = 0; /* resulting csr */ + unsigned int rcsr = 0; /* resulting csr */ MIPS_FPU_EMU_INC_STATS(cp1xops); @@ -1661,10 +1661,10 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, mips_instruction ir) { int rfmt; /* resulting format */ - unsigned rcsr = 0; /* resulting csr */ + unsigned int rcsr = 0; /* resulting csr */ unsigned int oldrm; unsigned int cbit; - unsigned cond; + unsigned int cond; union { union ieee754dp d; union ieee754sp s; @@ -2029,9 +2029,10 @@ copcsr: default: if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) { - unsigned cmpop = MIPSInst_FUNC(ir) - fcmp_op; + unsigned int cmpop; union ieee754sp fs, ft; + cmpop = MIPSInst_FUNC(ir) - fcmp_op; SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(ft, MIPSInst_FT(ir)); rv.w = ieee754sp_cmp(fs, ft, @@ -2379,9 +2380,10 @@ dcopuop: default: if (!NO_R6EMU && MIPSInst_FUNC(ir) >= fcmp_op) { - unsigned cmpop = MIPSInst_FUNC(ir) - fcmp_op; + unsigned int cmpop; union ieee754dp fs, ft; + cmpop = MIPSInst_FUNC(ir) - fcmp_op; DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(ft, MIPSInst_FT(ir)); rv.w = ieee754dp_cmp(fs, ft, diff --git a/arch/mips/math-emu/dp_maddf.c b/arch/mips/math-emu/dp_maddf.c index e0d9be5fbf4c..7ad79ed411f5 100644 --- a/arch/mips/math-emu/dp_maddf.c +++ b/arch/mips/math-emu/dp_maddf.c @@ -45,10 +45,10 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x, { int re; int rs; - unsigned lxm; - unsigned hxm; - unsigned lym; - unsigned hym; + unsigned int lxm; + unsigned int hxm; + unsigned int lym; + unsigned int hym; u64 lrm; u64 hrm; u64 lzm; diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c index 87d0b44b0614..60c8bfe40947 100644 --- a/arch/mips/math-emu/dp_mul.c +++ b/arch/mips/math-emu/dp_mul.c @@ -26,10 +26,10 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y) int re; int rs; u64 rm; - unsigned lxm; - unsigned hxm; - unsigned lym; - unsigned hym; + unsigned int lxm; + unsigned int hxm; + unsigned int lym; + unsigned int hym; u64 lrm; u64 hrm; u64 t; diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c index cd5bc083001e..cea907b83146 100644 --- a/arch/mips/math-emu/dp_sqrt.c +++ b/arch/mips/math-emu/dp_sqrt.c @@ -21,7 +21,7 @@ #include "ieee754dp.h" -static const unsigned table[] = { +static const unsigned int table[] = { 0, 1204, 3062, 5746, 9193, 13348, 18162, 23592, 29598, 36145, 43202, 50740, 58733, 67158, 75992, 85215, 83599, 71378, 60428, 50647, 41945, 34246, @@ -33,7 +33,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x) { struct _ieee754_csr oldcsr; union ieee754dp y, z, t; - unsigned scalx, yh; + unsigned int scalx, yh; COMPXDP; EXPLODEXDP; diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h index 92dc8fa565cb..e0eb7a965fdf 100644 --- a/arch/mips/math-emu/ieee754.h +++ b/arch/mips/math-emu/ieee754.h @@ -165,11 +165,12 @@ struct _ieee754_csr { }; #define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31)) -static inline unsigned ieee754_getrm(void) +static inline unsigned int ieee754_getrm(void) { return (ieee754_csr.rm); } -static inline unsigned ieee754_setrm(unsigned rm) + +static inline unsigned int ieee754_setrm(unsigned int rm) { return (ieee754_csr.rm = rm); } @@ -177,14 +178,14 @@ static inline unsigned ieee754_setrm(unsigned rm) /* * get current exceptions */ -static inline unsigned ieee754_getcx(void) +static inline unsigned int ieee754_getcx(void) { return (ieee754_csr.cx); } /* test for current exception condition */ -static inline int ieee754_cxtest(unsigned n) +static inline int ieee754_cxtest(unsigned int n) { return (ieee754_csr.cx & n); } @@ -192,21 +193,21 @@ static inline int ieee754_cxtest(unsigned n) /* * get sticky exceptions */ -static inline unsigned ieee754_getsx(void) +static inline unsigned int ieee754_getsx(void) { return (ieee754_csr.sx); } /* clear sticky conditions */ -static inline unsigned ieee754_clrsx(void) +static inline unsigned int ieee754_clrsx(void) { return (ieee754_csr.sx = 0); } /* test for sticky exception condition */ -static inline int ieee754_sxtest(unsigned n) +static inline int ieee754_sxtest(unsigned int n) { return (ieee754_csr.sx & n); } diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h index dd2071f430e0..06ac0e2ac7ac 100644 --- a/arch/mips/math-emu/ieee754int.h +++ b/arch/mips/math-emu/ieee754int.h @@ -54,13 +54,13 @@ static inline int ieee754_class_nan(int xc) } #define COMPXSP \ - unsigned xm; int xe; int xs __maybe_unused; int xc + unsigned int xm; int xe; int xs __maybe_unused; int xc #define COMPYSP \ - unsigned ym; int ye; int ys; int yc + unsigned int ym; int ye; int ys; int yc #define COMPZSP \ - unsigned zm; int ze; int zs; int zc + unsigned int zm; int ze; int zs; int zc #define EXPLODESP(v, vc, vs, ve, vm) \ { \ diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c index 260e68965907..8423e4c5e415 100644 --- a/arch/mips/math-emu/ieee754sp.c +++ b/arch/mips/math-emu/ieee754sp.c @@ -65,7 +65,7 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r) return r; } -static unsigned ieee754sp_get_rounding(int sn, unsigned xm) +static unsigned int ieee754sp_get_rounding(int sn, unsigned int xm) { /* inexact must round of 3 bits */ @@ -96,7 +96,7 @@ static unsigned ieee754sp_get_rounding(int sn, unsigned xm) * xe is an unbiased exponent * xm is 3bit extended precision value. */ -union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) +union ieee754sp ieee754sp_format(int sn, int xe, unsigned int xm) { assert(xm); /* we don't gen exact zeros (probably should) */ diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h index 0f63e4202cff..8c5a63804873 100644 --- a/arch/mips/math-emu/ieee754sp.h +++ b/arch/mips/math-emu/ieee754sp.h @@ -69,7 +69,7 @@ static inline int ieee754sp_finite(union ieee754sp x) #define SPDNORMY SPDNORMx(ym, ye) #define SPDNORMZ SPDNORMx(zm, ze) -static inline union ieee754sp buildsp(int s, int bx, unsigned m) +static inline union ieee754sp buildsp(int s, int bx, unsigned int m) { union ieee754sp r; diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c index 27f6db3a0a4c..23587b31ca87 100644 --- a/arch/mips/math-emu/sp_div.c +++ b/arch/mips/math-emu/sp_div.c @@ -23,9 +23,9 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) { - unsigned rm; + unsigned int rm; int re; - unsigned bm; + unsigned int bm; COMPXSP; COMPYSP; diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c index d5d8495b2cc4..1a35d12b6fc8 100644 --- a/arch/mips/math-emu/sp_fint.c +++ b/arch/mips/math-emu/sp_fint.c @@ -23,7 +23,7 @@ union ieee754sp ieee754sp_fint(int x) { - unsigned xm; + unsigned int xm; int xe; int xs; diff --git a/arch/mips/math-emu/sp_maddf.c b/arch/mips/math-emu/sp_maddf.c index 7195fe785d81..f823338dbb65 100644 --- a/arch/mips/math-emu/sp_maddf.c +++ b/arch/mips/math-emu/sp_maddf.c @@ -20,9 +20,9 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x, { int re; int rs; - unsigned rm; - uint64_t rm64; - uint64_t zm64; + unsigned int rm; + u64 rm64; + u64 zm64; int s; COMPXSP; diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c index d910c43a6f30..4015101fbc37 100644 --- a/arch/mips/math-emu/sp_mul.c +++ b/arch/mips/math-emu/sp_mul.c @@ -25,15 +25,15 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y) { int re; int rs; - unsigned rm; + unsigned int rm; unsigned short lxm; unsigned short hxm; unsigned short lym; unsigned short hym; - unsigned lrm; - unsigned hrm; - unsigned t; - unsigned at; + unsigned int lrm; + unsigned int hrm; + unsigned int t; + unsigned int at; COMPXSP; COMPYSP; -- cgit v1.2.3 From c05afeec17cdba6c5c70de4226c136ceee5568df Mon Sep 17 00:00:00 2001 From: Bhumika Goyal Date: Tue, 26 Sep 2017 19:21:05 +0530 Subject: MIPS: Alchemy: make clk_ops const Make these const as they are only stored in the "const " ops field of a clk_init_data structure. Structure found using Coccinelle and changes done by hand. Signed-off-by: Bhumika Goyal Cc: julia.lawall@lip6.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17374/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/alchemy/common/clock.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c index 7ba7ea0a22f8..1e6db0814110 100644 --- a/arch/mips/alchemy/common/clock.c +++ b/arch/mips/alchemy/common/clock.c @@ -142,7 +142,7 @@ void __init alchemy_set_lpj(void) preset_lpj /= 2 * HZ; } -static struct clk_ops alchemy_clkops_cpu = { +static const struct clk_ops alchemy_clkops_cpu = { .recalc_rate = alchemy_clk_cpu_recalc, }; @@ -223,7 +223,7 @@ static long alchemy_clk_aux_roundr(struct clk_hw *hw, return (*parent_rate) * mult; } -static struct clk_ops alchemy_clkops_aux = { +static const struct clk_ops alchemy_clkops_aux = { .recalc_rate = alchemy_clk_aux_recalc, .set_rate = alchemy_clk_aux_setr, .round_rate = alchemy_clk_aux_roundr, @@ -575,7 +575,7 @@ static int alchemy_clk_fgv1_detr(struct clk_hw *hw, } /* Au1000, Au1100, Au15x0, Au12x0 */ -static struct clk_ops alchemy_clkops_fgenv1 = { +static const struct clk_ops alchemy_clkops_fgenv1 = { .recalc_rate = alchemy_clk_fgv1_recalc, .determine_rate = alchemy_clk_fgv1_detr, .set_rate = alchemy_clk_fgv1_setr, @@ -716,7 +716,7 @@ static int alchemy_clk_fgv2_detr(struct clk_hw *hw, } /* Au1300 larger input mux, no separate disable bit, flexible divider */ -static struct clk_ops alchemy_clkops_fgenv2 = { +static const struct clk_ops alchemy_clkops_fgenv2 = { .recalc_rate = alchemy_clk_fgv2_recalc, .determine_rate = alchemy_clk_fgv2_detr, .set_rate = alchemy_clk_fgv2_setr, @@ -924,7 +924,7 @@ static int alchemy_clk_csrc_detr(struct clk_hw *hw, return alchemy_clk_fgcs_detr(hw, req, scale, 4); } -static struct clk_ops alchemy_clkops_csrc = { +static const struct clk_ops alchemy_clkops_csrc = { .recalc_rate = alchemy_clk_csrc_recalc, .determine_rate = alchemy_clk_csrc_detr, .set_rate = alchemy_clk_csrc_setr, -- cgit v1.2.3 From c5af3c2dd0760737f4fee9c414a7d647957ca767 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:01 +0200 Subject: MIPS: BCM63XX: add clkdev lookup support Enable clkdev lookup support to allow us providing clocks under different names to devices more easily, so we don't need to care about clock name clashes anymore. Reviewed-by: Florian Fainelli Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17325/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/Kconfig | 1 + arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++----------- 2 files changed, 116 insertions(+), 35 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b6af63fb8544..c715b3acf052 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -275,6 +275,7 @@ config BCM63XX select GPIOLIB select HAVE_CLK select MIPS_L1_CACHE_SHIFT_4 + select CLKDEV_LOOKUP help Support for BCM63XX based boards diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 19577f771c1f..f712c9558d57 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -359,44 +360,103 @@ long clk_round_rate(struct clk *clk, unsigned long rate) } EXPORT_SYMBOL_GPL(clk_round_rate); -struct clk *clk_get(struct device *dev, const char *id) -{ - if (!strcmp(id, "enet0")) - return &clk_enet0; - if (!strcmp(id, "enet1")) - return &clk_enet1; - if (!strcmp(id, "enetsw")) - return &clk_enetsw; - if (!strcmp(id, "ephy")) - return &clk_ephy; - if (!strcmp(id, "usbh")) - return &clk_usbh; - if (!strcmp(id, "usbd")) - return &clk_usbd; - if (!strcmp(id, "spi")) - return &clk_spi; - if (!strcmp(id, "hsspi")) - return &clk_hsspi; - if (!strcmp(id, "xtm")) - return &clk_xtm; - if (!strcmp(id, "periph")) - return &clk_periph; - if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) - return &clk_pcm; - if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) - return &clk_ipsec; - if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) - return &clk_pcie; - return ERR_PTR(-ENOENT); -} +static struct clk_lookup bcm3368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), +}; -EXPORT_SYMBOL(clk_get); +static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), + CLKDEV_INIT(NULL, "pcie", &clk_pcie), +}; -void clk_put(struct clk *clk) -{ -} +static struct clk_lookup bcm6338_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; + +static struct clk_lookup bcm6345_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; + +static struct clk_lookup bcm6348_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), +}; -EXPORT_SYMBOL(clk_put); +static struct clk_lookup bcm6358_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), + CLKDEV_INIT(NULL, "ephy", &clk_ephy), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), +}; + +static struct clk_lookup bcm6362_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), + CLKDEV_INIT(NULL, "pcie", &clk_pcie), + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), +}; + +static struct clk_lookup bcm6368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "xtm", &clk_xtm), + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), +}; #define HSSPI_PLL_HZ_6328 133333333 #define HSSPI_PLL_HZ_6362 400000000 @@ -404,11 +464,31 @@ EXPORT_SYMBOL(clk_put); static int __init bcm63xx_clk_init(void) { switch (bcm63xx_get_cpu_id()) { + case BCM3368_CPU_ID: + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; case BCM6328_CPU_ID: clk_hsspi.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); + break; + case BCM6338_CPU_ID: + clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks)); + break; + case BCM6345_CPU_ID: + clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks)); + break; + case BCM6348_CPU_ID: + clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks)); + break; + case BCM6358_CPU_ID: + clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); break; case BCM6362_CPU_ID: clk_hsspi.rate = HSSPI_PLL_HZ_6362; + clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); + break; + case BCM6368_CPU_ID: + clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); break; } -- cgit v1.2.3 From 243fa279a8eccd5b49e32ba7740f752be0d2aa5e Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:02 +0200 Subject: MIPS: BCM63XX: provide periph clock as refclk for uart Add a lookup as "refclk" to describe its function for the uarts. Reviewed-by: Florian Fainelli Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17326/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/bcm63xx/clk.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index f712c9558d57..d8dac1f9a65a 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -363,6 +363,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate); static struct clk_lookup bcm3368_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enet0", &clk_enet0), CLKDEV_INIT(NULL, "enet1", &clk_enet1), @@ -376,6 +378,8 @@ static struct clk_lookup bcm3368_clks[] = { static struct clk_lookup bcm6328_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -387,6 +391,7 @@ static struct clk_lookup bcm6328_clks[] = { static struct clk_lookup bcm6338_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enet0", &clk_enet0), CLKDEV_INIT(NULL, "enet1", &clk_enet1), @@ -399,6 +404,7 @@ static struct clk_lookup bcm6338_clks[] = { static struct clk_lookup bcm6345_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enet0", &clk_enet0), CLKDEV_INIT(NULL, "enet1", &clk_enet1), @@ -411,6 +417,7 @@ static struct clk_lookup bcm6345_clks[] = { static struct clk_lookup bcm6348_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enet0", &clk_enet0), CLKDEV_INIT(NULL, "enet1", &clk_enet1), @@ -423,6 +430,8 @@ static struct clk_lookup bcm6348_clks[] = { static struct clk_lookup bcm6358_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enet0", &clk_enet0), CLKDEV_INIT(NULL, "enet1", &clk_enet1), @@ -436,6 +445,8 @@ static struct clk_lookup bcm6358_clks[] = { static struct clk_lookup bcm6362_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -449,6 +460,8 @@ static struct clk_lookup bcm6362_clks[] = { static struct clk_lookup bcm6368_clks[] = { /* fixed rate clocks */ CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), -- cgit v1.2.3 From 9a9cc02a6a558cf4d9ebeeda0832c5e2b8128f33 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:03 +0200 Subject: tty/bcm63xx_uart: use refclk for the expected clock name We now have the clock available under refclk, so use that. Signed-off-by: Jonas Gorski Acked-by: Greg Kroah-Hartman Reviewed-by: Florian Fainelli Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17327/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- drivers/tty/serial/bcm63xx_uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index 8c48c3784831..afcc0418831b 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -847,7 +847,7 @@ static int bcm_uart_probe(struct platform_device *pdev) return -ENODEV; clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : - clk_get(&pdev->dev, "periph"); + clk_get(&pdev->dev, "refclk"); if (IS_ERR(clk)) return -ENODEV; -- cgit v1.2.3 From fa1e6a8aec47d5623f8361907f57e44f112a8f4f Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:04 +0200 Subject: tty/bcm63xx_uart: allow naming clock in device tree Codify using a named clock for the refclk of the uart. This makes it easier if we might need to add a gating clock (like present on the BCM6345). Signed-off-by: Jonas Gorski Acked-by: Rob Herring Acked-by: Greg Kroah-Hartman Reviewed-by: Florian Fainelli Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17328/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++ drivers/tty/serial/bcm63xx_uart.c | 6 ++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt index 5c52e5eef16d..8b2b0460259a 100644 --- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt +++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt @@ -11,6 +11,11 @@ Required properties: - clocks: Clock driving the hardware; used to figure out the baud rate divisor. + +Optional properties: + +- clock-names: Should be "refclk". + Example: uart0: serial@14e00520 { @@ -19,6 +24,7 @@ Example: interrupt-parent = <&periph_intc>; interrupts = <2>; clocks = <&periph_clk>; + clock-names = "refclk"; }; clocks { diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index afcc0418831b..0385bd361f4f 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -846,8 +846,10 @@ static int bcm_uart_probe(struct platform_device *pdev) if (!res_irq) return -ENODEV; - clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : - clk_get(&pdev->dev, "refclk"); + clk = clk_get(&pdev->dev, "refclk"); + if (IS_ERR(clk) && pdev->dev.of_node) + clk = of_clk_get(pdev->dev.of_node, 0); + if (IS_ERR(clk)) return -ENODEV; -- cgit v1.2.3 From bed8d2a23e0115a05a1102a9a11677027b2ea7e5 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:05 +0200 Subject: MIPS: BMIPS: name the refclk clock for uart Add the clock name to the uart nodes, to name the input clock properly. Reviewed-by: Florian Fainelli Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17329/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/boot/dts/brcm/bcm3368.dtsi | 2 ++ arch/mips/boot/dts/brcm/bcm63268.dtsi | 2 ++ arch/mips/boot/dts/brcm/bcm6328.dtsi | 2 ++ arch/mips/boot/dts/brcm/bcm6358.dtsi | 2 ++ arch/mips/boot/dts/brcm/bcm6362.dtsi | 2 ++ arch/mips/boot/dts/brcm/bcm6368.dtsi | 2 ++ 6 files changed, 12 insertions(+) diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi index bee855cb8073..772fb42b7730 100644 --- a/arch/mips/boot/dts/brcm/bcm3368.dtsi +++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi @@ -82,6 +82,7 @@ interrupts = <2>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -94,6 +95,7 @@ interrupts = <3>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index 7e6bf2cc0287..b033a23b5e13 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -83,6 +83,7 @@ interrupts = <5>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -95,6 +96,7 @@ interrupts = <34>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi index 5633b9d90f55..7c3061ba6d38 100644 --- a/arch/mips/boot/dts/brcm/bcm6328.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi @@ -68,6 +68,7 @@ interrupt-parent = <&periph_intc>; interrupts = <28>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -77,6 +78,7 @@ interrupt-parent = <&periph_intc>; interrupts = <39>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi index f9d8d392162b..ab9d6c268a84 100644 --- a/arch/mips/boot/dts/brcm/bcm6358.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi @@ -92,6 +92,7 @@ interrupts = <2>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -104,6 +105,7 @@ interrupts = <3>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi index c507da594f2f..ca93c9a6f23f 100644 --- a/arch/mips/boot/dts/brcm/bcm6362.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi @@ -83,6 +83,7 @@ interrupts = <3>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -95,6 +96,7 @@ interrupts = <4>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi index d0e3a70b32e2..da4ec89710fd 100644 --- a/arch/mips/boot/dts/brcm/bcm6368.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi @@ -89,6 +89,7 @@ interrupt-parent = <&periph_intc>; interrupts = <2>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; @@ -98,6 +99,7 @@ interrupt-parent = <&periph_intc>; interrupts = <3>; clocks = <&periph_clk>; + clock-names = "refclk"; status = "disabled"; }; -- cgit v1.2.3 From 5d691036cbb7290289de9b5044a2071cc0133dc5 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:06 +0200 Subject: MIPS: BCM63XX: move the HSSPI PLL HZ into its own clock Split up the HSSPL clock into rate and a gate clock, to more closely match the actual hardware. Reviewed-by: Florian Fainelli Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17330/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/bcm63xx/clk.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index d8dac1f9a65a..ba5758551c94 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -248,6 +248,10 @@ static struct clk clk_hsspi = { .set = hsspi_set, }; +/* + * HSSPI PLL + */ +static struct clk clk_hsspi_pll; /* * XTM clock @@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[] = { CLKDEV_INIT(NULL, "periph", &clk_periph), CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[] = { CLKDEV_INIT(NULL, "periph", &clk_periph), CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), /* gated clocks */ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), CLKDEV_INIT(NULL, "usbh", &clk_usbh), @@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void) clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); break; case BCM6328_CPU_ID: - clk_hsspi.rate = HSSPI_PLL_HZ_6328; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); break; case BCM6338_CPU_ID: @@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void) clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); break; case BCM6362_CPU_ID: - clk_hsspi.rate = HSSPI_PLL_HZ_6362; + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); break; case BCM6368_CPU_ID: -- cgit v1.2.3 From ef4235159555e8c8d20cb47f04a74cb4abacd63a Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:07 +0200 Subject: MIPS: BCM63XX: provide enet clocks as "enet" to the ethernet devices Add lookups to provide the appropriate enetX clocks as just "enet" to the ethernet devices. Reviewed-by: Florian Fainelli Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17331/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/bcm63xx/clk.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index ba5758551c94..2018425fe97e 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -377,6 +377,8 @@ static struct clk_lookup bcm3368_clks[] = { CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), CLKDEV_INIT(NULL, "pcm", &clk_pcm), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), }; static struct clk_lookup bcm6328_clks[] = { @@ -404,6 +406,7 @@ static struct clk_lookup bcm6338_clks[] = { CLKDEV_INIT(NULL, "usbh", &clk_usbh), CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), }; static struct clk_lookup bcm6345_clks[] = { @@ -417,6 +420,7 @@ static struct clk_lookup bcm6345_clks[] = { CLKDEV_INIT(NULL, "usbh", &clk_usbh), CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), }; static struct clk_lookup bcm6348_clks[] = { @@ -430,6 +434,8 @@ static struct clk_lookup bcm6348_clks[] = { CLKDEV_INIT(NULL, "usbh", &clk_usbh), CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc), }; static struct clk_lookup bcm6358_clks[] = { @@ -445,6 +451,8 @@ static struct clk_lookup bcm6358_clks[] = { CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), CLKDEV_INIT(NULL, "pcm", &clk_pcm), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), }; static struct clk_lookup bcm6362_clks[] = { -- cgit v1.2.3 From 072916f55ddbb94330dd14118a126930c0e20751 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Wed, 20 Sep 2017 13:14:08 +0200 Subject: MIPS: BCM63XX: split out swpkt_sar/usb clocks Make the secondary switch clocks their own clocks. This allows proper enable reference counting between SAR/XTM and the main switch clocks, and controlling them individually from drivers. Signed-off-by: Jonas Gorski Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Florian Fainelli Cc: Kevin Cernekee Cc: Russell King Cc: linux-mips@linux-mips.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Patchwork: https://patchwork.linux-mips.org/patch/17332/ Signed-off-by: Ralf Baechle Signed-off-by: James Hogan --- arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 51 insertions(+), 10 deletions(-) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 2018425fe97e..164115944a7f 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -121,22 +121,57 @@ static struct clk clk_ephy = { .set = ephy_set, }; +/* + * Ethernet switch SAR clock + */ +static void swpkt_sar_set(struct clk *clk, int enable) +{ + if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable); + else + return; +} + +static struct clk clk_swpkt_sar = { + .set = swpkt_sar_set, +}; + +/* + * Ethernet switch USB clock + */ +static void swpkt_usb_set(struct clk *clk, int enable) +{ + if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable); + else + return; +} + +static struct clk clk_swpkt_usb = { + .set = swpkt_usb_set, +}; + /* * Ethernet switch clock */ static void enetsw_set(struct clk *clk, int enable) { - if (BCMCPU_IS_6328()) + if (BCMCPU_IS_6328()) { bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); - else if (BCMCPU_IS_6362()) + } else if (BCMCPU_IS_6362()) { bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); - else if (BCMCPU_IS_6368()) - bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | - CKCTL_6368_SWPKT_USB_EN | - CKCTL_6368_SWPKT_SAR_EN, - enable); - else + } else if (BCMCPU_IS_6368()) { + if (enable) { + clk_enable_unlocked(&clk_swpkt_sar); + clk_enable_unlocked(&clk_swpkt_usb); + } else { + clk_disable_unlocked(&clk_swpkt_usb); + clk_disable_unlocked(&clk_swpkt_sar); + } + bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); + } else { return; + } if (enable) { /* reset switch core afer clock change */ @@ -261,8 +296,12 @@ static void xtm_set(struct clk *clk, int enable) if (!BCMCPU_IS_6368()) return; - bcm_hwclock_set(CKCTL_6368_SAR_EN | - CKCTL_6368_SWPKT_SAR_EN, enable); + if (enable) + clk_enable_unlocked(&clk_swpkt_sar); + else + clk_disable_unlocked(&clk_swpkt_sar); + + bcm_hwclock_set(CKCTL_6368_SAR_EN, enable); if (enable) { /* reset sar core afer clock change */ @@ -451,6 +490,8 @@ static struct clk_lookup bcm6358_clks[] = { CLKDEV_INIT(NULL, "usbd", &clk_usbd), CLKDEV_INIT(NULL, "spi", &clk_spi), CLKDEV_INIT(NULL, "pcm", &clk_pcm), + CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar), + CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb), CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), }; -- cgit v1.2.3 From 8530762f2391164394fc8d99d7a5a55f521b6131 Mon Sep 17 00:00:00 2001 From: Robert P. J. Day Date: Sat, 2 Sep 2017 03:09:06 -0400 Subject: MIPS: Standardize DTS files, status "ok" -> "okay" While the current kernel code in drivers/of/ allows developers to be sloppy and use the status value "ok", the current DTSpec 0.1 makes it clear that the only officially proper spelling is "okay", so adjust the very small number of DTS files under arch/mips/. Signed-off-by: Robert P. J. Day Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17227/ Signed-off-by: James Hogan --- arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts | 2 +- arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts | 2 +- arch/mips/boot/dts/ralink/rt3052_eval.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts index 430d35ca33d5..18397f4f1bae 100644 --- a/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts +++ b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts @@ -18,7 +18,7 @@ }; &leds0 { - status = "ok"; + status = "okay"; brcm,serial-leds; brcm,serial-dat-low; brcm,serial-shift-inv; diff --git a/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts index 702eae2a22a0..cfffbba5c131 100644 --- a/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts +++ b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts @@ -18,7 +18,7 @@ }; &leds0 { - status = "ok"; + status = "okay"; led@0 { reg = <0>; diff --git a/arch/mips/boot/dts/ralink/rt3052_eval.dts b/arch/mips/boot/dts/ralink/rt3052_eval.dts index ec9e9a035541..564870ff2431 100644 --- a/arch/mips/boot/dts/ralink/rt3052_eval.dts +++ b/arch/mips/boot/dts/ralink/rt3052_eval.dts @@ -46,6 +46,6 @@ }; usb@101c0000 { - status = "ok"; + status = "okay"; }; }; -- cgit v1.2.3 From 44a374c0667df6b5de63266a4cf15f400827a29a Mon Sep 17 00:00:00 2001 From: Martin Schiller Date: Tue, 30 May 2017 06:34:34 +0200 Subject: MIPS: Lantiq: Fix ASC0/ASC1 clocks ASC1 is available on every Lantiq SoC (also AmazonSE) and should be enabled like the other generic xway clocks instead of ASC0, which is only available for AR9 and Danube. Signed-off-by: Martin Schiller Acked-by: Hauke Mehrtens Cc: Ralf Baechle Cc: John Crispin Cc: Arnd Bergmann Cc: Felix Fietkau Cc: Martin Schiller Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16145/ [jhogan@kernel.org: Drop braces] Signed-off-by: James Hogan --- arch/mips/lantiq/xway/sysctrl.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c index 7611c3013793..52500d3b7004 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -446,9 +446,9 @@ void __init ltq_soc_init(void) /* add our generic xway clocks */ clkdev_add_pmu("10000000.fpi", NULL, 0, 0, PMU_FPI); - clkdev_add_pmu("1e100400.serial", NULL, 0, 0, PMU_ASC0); clkdev_add_pmu("1e100a00.gptu", NULL, 1, 0, PMU_GPT); clkdev_add_pmu("1e100bb0.stp", NULL, 1, 0, PMU_STP); + clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1); clkdev_add_pmu("1e104100.dma", NULL, 1, 0, PMU_DMA); clkdev_add_pmu("1e100800.spi", NULL, 1, 0, PMU_SPI); clkdev_add_pmu("1e105300.ebu", NULL, 0, 0, PMU_EBU); @@ -462,10 +462,8 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1e180000.etop", NULL, 1, 0, PMU_PPE); } - if (!of_machine_is_compatible("lantiq,ase")) { - clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1); + if (!of_machine_is_compatible("lantiq,ase")) clkdev_add_pci(); - } if (of_machine_is_compatible("lantiq,grx390") || of_machine_is_compatible("lantiq,ar10")) { -- cgit v1.2.3 From 56a46acf62af5ba44fca2f3f1c7c25a2d5385b19 Mon Sep 17 00:00:00 2001 From: Mirko Parthey Date: Thu, 18 May 2017 21:30:03 +0200 Subject: MIPS: BCM47XX: Fix LED inversion for WRT54GSv1 The WLAN LED on the Linksys WRT54GSv1 is active low, but the software treats it as active high. Fix the inverted logic. Fixes: 7bb26b169116 ("MIPS: BCM47xx: Fix LEDs on WRT54GS V1.0") Signed-off-by: Mirko Parthey Looks-ok-by: Rafał Miłecki Cc: Hauke Mehrtens Cc: linux-mips@linux-mips.org Cc: # 3.17+ Patchwork: https://patchwork.linux-mips.org/patch/16071/ Signed-off-by: James Hogan --- arch/mips/bcm47xx/leds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c index a35f1d5cde9f..08ad23c492e7 100644 --- a/arch/mips/bcm47xx/leds.c +++ b/arch/mips/bcm47xx/leds.c @@ -330,7 +330,7 @@ bcm47xx_leds_linksys_wrt54g3gv2[] __initconst = { /* Verified on: WRT54GS V1.0 */ static const struct gpio_led bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = { - BCM47XX_GPIO_LED(0, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), + BCM47XX_GPIO_LED(0, "green", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON), BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), }; -- cgit v1.2.3 From b2ec33d438cca839fbb5764bcf5e29cffb3b9721 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Wed, 8 Nov 2017 09:21:15 +0000 Subject: MIPS: ralink: Drop obsolete USB_ARCH_HAS_HCD select Building an allnoconfig kernel based on the ralink platform results in the following warning: warning: (SOC_RT305X) selects USB_ARCH_HAS_HCD which has unmet direct dependencies (USB_SUPPORT) This is because SOC_RT305X unconditionally selects USB_ARCH_HAS_HCD which depends on USB_SUPPORT. However USB_ARCH_HAS_HCD has been effectively obsolete since commit d9ea21a77927 ("usb: host: make USB_ARCH_HAS_?HCI obsolete") in 3.11. USB_ARCH_HAS_HCD is now set by default whenever USB_SUPPORT is, so drop the select to silence the warning. Signed-off-by: James Hogan Cc: Ralf Baechle Cc: John Crispin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17618/ --- arch/mips/ralink/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index b4627080b828..05587e0e16e3 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -30,7 +30,6 @@ choice config SOC_RT305X bool "RT305x" - select USB_ARCH_HAS_HCD config SOC_RT3883 bool "RT3883" -- cgit v1.2.3 From d3a0b968186a7e197b7551e4d6080676372152ce Mon Sep 17 00:00:00 2001 From: Maciej W. Rozycki Date: Fri, 29 Sep 2017 16:26:31 +0100 Subject: MIPS: Use SLL by 0 for 32-bit truncation in `__read_64bit_c0_split' Optimize `__read_64bit_c0_split' and reduce the instruction count by 1, observing that a DSLL/DSRA pair by 32, is equivalent to SLL by 0, which architecturally truncates the value requested to 32 bits on 64-bit MIPS hardware regardless of whether the input operand is or is not a properly sign-extended 32-bit value. Signed-off-by: Maciej W. Rozycki Reviewed-by: James Hogan Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17399/ Signed-off-by: James Hogan --- arch/mips/include/asm/mipsregs.h | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index a6810923b3f0..6b1f1ad0542c 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1355,19 +1355,17 @@ do { \ if (sel == 0) \ __asm__ __volatile__( \ ".set\tmips64\n\t" \ - "dmfc0\t%M0, " #source "\n\t" \ - "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ + "dmfc0\t%L0, " #source "\n\t" \ + "dsra\t%M0, %L0, 32\n\t" \ + "sll\t%L0, %L0, 0\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ else \ __asm__ __volatile__( \ ".set\tmips64\n\t" \ - "dmfc0\t%M0, " #source ", " #sel "\n\t" \ - "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ + "dmfc0\t%L0, " #source ", " #sel "\n\t" \ + "dsra\t%M0, %L0, 32\n\t" \ + "sll\t%L0, %L0, 0\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ local_irq_restore(__flags); \ -- cgit v1.2.3 From e629cfa36ea0877371427b71bdfc701bc46b9880 Mon Sep 17 00:00:00 2001 From: Allen Pais Date: Fri, 22 Sep 2017 17:13:35 +0530 Subject: MIPS: Lasat: Use setup_timer() helper Use setup_timer function instead of initializing timer with the function and data fields. Signed-off-by: Allen Pais Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17341/ Signed-off-by: James Hogan --- arch/mips/lasat/picvue_proc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c index dd292dcec684..a8103f6972cd 100644 --- a/arch/mips/lasat/picvue_proc.c +++ b/arch/mips/lasat/picvue_proc.c @@ -197,8 +197,7 @@ static int __init pvc_proc_init(void) if (proc_entry == NULL) goto error; - init_timer(&timer); - timer.function = pvc_proc_timerfunc; + setup_timer(&timer, pvc_proc_timerfunc, 0UL); return 0; error: -- cgit v1.2.3 From 84fbfc33eaad549dd7fa513ad764d9bfe1cbf507 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Wed, 5 Jul 2017 15:04:48 +0800 Subject: MIPS: DTS: Remove num-slots from Pistachio SoC dwmmc driver deprecated num-slots and plan to get rid of it finally. Just move a step to cleanup it from DT. Cc: Jaehoon Chung Signed-off-by: Shawn Lin Acked-by: James Hartley Cc: Ralf Baechle Cc: Jaehoon Chung Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16741/ Signed-off-by: James Hogan --- arch/mips/boot/dts/img/pistachio.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/boot/dts/img/pistachio.dtsi b/arch/mips/boot/dts/img/pistachio.dtsi index 57809f6a5864..f8d7e6f622cb 100644 --- a/arch/mips/boot/dts/img/pistachio.dtsi +++ b/arch/mips/boot/dts/img/pistachio.dtsi @@ -805,7 +805,6 @@ pinctrl-0 = <&sdhost_pins>; pinctrl-names = "default"; fifo-depth = <0x20>; - num-slots = <1>; clock-frequency = <50000000>; bus-width = <8>; cap-mmc-highspeed; -- cgit v1.2.3 From d41e6858ba58c039fe84a4f341c1088c475b2537 Mon Sep 17 00:00:00 2001 From: Matt Redfearn Date: Wed, 14 Dec 2016 15:09:42 +0000 Subject: MIPS: Kconfig: Set default MIPS system type as generic The generic MIPS system type allows building a board agnostic kernel and should be the default starting point for users, so set it as the default system type in Kconfig. Since ip22 is no longer the default, update ip22_defconfig to select CONFIG_SGI_IP22. Signed-off-by: Matt Redfearn Cc: Ralf Baechle Cc: David Howells Cc: Borislav Petkov Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14714/ Signed-off-by: James Hogan --- arch/mips/Kconfig | 2 +- arch/mips/configs/ip22_defconfig | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c715b3acf052..6d831146cc47 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -77,7 +77,7 @@ menu "Machine selection" choice prompt "System type" - default SGI_IP22 + default MIPS_GENERIC config MIPS_GENERIC bool "Generic board-agnostic MIPS kernel" diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 83e8fe2064aa..7ddfb4ef9479 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -1,3 +1,4 @@ +CONFIG_SGI_IP22=y CONFIG_ARC_CONSOLE=y CONFIG_CPU_R5000=y CONFIG_NO_HZ=y -- cgit v1.2.3 From 04d8405e714e66e52718436eb6eb6e8ba6afb823 Mon Sep 17 00:00:00 2001 From: Matt Redfearn Date: Wed, 14 Dec 2016 15:09:43 +0000 Subject: MIPS: Set defconfig target to a generic system for 32r2el The default system type should be a MIPS generic kernel. In order to include some level of board support, select a 32r2el generic defconfig by default. The alternative would be to use "generic_defconfig" but rather unintuitvely that is a bare bones configuration with no platform support so is not usable in practice. Signed-off-by: Matt Redfearn Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14715/ Signed-off-by: James Hogan --- arch/mips/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index a96d97a806c9..9506614471c8 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -15,7 +15,7 @@ archscripts: scripts_basic $(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs -KBUILD_DEFCONFIG := ip22_defconfig +KBUILD_DEFCONFIG := 32r2el_defconfig # # Select the object file format to substitute into the linker script. -- cgit v1.2.3 From b35565bb16a55e5b8c5067e891b7b31a4359bda6 Mon Sep 17 00:00:00 2001 From: Zubair Lutfullah Kakakhel Date: Fri, 31 Mar 2017 10:00:41 +0100 Subject: MIPS: generic: Add support for MIPSfpga Add support for the MIPSfpga platform to generic kernel. Signed-off-by: Zubair Lutfullah Kakakhel Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15846/ [jhogan@kernel.org: Use separate board-xilfpga.its.S. Add 32r2 and little endian requires to board-xilfpga.config] Signed-off-by: James Hogan --- arch/mips/boot/dts/xilfpga/Makefile | 2 +- arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 8 ++++++++ arch/mips/configs/generic/board-xilfpga.config | 22 ++++++++++++++++++++++ arch/mips/generic/Kconfig | 6 ++++++ arch/mips/generic/board-xilfpga.its.S | 22 ++++++++++++++++++++++ 5 files changed, 59 insertions(+), 1 deletion(-) create mode 100644 arch/mips/configs/generic/board-xilfpga.config create mode 100644 arch/mips/generic/board-xilfpga.its.S diff --git a/arch/mips/boot/dts/xilfpga/Makefile b/arch/mips/boot/dts/xilfpga/Makefile index 913a752a9ff1..bbf8fb6fe164 100644 --- a/arch/mips/boot/dts/xilfpga/Makefile +++ b/arch/mips/boot/dts/xilfpga/Makefile @@ -1,4 +1,4 @@ -dtb-$(CONFIG_XILFPGA_NEXYS4DDR) += nexys4ddr.dtb +dtb-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += nexys4ddr.dtb obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) diff --git a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts index 09a62f2e2f8f..d351356c25b3 100644 --- a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts +++ b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts @@ -5,6 +5,14 @@ / { compatible = "digilent,nexys4ddr"; + aliases { + serial0 = &axi_uart16550; + }; + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; + }; + memory { device_type = "memory"; reg = <0x0 0x08000000>; diff --git a/arch/mips/configs/generic/board-xilfpga.config b/arch/mips/configs/generic/board-xilfpga.config new file mode 100644 index 000000000000..9cce57385b03 --- /dev/null +++ b/arch/mips/configs/generic/board-xilfpga.config @@ -0,0 +1,22 @@ +# require CONFIG_CPU_MIPS32_R2=y +# require CONFIG_CPU_LITTLE_ENDIAN=y + +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_XILINX=y +CONFIG_PANIC_ON_OOPS=y +CONFIG_FIT_IMAGE_FDT_XILFPGA=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_XILINX=y +CONFIG_SENSORS_ADT7410=y +CONFIG_TMPFS=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_NETDEVICES=y +CONFIG_XILINX_EMACLITE=y +CONFIG_SMSC_PHY=y diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig index e0436aaf7f38..1f45ba436177 100644 --- a/arch/mips/generic/Kconfig +++ b/arch/mips/generic/Kconfig @@ -42,4 +42,10 @@ config FIT_IMAGE_FDT_NI169445 Enable this to include the FDT for the 169445 platform from National Instruments in the FIT kernel image. +config FIT_IMAGE_FDT_XILFPGA + bool "Include FDT for Xilfpga" + help + Enable this to include the FDT for the MIPSfpga platform + from Imagination Technologies in the FIT kernel image. + endif diff --git a/arch/mips/generic/board-xilfpga.its.S b/arch/mips/generic/board-xilfpga.its.S new file mode 100644 index 000000000000..a2e773d3f14f --- /dev/null +++ b/arch/mips/generic/board-xilfpga.its.S @@ -0,0 +1,22 @@ +/ { + images { + fdt@xilfpga { + description = "MIPSfpga (xilfpga) Device Tree"; + data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; + hash@0 { + algo = "sha1"; + }; + }; + }; + + configurations { + conf@xilfpga { + description = "MIPSfpga Linux kernel"; + kernel = "kernel@0"; + fdt = "fdt@xilfpga"; + }; + }; +}; -- cgit v1.2.3 From 0861aa1251c749bbec4ee124ee21660c2f263da4 Mon Sep 17 00:00:00 2001 From: Zubair Lutfullah Kakakhel Date: Fri, 31 Mar 2017 10:00:42 +0100 Subject: MIPS: Xilfpga: Switch to using generic defconfigs Use the generic platform code and remove arch/mips/xilfpga Signed-off-by: Zubair Lutfullah Kakakhel Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15847/ [jhogan@kernel.org: Update arch/mips/Makefile snippet and move to end] Signed-off-by: James Hogan --- arch/mips/Kbuild.platforms | 1 - arch/mips/Kconfig | 24 ------------ arch/mips/Makefile | 4 ++ arch/mips/configs/xilfpga_defconfig | 75 ------------------------------------- arch/mips/xilfpga/Kconfig | 9 ----- arch/mips/xilfpga/Makefile | 7 ---- arch/mips/xilfpga/Platform | 3 -- arch/mips/xilfpga/init.c | 44 ---------------------- arch/mips/xilfpga/intc.c | 22 ----------- arch/mips/xilfpga/time.c | 41 -------------------- 10 files changed, 4 insertions(+), 226 deletions(-) delete mode 100644 arch/mips/configs/xilfpga_defconfig delete mode 100644 arch/mips/xilfpga/Kconfig delete mode 100644 arch/mips/xilfpga/Makefile delete mode 100644 arch/mips/xilfpga/Platform delete mode 100644 arch/mips/xilfpga/init.c delete mode 100644 arch/mips/xilfpga/intc.c delete mode 100644 arch/mips/xilfpga/time.c diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms index f5f1bdb292de..ac7ad54f984f 100644 --- a/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms @@ -34,7 +34,6 @@ platforms += sibyte platforms += sni platforms += txx9 platforms += vr41xx -platforms += xilfpga # include the platform specific files include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms)) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6d831146cc47..b0dbc35d09e1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -468,29 +468,6 @@ config MACH_PISTACHIO help This enables support for the IMG Pistachio SoC platform. -config MACH_XILFPGA - bool "MIPSfpga Xilinx based boards" - select BOOT_ELF32 - select BOOT_RAW - select BUILTIN_DTB - select CEVT_R4K - select COMMON_CLK - select CSRC_R4K - select GPIOLIB - select IRQ_MIPS_CPU - select LIBFDT - select MIPS_CPU_SCACHE - select SYS_HAS_EARLY_PRINTK - select SYS_HAS_CPU_MIPS32_R2 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_ZBOOT_UART16550 - select USE_OF - select USE_GENERIC_EARLY_PRINTK_8250 - select XILINX_INTC - help - This enables support for the IMG University Program MIPSfpga platform. - config MIPS_MALTA bool "MIPS Malta board" select ARCH_MAY_HAVE_PC_FDC @@ -1035,7 +1012,6 @@ source "arch/mips/loongson32/Kconfig" source "arch/mips/loongson64/Kconfig" source "arch/mips/netlogic/Kconfig" source "arch/mips/paravirt/Kconfig" -source "arch/mips/xilfpga/Kconfig" endmenu diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 9506614471c8..9f6a26d72f9f 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -544,3 +544,7 @@ sead3_defconfig: .PHONY: sead3micro_defconfig sead3micro_defconfig: $(Q)$(MAKE) -f $(srctree)/Makefile micro32r2el_defconfig BOARDS=sead-3 + +.PHONY: xilfpga_defconfig +xilfpga_defconfig: + $(Q)$(MAKE) -f $(srctree)/Makefile 32r2el_defconfig BOARDS=xilfpga diff --git a/arch/mips/configs/xilfpga_defconfig b/arch/mips/configs/xilfpga_defconfig deleted file mode 100644 index 829c637be3fc..000000000000 --- a/arch/mips/configs/xilfpga_defconfig +++ /dev/null @@ -1,75 +0,0 @@ -CONFIG_MACH_XILFPGA=y -# CONFIG_COMPACTION is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_EMBEDDED=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_BLOCK is not set -# CONFIG_SUSPEND is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -# CONFIG_WIRELESS is not set -# CONFIG_UEVENT_HELPER is not set -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_STANDALONE is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -# CONFIG_ALLOW_DEV_COREDUMP is not set -CONFIG_NETDEVICES=y -# CONFIG_NET_CORE is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SYNOPSYS is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -CONFIG_XILINX_EMACLITE=y -CONFIG_SMSC_PHY=y -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_XILINX=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_XILINX=y -CONFIG_SENSORS_ADT7410=y -# CONFIG_USB_SUPPORT is not set -# CONFIG_MIPS_PLATFORM_DEVICES is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_TMPFS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,115200" diff --git a/arch/mips/xilfpga/Kconfig b/arch/mips/xilfpga/Kconfig deleted file mode 100644 index 42a030a0edba..000000000000 --- a/arch/mips/xilfpga/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -choice - prompt "Machine type" - depends on MACH_XILFPGA - default XILFPGA_NEXYS4DDR - -config XILFPGA_NEXYS4DDR - bool "Nexys4DDR by Digilent" - -endchoice diff --git a/arch/mips/xilfpga/Makefile b/arch/mips/xilfpga/Makefile deleted file mode 100644 index a4deec6fadbc..000000000000 --- a/arch/mips/xilfpga/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Makefile for the Xilfpga -# - -obj-y += init.o -obj-y += intc.o -obj-y += time.o diff --git a/arch/mips/xilfpga/Platform b/arch/mips/xilfpga/Platform deleted file mode 100644 index ed375afe3d39..000000000000 --- a/arch/mips/xilfpga/Platform +++ /dev/null @@ -1,3 +0,0 @@ -platform-$(CONFIG_MACH_XILFPGA) += xilfpga/ -cflags-$(CONFIG_MACH_XILFPGA) += -I$(srctree)/arch/mips/include/asm/mach-xilfpga -load-$(CONFIG_MACH_XILFPGA) += 0xffffffff80100000 diff --git a/arch/mips/xilfpga/init.c b/arch/mips/xilfpga/init.c deleted file mode 100644 index 602e384a26a2..000000000000 --- a/arch/mips/xilfpga/init.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Xilfpga platform setup - * - * Copyright (C) 2015 Imagination Technologies - * Author: Zubair Lutfullah Kakakhel - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - */ - -#include - -#include - -#define XILFPGA_UART_BASE 0xb0401000 - -const char *get_system_type(void) -{ - return "MIPSfpga"; -} - -void __init plat_mem_setup(void) -{ - __dt_setup_arch(__dtb_start); - strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE); -} - -void __init prom_init(void) -{ - setup_8250_early_printk_port(XILFPGA_UART_BASE, 2, 50000); -} - -void __init prom_free_prom_memory(void) -{ -} - -void __init device_tree_init(void) -{ - if (!initial_boot_params) - return; - - unflatten_and_copy_device_tree(); -} diff --git a/arch/mips/xilfpga/intc.c b/arch/mips/xilfpga/intc.c deleted file mode 100644 index a127cca3ae8c..000000000000 --- a/arch/mips/xilfpga/intc.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Xilfpga interrupt controller setup - * - * Copyright (C) 2015 Imagination Technologies - * Author: Zubair Lutfullah Kakakhel - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - */ - -#include -#include -#include - -#include - - -void __init arch_init_irq(void) -{ - irqchip_init(); -} diff --git a/arch/mips/xilfpga/time.c b/arch/mips/xilfpga/time.c deleted file mode 100644 index 36f3f1870ee2..000000000000 --- a/arch/mips/xilfpga/time.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Xilfpga clocksource/timer setup - * - * Copyright (C) 2015 Imagination Technologies - * Author: Zubair Lutfullah Kakakhel - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include - -void __init plat_time_init(void) -{ - struct device_node *np; - struct clk *clk; - - of_clk_init(NULL); - timer_probe(); - - np = of_get_cpu_node(0, NULL); - if (!np) { - pr_err("Failed to get CPU node\n"); - return; - } - - clk = of_clk_get(np, 0); - if (IS_ERR(clk)) { - pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk)); - return; - } - - mips_hpt_frequency = clk_get_rate(clk) / 2; - clk_put(clk); -} -- cgit v1.2.3 From 37d15948eb72533757ff352cf6f92dc64daa291f Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 9 Mar 2017 13:11:49 -0800 Subject: MIPS: page.h: Define virt_to_pfn() Define virt_to_pfn() based on the existing definition of virt_to_page() which already does a PFN_DOWN(vir_to_phys(kaddr)). Signed-off-by: Florian Fainelli Cc: Ralf Baechle Cc: Paul Burton Cc: Maciej W. Rozycki Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15409/ Signed-off-by: James Hogan --- arch/mips/include/asm/page.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index 5f987598054f..ad461216b5a1 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -240,8 +240,8 @@ static inline int pfn_valid(unsigned long pfn) #endif -#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \ - (kaddr)))) +#define virt_to_pfn(kaddr) PFN_DOWN(virt_to_phys((void *)(kaddr))) +#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) extern int __virt_addr_valid(const volatile void *kaddr); #define virt_addr_valid(kaddr) \ -- cgit v1.2.3 From 22b8ba765a726d90e9830ff6134c32b04f12c10f Mon Sep 17 00:00:00 2001 From: James Hogan Date: Mon, 3 Jul 2017 23:41:47 +0100 Subject: MIPS: Fix MIPS64 FP save/restore on 32-bit kernels 32-bit kernels can be configured to support MIPS64, in which case neither CONFIG_64BIT or CONFIG_CPU_MIPS32_R* will be set. This causes the CP0_Status.FR checks at the point of floating point register save and restore to be compiled out, which results in odd FP registers not being saved or restored to the task or signal context even when CP0_Status.FR is set. Fix the ifdefs to use CONFIG_CPU_MIPSR2 and CONFIG_CPU_MIPSR6, which are enabled for the relevant revisions of either MIPS32 or MIPS64, along with some other CPUs such as Octeon (r2), Loongson1 (r2), XLP (r2), Loongson 3A R2. The suspect code originates from commit 597ce1723e0f ("MIPS: Support for 64-bit FP with O32 binaries") in v3.14, however the code in __enable_fpu() was consistent and refused to set FR=1, falling back to software FPU emulation. This was suboptimal but should be functionally correct. Commit fcc53b5f6c38 ("MIPS: fpu.h: Allow 64-bit FPU on a 64-bit MIPS R6 CPU") in v4.2 (and stable tagged back to 4.0) later introduced the bug by updating __enable_fpu() to set FR=1 but failing to update the other similar ifdefs to enable FR=1 state handling. Fixes: fcc53b5f6c38 ("MIPS: fpu.h: Allow 64-bit FPU on a 64-bit MIPS R6 CPU") Signed-off-by: James Hogan Cc: Ralf Baechle Cc: Paul Burton Cc: linux-mips@linux-mips.org Cc: # 4.0+ Patchwork: https://patchwork.linux-mips.org/patch/16739/ --- arch/mips/include/asm/asmmacro.h | 8 ++++---- arch/mips/kernel/r4k_fpu.S | 20 ++++++++++---------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index 83054f79f72a..b815d7b3bd27 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h @@ -126,8 +126,8 @@ .endm .macro fpu_save_double thread status tmp -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) sll \tmp, \status, 5 bgez \tmp, 10f fpu_save_16odd \thread @@ -184,8 +184,8 @@ .endm .macro fpu_restore_double thread status tmp -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) sll \tmp, \status, 5 bgez \tmp, 10f # 16 register mode? diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 0a83b1708b3c..8e3a6020c613 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -40,8 +40,8 @@ */ LEAF(_save_fp) EXPORT_SYMBOL(_save_fp) -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) mfc0 t0, CP0_STATUS #endif fpu_save_double a0 t0 t1 # clobbers t1 @@ -52,8 +52,8 @@ EXPORT_SYMBOL(_save_fp) * Restore a thread's fp context. */ LEAF(_restore_fp) -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) mfc0 t0, CP0_STATUS #endif fpu_restore_double a0 t0 t1 # clobbers t1 @@ -246,11 +246,11 @@ LEAF(_save_fp_context) cfc1 t1, fcr31 .set pop -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) .set push SET_HARDFLOAT -#ifdef CONFIG_CPU_MIPS32_R2 +#ifdef CONFIG_CPU_MIPSR2 .set mips32r2 .set fp=64 mfc0 t0, CP0_STATUS @@ -314,11 +314,11 @@ LEAF(_save_fp_context) LEAF(_restore_fp_context) EX lw t1, 0(a1) -#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ - defined(CONFIG_CPU_MIPS32_R6) +#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \ + defined(CONFIG_CPU_MIPSR6) .set push SET_HARDFLOAT -#ifdef CONFIG_CPU_MIPS32_R2 +#ifdef CONFIG_CPU_MIPSR2 .set mips32r2 .set fp=64 mfc0 t0, CP0_STATUS -- cgit v1.2.3 From 547da673173de51f73887377eb275304775064ad Mon Sep 17 00:00:00 2001 From: Maciej W. Rozycki Date: Tue, 7 Nov 2017 19:09:20 +0000 Subject: MIPS: Fix an n32 core file generation regset support regression Fix a commit 7aeb753b5353 ("MIPS: Implement task_user_regset_view.") regression, then activated by commit 6a9c001b7ec3 ("MIPS: Switch ELF core dumper to use regsets.)", that caused n32 processes to dump o32 core files by failing to set the EF_MIPS_ABI2 flag in the ELF core file header's `e_flags' member: $ file tls-core tls-core: ELF 32-bit MSB executable, MIPS, N32 MIPS64 rel2 version 1 (SYSV), [...] $ ./tls-core Aborted (core dumped) $ file core core: ELF 32-bit MSB core file MIPS, MIPS-I version 1 (SYSV), SVR4-style $ Previously the flag was set as the result of a: statement placed in arch/mips/kernel/binfmt_elfn32.c, however in the regset case, i.e. when CORE_DUMP_USE_REGSET is set, ELF_CORE_EFLAGS is no longer used by `fill_note_info' in fs/binfmt_elf.c, and instead the `->e_flags' member of the regset view chosen is. We have the views defined in arch/mips/kernel/ptrace.c, however only an o32 and an n64 one, and the latter is used for n32 as well. Consequently an o32 core file is incorrectly dumped from n32 processes (the ELF32 vs ELF64 class is chosen elsewhere, and the 32-bit one is correctly selected for n32). Correct the issue then by defining an n32 regset view and using it as appropriate. Issue discovered in GDB testing. Fixes: 7aeb753b5353 ("MIPS: Implement task_user_regset_view.") Signed-off-by: Maciej W. Rozycki Cc: Ralf Baechle Cc: Djordje Todorovic Cc: linux-mips@linux-mips.org Cc: # 3.13+ Patchwork: https://patchwork.linux-mips.org/patch/17617/ Signed-off-by: James Hogan --- arch/mips/kernel/ptrace.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 1395654cfc8d..5a09c2901a76 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -618,6 +618,19 @@ static const struct user_regset_view user_mips64_view = { .n = ARRAY_SIZE(mips64_regsets), }; +#ifdef CONFIG_MIPS32_N32 + +static const struct user_regset_view user_mipsn32_view = { + .name = "mipsn32", + .e_flags = EF_MIPS_ABI2, + .e_machine = ELF_ARCH, + .ei_osabi = ELF_OSABI, + .regsets = mips64_regsets, + .n = ARRAY_SIZE(mips64_regsets), +}; + +#endif /* CONFIG_MIPS32_N32 */ + #endif /* CONFIG_64BIT */ const struct user_regset_view *task_user_regset_view(struct task_struct *task) @@ -628,6 +641,10 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) #ifdef CONFIG_MIPS32_O32 if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) return &user_mips_view; +#endif +#ifdef CONFIG_MIPS32_N32 + if (test_tsk_thread_flag(task, TIF_32BIT_ADDR)) + return &user_mipsn32_view; #endif return &user_mips64_view; #endif -- cgit v1.2.3 From b6318a903d068e2319eaef95966f4440114973f7 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Fri, 11 Aug 2017 21:56:51 +0100 Subject: MIPS/ptrace: Pick up ptrace/seccomp changed syscalls The MIPS syscall_trace_enter() allows the system call number to be altered or cancelled by a ptrace tracer, via the normal ptrace hook (PTRACE_SYSCALL) and changing the system call number register on entry, and similarly via seccomp (PTRACE_EVENT_SECCOMP when a seccomp filter returns SECCOMP_RET_TRACE). Be sure to update the syscall local variable if this happens, so that seccomp will filter the correct system call number if the normal ptrace hook changes it first, and so that if either the normal ptrace hook or seccomp change it the correct system call number is passed to the trace event. This won't have any effect until the next commit, which fixes ptrace to update thread_info::syscall. Fixes: c2d9f1775731 ("MIPS: Fix syscall_get_nr for the syscall exit tracing.") Signed-off-by: James Hogan Reviewed-by: Kees Cook Cc: Ralf Baechle Cc: Lars Persson Cc: Oleg Nesterov Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16996/ --- arch/mips/kernel/ptrace.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 5a09c2901a76..011993e0cce2 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -881,9 +881,11 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall) current_thread_info()->syscall = syscall; - if (test_thread_flag(TIF_SYSCALL_TRACE) && - tracehook_report_syscall_entry(regs)) - return -1; + if (test_thread_flag(TIF_SYSCALL_TRACE)) { + if (tracehook_report_syscall_entry(regs)) + return -1; + syscall = current_thread_info()->syscall; + } #ifdef CONFIG_SECCOMP if (unlikely(test_thread_flag(TIF_SECCOMP))) { @@ -901,6 +903,7 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall) ret = __secure_computing(&sd); if (ret == -1) return ret; + syscall = current_thread_info()->syscall; } #endif -- cgit v1.2.3 From de8cd0dc834f2294bcf20240ea037c3864bc4f9a Mon Sep 17 00:00:00 2001 From: James Hogan Date: Fri, 11 Aug 2017 21:56:52 +0100 Subject: MIPS/ptrace: Update syscall nr on register changes Update the thread_info::syscall field when registers are modified via ptrace to change or cancel the system call being entered. This is important to allow seccomp and the syscall entry and exit trace events to observe the new syscall number changed by the normal ptrace hook or seccomp. That includes allowing seccomp's recheck of the system call number after SECCOMP_RET_TRACE to notice if the syscall is changed to a denied one, which happens in seccomp since commit ce6526e8afa4 ("seccomp: recheck the syscall after RET_TRACE") in v4.8. In the process of doing this, the logic to determine whether an indirect system call is in progress (i.e. the O32 ABI's syscall()) is abstracted into mips_syscall_is_indirect(), and a new mips_syscall_update_nr() is used to update the thread_info::syscall based on the register state. The following ptrace operations are updated: - PTRACE_SETREGS (ptrace_setregs()). - PTRACE_SETREGSET with NT_PRSTATUS (gpr32_set() and gpr64_set()). - PTRACE_POKEUSR with 2/v0 or 4/a0 for indirect syscall ([compat_]arch_ptrace()). Fixes: c2d9f1775731 ("MIPS: Fix syscall_get_nr for the syscall exit tracing.") Signed-off-by: James Hogan Cc: Ralf Baechle Cc: Lars Persson Cc: Oleg Nesterov Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16995/ --- arch/mips/include/asm/syscall.h | 29 +++++++++++++++++++++++++---- arch/mips/kernel/ptrace.c | 15 +++++++++++++++ arch/mips/kernel/ptrace32.c | 7 +++++++ 3 files changed, 47 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h index 7c713025b23f..0170602a1e4e 100644 --- a/arch/mips/include/asm/syscall.h +++ b/arch/mips/include/asm/syscall.h @@ -26,12 +26,34 @@ #define __NR_syscall 4000 #endif +static inline bool mips_syscall_is_indirect(struct task_struct *task, + struct pt_regs *regs) +{ + /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */ + return (IS_ENABLED(CONFIG_32BIT) || + test_tsk_thread_flag(task, TIF_32BIT_REGS)) && + (regs->regs[2] == __NR_syscall); +} + static inline long syscall_get_nr(struct task_struct *task, struct pt_regs *regs) { return current_thread_info()->syscall; } +static inline void mips_syscall_update_nr(struct task_struct *task, + struct pt_regs *regs) +{ + /* + * v0 is the system call number, except for O32 ABI syscall(), where it + * ends up in a0. + */ + if (mips_syscall_is_indirect(task, regs)) + task_thread_info(task)->syscall = regs->regs[4]; + else + task_thread_info(task)->syscall = regs->regs[2]; +} + static inline unsigned long mips_get_syscall_arg(unsigned long *arg, struct task_struct *task, struct pt_regs *regs, unsigned int n) { @@ -98,10 +120,9 @@ static inline void syscall_get_arguments(struct task_struct *task, unsigned long *args) { int ret; - /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */ - if ((IS_ENABLED(CONFIG_32BIT) || - test_tsk_thread_flag(task, TIF_32BIT_REGS)) && - (regs->regs[2] == __NR_syscall)) + + /* O32 ABI syscall() */ + if (mips_syscall_is_indirect(task, regs)) i++; while (n--) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 011993e0cce2..efbd8df8b665 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -144,6 +144,9 @@ int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data) /* badvaddr, status, and cause may not be written. */ + /* System call number may have been changed */ + mips_syscall_update_nr(child, regs); + return 0; } @@ -345,6 +348,9 @@ static int gpr32_set(struct task_struct *target, } } + /* System call number may have been changed */ + mips_syscall_update_nr(target, regs); + return 0; } @@ -405,6 +411,9 @@ static int gpr64_set(struct task_struct *target, } } + /* System call number may have been changed */ + mips_syscall_update_nr(target, regs); + return 0; } @@ -770,6 +779,12 @@ long arch_ptrace(struct task_struct *child, long request, switch (addr) { case 0 ... 31: regs->regs[addr] = data; + /* System call number may have been changed */ + if (addr == 2) + mips_syscall_update_nr(child, regs); + else if (addr == 4 && + mips_syscall_is_indirect(child, regs)) + mips_syscall_update_nr(child, regs); break; case FPR_BASE ... FPR_BASE + 31: { union fpureg *fregs = get_fpu_regs(child); diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 40e212d6b26b..2b9260f92ccd 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -195,6 +196,12 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, switch (addr) { case 0 ... 31: regs->regs[addr] = data; + /* System call number may have been changed */ + if (addr == 2) + mips_syscall_update_nr(child, regs); + else if (addr == 4 && + mips_syscall_is_indirect(child, regs)) + mips_syscall_update_nr(child, regs); break; case FPR_BASE ... FPR_BASE + 31: { union fpureg *fregs = get_fpu_regs(child); -- cgit v1.2.3 From fe1a5cbc78f7ac00f763c34d2b5b0273f5c4b951 Mon Sep 17 00:00:00 2001 From: Mathieu Malaterre Date: Fri, 8 Sep 2017 20:35:54 +0200 Subject: watchdog: jz4780: Allow selection of jz4740-wdt driver This driver works for jz4740 & jz4780. Suggested-by: Maarten ter Huurne Signed-off-by: Mathieu Malaterre Acked-by: Guenter Roeck Cc: Ralf Baechle Cc: Wim Van Sebroeck Cc: Paul Cercueil Cc: linux-mips@linux-mips.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17251/ Signed-off-by: James Hogan --- drivers/watchdog/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c722cbfdc7e6..ca200d1f310a 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -1460,7 +1460,7 @@ config INDYDOG config JZ4740_WDT tristate "Ingenic jz4740 SoC hardware watchdog" - depends on MACH_JZ4740 + depends on MACH_JZ4740 || MACH_JZ4780 select WATCHDOG_CORE help Hardware driver for the built-in watchdog timer on Ingenic jz4740 SoCs. -- cgit v1.2.3 From c7fd89a6407ea3a44a2a2fa12d290162c42499c4 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Fri, 10 Nov 2017 11:46:54 +0000 Subject: MIPS: Fix odd fp register warnings with MIPS64r2 Building 32-bit MIPS64r2 kernels produces warnings like the following on certain toolchains (such as GNU assembler 2.24.90, but not GNU assembler 2.28.51) since commit 22b8ba765a72 ("MIPS: Fix MIPS64 FP save/restore on 32-bit kernels"), due to the exposure of fpu_save_16odd from fpu_save_double and fpu_restore_16odd from fpu_restore_double: arch/mips/kernel/r4k_fpu.S:47: Warning: float register should be even, was 1 ... arch/mips/kernel/r4k_fpu.S:59: Warning: float register should be even, was 1 ... This appears to be because .set mips64r2 does not change the FPU ABI to 64-bit when -march=mips64r2 (or e.g. -march=xlp) is provided on the command line on that toolchain, from the default FPU ABI of 32-bit due to the -mabi=32. This makes access to the odd FPU registers invalid. Fix by explicitly changing the FPU ABI with .set fp=64 directives in fpu_save_16odd and fpu_restore_16odd, and moving the undefine of fp up in asmmacro.h so fp doesn't turn into $30. Fixes: 22b8ba765a72 ("MIPS: Fix MIPS64 FP save/restore on 32-bit kernels") Signed-off-by: James Hogan Cc: Ralf Baechle Cc: Paul Burton Cc: linux-mips@linux-mips.org Cc: # 4.0+: 22b8ba765a72: MIPS: Fix MIPS64 FP save/restore on 32-bit kernels Cc: # 4.0+ Patchwork: https://patchwork.linux-mips.org/patch/17656/ --- arch/mips/include/asm/asmmacro.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index b815d7b3bd27..feb069cbf44e 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h @@ -19,6 +19,9 @@ #include #endif +/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */ +#undef fp + /* * Helper macros for generating raw instruction encodings. */ @@ -105,6 +108,7 @@ .macro fpu_save_16odd thread .set push .set mips64r2 + .set fp=64 SET_HARDFLOAT sdc1 $f1, THREAD_FPR1(\thread) sdc1 $f3, THREAD_FPR3(\thread) @@ -163,6 +167,7 @@ .macro fpu_restore_16odd thread .set push .set mips64r2 + .set fp=64 SET_HARDFLOAT ldc1 $f1, THREAD_FPR1(\thread) ldc1 $f3, THREAD_FPR3(\thread) @@ -234,9 +239,6 @@ .endm #ifdef TOOLCHAIN_SUPPORTS_MSA -/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */ -#undef fp - .macro _cfcmsa rd, cs .set push .set mips32r2 -- cgit v1.2.3 From 8ef4b43cd3794d63052d85898e42424fd3b14d24 Mon Sep 17 00:00:00 2001 From: Mathias Kresin Date: Thu, 11 May 2017 08:11:14 +0200 Subject: MIPS: ralink: Fix MT7628 pinmux According to the datasheet the REFCLK pin is shared with GPIO#37 and the PERST pin is shared with GPIO#36. Fixes: 53263a1c6852 ("MIPS: ralink: add mt7628an support") Signed-off-by: Mathias Kresin Acked-by: John Crispin Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: # 3.19+ Patchwork: https://patchwork.linux-mips.org/patch/16046/ Signed-off-by: James Hogan --- arch/mips/ralink/mt7620.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 9be8b08ae46b..fda073cd7b73 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -145,8 +145,8 @@ static struct rt2880_pmx_func i2c_grp_mt7628[] = { FUNC("i2c", 0, 4, 2), }; -static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) }; -static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) }; +static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 37, 1) }; +static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 36, 1) }; static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) }; static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) }; -- cgit v1.2.3 From 05a67cc258e75ac9758e6f13d26337b8be51162a Mon Sep 17 00:00:00 2001 From: Mathias Kresin Date: Thu, 11 May 2017 08:11:15 +0200 Subject: MIPS: ralink: Fix typo in mt7628 pinmux function There is a typo inside the pinmux setup code. The function is called refclk and not reclk. Fixes: 53263a1c6852 ("MIPS: ralink: add mt7628an support") Signed-off-by: Mathias Kresin Acked-by: John Crispin Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: # 3.19+ Patchwork: https://patchwork.linux-mips.org/patch/16047/ Signed-off-by: James Hogan --- arch/mips/ralink/mt7620.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index fda073cd7b73..41b71c4352c2 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -145,7 +145,7 @@ static struct rt2880_pmx_func i2c_grp_mt7628[] = { FUNC("i2c", 0, 4, 2), }; -static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 37, 1) }; +static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("refclk", 0, 37, 1) }; static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 36, 1) }; static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) }; static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) }; -- cgit v1.2.3 From ab74abcee583eace43f184a29f6d10a4f93b5648 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 20 Feb 2017 10:29:42 +0100 Subject: MIPS: pci: Remove duplicate define in mt7620 driver An invalid and duplicate define has gone unnoticed for some time. lets remove it. The correct define is 3 lines below. Fixes: 7e5873d3755c ("MIPS: pci: Add MT7620a PCIE driver") Signed-off-by: John Crispin Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15320/ Signed-off-by: James Hogan --- arch/mips/pci/pci-mt7620.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index 90fba9bf98da..22e4c22e750b 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -33,7 +33,6 @@ #define RALINK_GPIOMODE 0x60 #define PPLL_CFG1 0x9c -#define PDRV_SW_SET BIT(23) #define PPLL_DRV 0xa0 #define PDRV_SW_SET (1<<31) -- cgit v1.2.3 From 8593b18ad348733b5d5ddfa0c79dcabf51dff308 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 20 Feb 2017 10:29:43 +0100 Subject: MIPS: pci: Remove KERN_WARN instance inside the mt7620 driver Switch the printk() call to the prefered pr_warn() api. Fixes: 7e5873d3755c ("MIPS: pci: Add MT7620a PCIE driver") Signed-off-by: John Crispin Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: # 4.5+ Patchwork: https://patchwork.linux-mips.org/patch/15321/ Signed-off-by: James Hogan --- arch/mips/pci/pci-mt7620.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index 22e4c22e750b..1a0b80a1cc4a 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -120,7 +120,7 @@ static int wait_pciephy_busy(void) else break; if (retry++ > WAITRETRY_MAX) { - printk(KERN_WARN "PCIE-PHY retry failed.\n"); + pr_warn("PCIE-PHY retry failed.\n"); return -1; } } -- cgit v1.2.3 From b54fcf6ae1157b35504dde93581db0810c03b4b7 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 20 Feb 2017 10:29:44 +0100 Subject: MIPS: pci: Make use of the BIT() macro inside the mt7620 driver There are a few defines that manully shift a bit. Change these to using the BIT() macro. Signed-off-by: John Crispin Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15322/ Signed-off-by: James Hogan --- arch/mips/pci/pci-mt7620.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index 1a0b80a1cc4a..407f155f0bb6 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -35,11 +35,11 @@ #define PPLL_CFG1 0x9c #define PPLL_DRV 0xa0 -#define PDRV_SW_SET (1<<31) -#define LC_CKDRVPD (1<<19) -#define LC_CKDRVOHZ (1<<18) -#define LC_CKDRVHZ (1<<17) -#define LC_CKTEST (1<<16) +#define PDRV_SW_SET BIT(31) +#define LC_CKDRVPD BIT(19) +#define LC_CKDRVOHZ BIT(18) +#define LC_CKDRVHZ BIT(17) +#define LC_CKTEST BIT(16) /* PCI Bridge registers */ #define RALINK_PCI_PCICFG_ADDR 0x00 @@ -65,7 +65,7 @@ #define PCIEPHY0_CFG 0x90 #define RALINK_PCIEPHY_P0_CTL_OFFSET 0x7498 -#define RALINK_PCIE0_CLK_EN (1 << 26) +#define RALINK_PCIE0_CLK_EN BIT(26) #define BUSY 0x80000000 #define WAITRETRY_MAX 10 -- cgit v1.2.3 From 4dc4704c0024751fe2b4532cf33c80376f1add70 Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Wed, 24 May 2017 10:55:16 -0700 Subject: MIPS: BMIPS: Enable HARDIRQS_SW_RESEND HW interrupts triggered when irq_disable() were being ignored. Enable resending HW interrupts as SW interrupts. This was causing an issue where the interrupts waking the system up from a suspend state were not calling their interrupt handlers. Signed-off-by: Justin Chen Acked-by: Florian Fainelli Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16116/ Signed-off-by: James Hogan --- arch/mips/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b0dbc35d09e1..43411118dd4f 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -232,6 +232,7 @@ config BMIPS_GENERIC select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select HARDIRQS_SW_RESEND help Build a generic DT-based kernel image that boots on select BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top -- cgit v1.2.3 From a3f143106596d739e7fbc4b84c96b1475247d876 Mon Sep 17 00:00:00 2001 From: Ben Hutchings Date: Wed, 4 Oct 2017 03:46:14 +0100 Subject: MIPS: cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN don't work for 32-bit SMP __cmpxchg64_local_generic() is atomic only w.r.t tasks and interrupts on the same CPU (that's what the 'local' means). We can't use it to implement cmpxchg64() in SMP configurations. So, for 32-bit SMP configurations: - Don't define cmpxchg64() - Don't enable HAVE_VIRT_CPU_ACCOUNTING_GEN, which requires it Fixes: e2093c7b03c1 ("MIPS: Fall back to generic implementation of ...") Fixes: bb877e96bea1 ("MIPS: Add support for full dynticks CPU time accounting") Signed-off-by: Ben Hutchings Cc: Ralf Baechle Cc: Deng-Cheng Zhu Cc: linux-mips@linux-mips.org Cc: # 4.1+ Patchwork: https://patchwork.linux-mips.org/patch/17413/ Signed-off-by: James Hogan --- arch/mips/Kconfig | 2 +- arch/mips/include/asm/cmpxchg.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 43411118dd4f..b09b644cd57c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -64,7 +64,7 @@ config MIPS select HAVE_PERF_EVENTS select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_SYSCALL_TRACEPOINTS - select HAVE_VIRT_CPU_ACCOUNTING_GEN + select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP select IRQ_FORCED_THREADING select MODULES_USE_ELF_RELA if MODULES && 64BIT select MODULES_USE_ELF_REL if MODULES diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 903f3bf48419..ae2b4583b486 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h @@ -202,8 +202,10 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, #else #include #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) +#ifndef CONFIG_SMP #define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n)) #endif +#endif #undef __scbeqz -- cgit v1.2.3 From e0c5f36b2a638fc3298200c385af7f196d3b5cd4 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 12 Oct 2017 12:50:34 -0700 Subject: MIPS: Add iomem resource for kernel bss section. The kexec/kdump tools need to know where the .bss is so it can be included in the core dump. This allows vmcore-dmesg to have access to the dmesg buffers of the crashed kernel as well as allowing the debugger to examine variables in the bss section. Add a request for the bss resource in addition to the already requested code and data sections. Signed-off-by: David Daney Cc: Ralf Baechle Cc: Steven J. Hill , Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17485/ Signed-off-by: James Hogan --- arch/mips/kernel/setup.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index fe3939726765..702c678de116 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -80,6 +80,7 @@ EXPORT_SYMBOL(mips_io_port_base); static struct resource code_resource = { .name = "Kernel code", }; static struct resource data_resource = { .name = "Kernel data", }; +static struct resource bss_resource = { .name = "Kernel bss", }; static void *detect_magic __initdata = detect_memory_region; @@ -927,6 +928,8 @@ static void __init resource_init(void) code_resource.end = __pa_symbol(&_etext) - 1; data_resource.start = __pa_symbol(&_etext); data_resource.end = __pa_symbol(&_edata) - 1; + bss_resource.start = __pa_symbol(&__bss_start); + bss_resource.end = __pa_symbol(&__bss_stop) - 1; for (i = 0; i < boot_mem_map.nr_map; i++) { struct resource *res; @@ -966,6 +969,7 @@ static void __init resource_init(void) */ request_resource(res, &code_resource); request_resource(res, &data_resource); + request_resource(res, &bss_resource); request_crashkernel(res); } } -- cgit v1.2.3