From 51a1588154cb1ddc4fe8fa786324dca398f1a458 Mon Sep 17 00:00:00 2001 From: Jordan Niethe Date: Thu, 27 Aug 2020 14:05:56 +1000 Subject: powerpc: Update documentation of ISA versions for Power10 Update the CPU to ISA Version Mapping document to include Power10 and ISA v3.1. Signed-off-by: Jordan Niethe [mpe: Make sure ISA reference is unique] Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20200827040556.1783-1-jniethe5@gmail.com --- Documentation/powerpc/isa-versions.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/powerpc') diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst index a363d8c1603c..dfcb1097dce4 100644 --- a/Documentation/powerpc/isa-versions.rst +++ b/Documentation/powerpc/isa-versions.rst @@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions. ========= ==================================================================== CPU Architecture version ========= ==================================================================== +Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 Power7 Power ISA v2.06 @@ -32,6 +33,7 @@ Key Features ========== ================== CPU VMX (aka. Altivec) ========== ================== +Power10 Yes Power9 Yes Power8 Yes Power7 Yes @@ -47,6 +49,7 @@ PPC970 Yes ========== ==== CPU VSX ========== ==== +Power10 Yes Power9 Yes Power8 Yes Power7 Yes @@ -62,6 +65,7 @@ PPC970 No ========== ==================================== CPU Transactional Memory ========== ==================================== +Power10 No (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture") Power9 Yes (* see transactional_memory.txt) Power8 Yes Power7 No -- cgit v1.2.3