From 76347344c522da78be29403dda81463ffae2bc99 Mon Sep 17 00:00:00 2001 From: Yash Shah Date: Tue, 8 Dec 2020 10:25:34 +0530 Subject: spi: Update DT binding docs to support SiFive FU740 SoC Add new compatible strings to the DT binding documents to support SiFive FU740-C000. Signed-off-by: Yash Shah Link: https://lore.kernel.org/r/1607403341-57214-3-git-send-email-yash.shah@sifive.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml index 56dcf1d35da4..6e7e394fc1e4 100644 --- a/Documentation/devicetree/bindings/spi/spi-sifive.yaml +++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml @@ -17,15 +17,17 @@ allOf: properties: compatible: items: - - const: sifive,fu540-c000-spi + - enum: + - sifive,fu540-c000-spi + - sifive,fu740-c000-spi - const: sifive,spi0 description: Should be "sifive,-spi" and "sifive,spi". Supported compatible strings are - - "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated - onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive - SPI v0 IP block with no chip integration tweaks. + "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0 + as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0" + for the SiFive SPI v0 IP block with no chip integration tweaks. Please refer to sifive-blocks-ip-versioning.txt for details SPI RTL that corresponds to the IP block version numbers can be found here - -- cgit v1.2.3 From 7b14a272f9ac2438a85e59571fdb5a653d86430b Mon Sep 17 00:00:00 2001 From: Damien Le Moal Date: Sun, 6 Dec 2020 10:18:15 +0900 Subject: dt-bindings: spi: dw-apb-ssi: Add Canaan K210 SPI controller Update the snps,dw-apb-ssi.yaml document to include the compatibility string "canaan,k210-spi" compatible string for the Canaan Kendryte K210 RISC-V SoC DW apb_ssi V4 SPI controller. Signed-off-by: Damien Le Moal Acked-by: Serge Semin Link: https://lore.kernel.org/r/20201206011817.11700-2-damien.lemoal@wdc.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 99ed9b416e94..4825157cd92e 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -65,6 +65,8 @@ properties: const: baikal,bt1-ssi - description: Baikal-T1 System Boot SPI Controller const: baikal,bt1-sys-ssi + - description: Canaan Kendryte K210 SoS SPI Controller + const: canaan,k210-spi reg: minItems: 1 -- cgit v1.2.3 From 2fee9583198eb97b5351feda7bd825e0f778385c Mon Sep 17 00:00:00 2001 From: H. Nikolaus Schaller Date: Wed, 9 Dec 2020 10:57:44 +0100 Subject: spi: dt-bindings: clarify CS behavior for spi-cs-high and gpio descriptors Behavior of CS signal in combination of spi-cs-high and gpio descriptors is not clearly defined and documented. So clarify the documentation Cc: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org Signed-off-by: H. Nikolaus Schaller Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/3bed61807fff6268789e7d411412fbc5cd6ffe2a.1607507863.git.hns@goldelico.com Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/spi-controller.yaml | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 1b56d5e40f1f..5f505810104d 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -42,6 +42,33 @@ properties: cs2 : &gpio1 1 0 cs3 : &gpio1 2 0 + The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0) + or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0. + + There is a special rule set for combining the second flag of an + cs-gpio with the optional spi-cs-high flag for SPI slaves. + + Each table entry defines how the CS pin is to be physically + driven (not considering potential gpio inversions by pinmux): + + device node | cs-gpio | CS pin state active | Note + ================+===============+=====================+===== + spi-cs-high | - | H | + - | - | L | + spi-cs-high | ACTIVE_HIGH | H | + - | ACTIVE_HIGH | L | 1 + spi-cs-high | ACTIVE_LOW | H | 2 + - | ACTIVE_LOW | L | + + Notes: + 1) Should print a warning about polarity inversion. + Here it would be wise to avoid and define the gpio as + ACTIVE_LOW. + 2) Should print a warning about polarity inversion + because ACTIVE_LOW is overridden by spi-cs-high. + Should be generally avoided and be replaced by + spi-cs-high + ACTIVE_HIGH. + num-cs: $ref: /schemas/types.yaml#/definitions/uint32 description: -- cgit v1.2.3