From 6c52573bf4c3a0f6e7142264fb36b31ae2c3707a Mon Sep 17 00:00:00 2001 From: Martin Jücker Date: Mon, 16 May 2022 21:37:09 +0200 Subject: ARM: dts: exynos: add panel and backlight to p4note Add configuration for the LTL101AL01 panel and a pwm backlight to drive the display in the p4note devices. Signed-off-by: Martin Jücker Link: https://lore.kernel.org/r/20220516193709.10037-3-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412-p4note.dtsi | 84 +++++++++++++++++++++++++++----- 1 file changed, 71 insertions(+), 13 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi index 97f131b1014b..1fd051b52387 100644 --- a/arch/arm/boot/dts/exynos4412-p4note.dtsi +++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi @@ -106,6 +106,16 @@ regulator-always-on; }; + panel_vdd: voltage-regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "LCD_ENABLE"; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_enable>; + gpios = <&gpc0 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + wlan_pwrseq: sdhci3-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&gpm3 5 GPIO_ACTIVE_LOW>; @@ -216,6 +226,32 @@ monitored-battery = <&battery_cell>; }; }; + + panel { + compatible = "samsung,ltl101al01"; + pinctrl-0 = <&lvds_nshdn>; + pinctrl-names = "default"; + power-supply = <&panel_vdd>; + enable-gpios = <&gpm0 5 GPIO_ACTIVE_HIGH>; + backlight = <&backlight>; + + port { + lcd_ep: endpoint { + remote-endpoint = <&fimd_ep>; + }; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-0 = <&led_bl_reset>; + pinctrl-names = "default"; + enable-gpios = <&gpm0 1 GPIO_ACTIVE_HIGH>; + pwms = <&pwm 1 78770 0>; + brightness-levels = <0 48 128 255>; + num-interpolated-steps = <8>; + default-brightness-level = <12>; + }; }; &adc { @@ -295,22 +331,19 @@ }; &fimd { - pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>; + pinctrl-0 = <&lcd_clk &lcd_data24>; pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; - display-timings { - timing0 { - clock-frequency = <66666666>; - hactive = <1280>; - vactive = <800>; - hfront-porch = <18>; - hback-porch = <36>; - hsync-len = <16>; - vback-porch = <16>; - vfront-porch = <4>; - vsync-len = <3>; - hsync-active = <1>; + samsung,invert-vclk; + + port@3 { + reg = <3>; + + fimd_ep: endpoint { + remote-endpoint = <&lcd_ep>; }; }; }; @@ -687,6 +720,12 @@ samsung,pin-pud = ; }; + lcd_enable: lcd-enable-pins { + samsung,pins = "gpc0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, NONE); PIN_SLP(gpa0-1, OUT0, NONE); @@ -809,12 +848,24 @@ /* 0 = CP, 1 = AP (serial output) */ }; + led_bl_reset: led-bl-reset-pins { + samsung,pins = "gpm0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + tsp_rst: tsp-rst-pins { samsung,pins = "gpm0-4"; samsung,pin-function = ; samsung,pin-pud = ; }; + lvds_nshdn: lvds-nshdn-pins { + samsung,pins = "gpm0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + tsp_irq: tsp-irq-pins { samsung,pins = "gpm2-3"; samsung,pin-function = ; @@ -1100,6 +1151,13 @@ assigned-clock-parents = <&clock CLK_XUSBXTI>; }; +&pwm { + pinctrl-0 = <&pwm1_out>; + pinctrl-names = "default"; + samsung,pwm-outputs = <1>; + status = "okay"; +}; + &rtc { clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; clock-names = "rtc", "rtc_src"; -- cgit v1.2.3 From 4f05f03e8f8bf5c609adca829ae9857fb9f6de3e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:35:46 +0200 Subject: ARM: dts: sun5i: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Acked-by: Jernej Skrabec Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220526203547.830848-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/sun5i-a13-licheepi-one.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts index 2ce361f8fede..3a6c4bd0a44f 100644 --- a/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts +++ b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts @@ -67,18 +67,18 @@ compatible = "gpio-leds"; led-0 { - label ="licheepi:red:usr"; + label = "licheepi:red:usr"; gpios = <&pio 2 5 GPIO_ACTIVE_LOW>; }; led-1 { - label ="licheepi:green:usr"; + label = "licheepi:green:usr"; gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; default-state = "on"; }; led-2 { - label ="licheepi:blue:usr"; + label = "licheepi:blue:usr"; gpios = <&pio 2 4 GPIO_ACTIVE_LOW>; }; -- cgit v1.2.3 From 3b0a91e586dc92da738af9eb35352d5897b8b279 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:43:23 +0200 Subject: ARM: dts: exynos: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220526204323.832243-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos3250-artik5.dtsi | 2 +- arch/arm/boot/dts/exynos4210-trats.dts | 2 +- arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi | 2 +- arch/arm/boot/dts/exynos5.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi index 7b429622a288..0ac3f284fbb8 100644 --- a/arch/arm/boot/dts/exynos3250-artik5.dtsi +++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi @@ -357,7 +357,7 @@ &pinctrl_1 { bten: bten-pins { - samsung,pins ="gpx1-7"; + samsung,pins = "gpx1-7"; samsung,pin-function = ; samsung,pin-pud = ; samsung,pin-con-pdn = ; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 01f44d95f671..b8e9dd23fc51 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -180,7 +180,7 @@ vdd3-supply = <&vcclcd_reg>; vci-supply = <&vlcd_reg>; reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; - power-on-delay= <50>; + power-on-delay = <50>; reset-delay = <100>; init-delay = <100>; flip-horizontal; diff --git a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi index 03dffc690b79..aa7de6de8e19 100644 --- a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi +++ b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi @@ -107,7 +107,7 @@ vdd3-supply = <&lcd_vdd3_reg>; vci-supply = <&ldo25_reg>; reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>; - power-on-delay= <50>; + power-on-delay = <50>; reset-delay = <100>; init-delay = <100>; flip-horizontal; diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 9ce9fb3fc190..c8da0d4b1b33 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -89,7 +89,7 @@ compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x10481000 0x1000>, + reg = <0x10481000 0x1000>, <0x10482000 0x2000>, <0x10484000 0x2000>, <0x10486000 0x2000>; -- cgit v1.2.3 From a07cadf80c85a3ee6a1688fafb71b8c5cabfa904 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 5 Jun 2022 18:37:07 +0200 Subject: ARM: dts: exynos: align MMC node name with dtschema The node names should be generic and MMC controller dtschema expects "mmc". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220605163710.144210-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos3250.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 78dad233ff34..326b9e0ed8d3 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -376,7 +376,7 @@ status = "disabled"; }; - mshc_0: mshc@12510000 { + mshc_0: mmc@12510000 { compatible = "samsung,exynos5420-dw-mshc"; reg = <0x12510000 0x1000>; interrupts = ; @@ -388,7 +388,7 @@ status = "disabled"; }; - mshc_1: mshc@12520000 { + mshc_1: mmc@12520000 { compatible = "samsung,exynos5420-dw-mshc"; reg = <0x12520000 0x1000>; interrupts = ; @@ -400,7 +400,7 @@ status = "disabled"; }; - mshc_2: mshc@12530000 { + mshc_2: mmc@12530000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12530000 0x1000>; interrupts = ; -- cgit v1.2.3 From 729abb9b376efef58d4d5b77f1ce06ce197f459e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 5 Jun 2022 18:05:01 +0200 Subject: ARM: dts: s3c2410: use local header for pinctrl register values The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Chanho Park Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220605160508.134075-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s3c2410-pinctrl.h | 19 +++++++++++++++++ arch/arm/boot/dts/s3c2416-pinctrl.dtsi | 38 +++++++++++++++++----------------- 2 files changed, 38 insertions(+), 19 deletions(-) create mode 100644 arch/arm/boot/dts/s3c2410-pinctrl.h (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s3c2410-pinctrl.h b/arch/arm/boot/dts/s3c2410-pinctrl.h new file mode 100644 index 000000000000..76b6171ae149 --- /dev/null +++ b/arch/arm/boot/dts/s3c2410-pinctrl.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung S3C2410 DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ + +#define S3C2410_PIN_FUNC_INPUT 0 +#define S3C2410_PIN_FUNC_OUTPUT 1 +#define S3C2410_PIN_FUNC_2 2 +#define S3C2410_PIN_FUNC_3 3 + +#endif /* __DTS_ARM_SAMSUNG_S3C2410_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi index 20a7d72827c2..3268366bd8bc 100644 --- a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi +++ b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi @@ -5,7 +5,7 @@ * Copyright (c) 2013 Heiko Stuebner */ -#include +#include "s3c2410-pinctrl.h" &pinctrl_0 { /* @@ -82,91 +82,91 @@ uart0_data: uart0-data-pins { samsung,pins = "gph-0", "gph-1"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart0_fctl: uart0-fctl-pins { samsung,pins = "gph-8", "gph-9"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart1_data: uart1-data-pins { samsung,pins = "gph-2", "gph-3"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart1_fctl: uart1-fctl-pins { samsung,pins = "gph-10", "gph-11"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart2_data: uart2-data-pins { samsung,pins = "gph-4", "gph-5"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart2_fctl: uart2-fctl-pins { samsung,pins = "gph-6", "gph-7"; - samsung,pin-function = ; + samsung,pin-function = ; }; uart3_data: uart3-data-pins { samsung,pins = "gph-6", "gph-7"; - samsung,pin-function = ; + samsung,pin-function = ; }; extuart_clk: extuart-clk-pins { samsung,pins = "gph-12"; - samsung,pin-function = ; + samsung,pin-function = ; }; i2c0_bus: i2c0-bus-pins { samsung,pins = "gpe-14", "gpe-15"; - samsung,pin-function = ; + samsung,pin-function = ; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpe-11", "gpe-12", "gpe-13"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd0_clk: sd0-clk-pins { samsung,pins = "gpe-5"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd0_cmd: sd0-cmd-pins { samsung,pins = "gpe-6"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd0_bus1: sd0-bus1-pins { samsung,pins = "gpe-7"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd0_bus4: sd0-bus4-pins { samsung,pins = "gpe-8", "gpe-9", "gpe-10"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd1_cmd: sd1-cmd-pins { samsung,pins = "gpl-8"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd1_clk: sd1-clk-pins { samsung,pins = "gpl-9"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd1_bus1: sd1-bus1-pins { samsung,pins = "gpl-0"; - samsung,pin-function = ; + samsung,pin-function = ; }; sd1_bus4: sd1-bus4-pins { samsung,pins = "gpl-1", "gpl-2", "gpl-3"; - samsung,pin-function = ; + samsung,pin-function = ; }; }; -- cgit v1.2.3 From d180a6af35843160ef2a80ea6f45ef336f19298e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 5 Jun 2022 18:05:02 +0200 Subject: ARM: dts: s3c64xx: use local header for pinctrl register values The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Chanho Park Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220605160508.134075-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s3c64xx-pinctrl.dtsi | 178 ++++++++++++++++----------------- arch/arm/boot/dts/s3c64xx-pinctrl.h | 27 +++++ 2 files changed, 116 insertions(+), 89 deletions(-) create mode 100644 arch/arm/boot/dts/s3c64xx-pinctrl.h (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi b/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi index 0a3186d57cb5..f53959b7d031 100644 --- a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi +++ b/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi @@ -9,7 +9,7 @@ * listed as device tree nodes in this file. */ -#include +#include "s3c64xx-pinctrl.h" &pinctrl0 { /* @@ -133,219 +133,219 @@ uart0_data: uart0-data-pins { samsung,pins = "gpa-0", "gpa-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa-2", "gpa-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; uart1_data: uart1-data-pins { samsung,pins = "gpa-4", "gpa-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa-6", "gpa-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; uart2_data: uart2-data-pins { samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; uart3_data: uart3-data-pins { samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; ext_dma_0: ext-dma-0-pins { samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; ext_dma_1: ext-dma-1-pins { samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; irda_data_0: irda-data-0-pins { samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; irda_data_1: irda-data-1-pins { samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; irda_sdbw: irda-sdbw-pins { samsung,pins = "gpb-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2c0_bus: i2c0-bus-pins { samsung,pins = "gpb-5", "gpb-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2c1_bus: i2c1-bus-pins { /* S3C6410-only */ samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpc-0", "gpc-1", "gpc-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; spi0_cs: spi0-cs-pins { samsung,pins = "gpc-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpc-4", "gpc-5", "gpc-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; spi1_cs: spi1-cs-pins { samsung,pins = "gpc-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd0_cmd: sd0-cmd-pins { samsung,pins = "gpg-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd0_clk: sd0-clk-pins { samsung,pins = "gpg-0"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd0_bus1: sd0-bus1-pins { samsung,pins = "gpg-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd0_bus4: sd0-bus4-pins { samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd0_cd: sd0-cd-pins { samsung,pins = "gpg-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_cmd: sd1-cmd-pins { samsung,pins = "gph-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_clk: sd1-clk-pins { samsung,pins = "gph-0"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_bus1: sd1-bus1-pins { samsung,pins = "gph-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_bus4: sd1-bus4-pins { samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_bus8: sd1-bus8-pins { samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5", "gph-6", "gph-7", "gph-8", "gph-9"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd1_cd: sd1-cd-pins { samsung,pins = "gpg-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd2_clk: sd2-clk-pins { samsung,pins = "gpc-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd2_bus1: sd2-bus1-pins { samsung,pins = "gph-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; sd2_bus4: sd2-bus4-pins { samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2s0_bus: i2s0-bus-pins { samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2s0_cdclk: i2s0-cdclk-pins { samsung,pins = "gpd-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2s1_bus: i2s1-bus-pins { samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2s1_cdclk: i2s1-cdclk-pins { samsung,pins = "gpe-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; @@ -353,50 +353,50 @@ /* S3C6410-only */ samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6", "gph-8", "gph-9"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; i2s2_cdclk: i2s2-cdclk-pins { /* S3C6410-only */ samsung,pins = "gph-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pcm0_bus: pcm0-bus-pins { samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pcm0_extclk: pcm0-extclk-pins { samsung,pins = "gpd-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pcm1_bus: pcm1-bus-pins { samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pcm1_extclk: pcm1-extclk-pins { samsung,pins = "gpe-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; ac97_bus_0: ac97-bus-0-pins { samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; ac97_bus_1: ac97-bus-1-pins { samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; @@ -404,242 +404,242 @@ samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4", "gpf-5", "gpf-6", "gpf-7", "gpf-8", "gpf-9", "gpf-10", "gpf-11", "gpf-12"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; cam_rst: cam-rst-pins { samsung,pins = "gpf-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; cam_field: cam-field-pins { /* S3C6410-only */ samsung,pins = "gpb-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pwm_extclk: pwm-extclk-pins { samsung,pins = "gpf-13"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pwm0_out: pwm0-out-pins { samsung,pins = "gpf-14"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpf-15"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; clkout0: clkout-0-pins { samsung,pins = "gpf-14"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col0_0: keypad-col0-0-pins { samsung,pins = "gph-0"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col1_0: keypad-col1-0-pins { samsung,pins = "gph-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col2_0: keypad-col2-0-pins { samsung,pins = "gph-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col3_0: keypad-col3-0-pins { samsung,pins = "gph-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col4_0: keypad-col4-0-pins { samsung,pins = "gph-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col5_0: keypad-col5-0-pins { samsung,pins = "gph-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col6_0: keypad-col6-0-pins { samsung,pins = "gph-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col7_0: keypad-col7-0-pins { samsung,pins = "gph-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col0_1: keypad-col0-1-pins { samsung,pins = "gpl-0"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col1_1: keypad-col1-1-pins { samsung,pins = "gpl-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col2_1: keypad-col2-1-pins { samsung,pins = "gpl-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col3_1: keypad-col3-1-pins { samsung,pins = "gpl-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col4_1: keypad-col4-1-pins { samsung,pins = "gpl-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col5_1: keypad-col5-1-pins { samsung,pins = "gpl-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col6_1: keypad-col6-1-pins { samsung,pins = "gpl-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_col7_1: keypad-col7-1-pins { samsung,pins = "gpl-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row0_0: keypad-row0-0-pins { samsung,pins = "gpk-8"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row1_0: keypad-row1-0-pins { samsung,pins = "gpk-9"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row2_0: keypad-row2-0-pins { samsung,pins = "gpk-10"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row3_0: keypad-row3-0-pins { samsung,pins = "gpk-11"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row4_0: keypad-row4-0-pins { samsung,pins = "gpk-12"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row5_0: keypad-row5-0-pins { samsung,pins = "gpk-13"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row6_0: keypad-row6-0-pins { samsung,pins = "gpk-14"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row7_0: keypad-row7-0-pins { samsung,pins = "gpk-15"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row0_1: keypad-row0-1-pins { samsung,pins = "gpn-0"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row1_1: keypad-row1-1-pins { samsung,pins = "gpn-1"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row2_1: keypad-row2-1-pins { samsung,pins = "gpn-2"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row3_1: keypad-row3-1-pins { samsung,pins = "gpn-3"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row4_1: keypad-row4-1-pins { samsung,pins = "gpn-4"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row5_1: keypad-row5-1-pins { samsung,pins = "gpn-5"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row6_1: keypad-row6-1-pins { samsung,pins = "gpn-6"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; keypad_row7_1: keypad-row7-1-pins { samsung,pins = "gpn-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; @@ -648,7 +648,7 @@ "gpi-7", "gpi-10", "gpi-11", "gpi-12", "gpi-13", "gpi-14", "gpi-15", "gpj-3", "gpj-4", "gpj-5", "gpj-6", "gpj-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; @@ -658,7 +658,7 @@ "gpi-12", "gpi-13", "gpi-14", "gpi-15", "gpj-2", "gpj-3", "gpj-4", "gpj-5", "gpj-6", "gpj-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; @@ -669,14 +669,14 @@ "gpi-12", "gpi-13", "gpi-14", "gpi-15", "gpj-0", "gpj-1", "gpj-2", "gpj-3", "gpj-4", "gpj-5", "gpj-6", "gpj-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; hsi_bus: hsi-bus-pins { samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3", "gpk-4", "gpk-5", "gpk-6", "gpk-7"; - samsung,pin-function = ; + samsung,pin-function = ; samsung,pin-pud = ; }; }; diff --git a/arch/arm/boot/dts/s3c64xx-pinctrl.h b/arch/arm/boot/dts/s3c64xx-pinctrl.h new file mode 100644 index 000000000000..645c591db357 --- /dev/null +++ b/arch/arm/boot/dts/s3c64xx-pinctrl.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung S3C64xx DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_S3C64XX_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_S3C64XX_PINCTRL_H__ + +#define S3C64XX_PIN_PULL_NONE 0 +#define S3C64XX_PIN_PULL_DOWN 1 +#define S3C64XX_PIN_PULL_UP 2 + +#define S3C64XX_PIN_FUNC_INPUT 0 +#define S3C64XX_PIN_FUNC_OUTPUT 1 +#define S3C64XX_PIN_FUNC_2 2 +#define S3C64XX_PIN_FUNC_3 3 +#define S3C64XX_PIN_FUNC_4 4 +#define S3C64XX_PIN_FUNC_5 5 +#define S3C64XX_PIN_FUNC_6 6 +#define S3C64XX_PIN_FUNC_EINT 7 + +#endif /* __DTS_ARM_SAMSUNG_S3C64XX_PINCTRL_H__ */ -- cgit v1.2.3 From 088b2b856fb2f063c3dfa3676c69221bd98f4da3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 5 Jun 2022 18:05:03 +0200 Subject: ARM: dts: s5pv210: use local header for pinctrl register values The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Chanho Park Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220605160508.134075-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s5pv210-aquila.dts | 4 +- arch/arm/boot/dts/s5pv210-aries.dtsi | 134 ++++----- arch/arm/boot/dts/s5pv210-fascinate4g.dts | 22 +- arch/arm/boot/dts/s5pv210-galaxys.dts | 34 +-- arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 480 +++++++++++++++--------------- arch/arm/boot/dts/s5pv210-pinctrl.h | 39 +++ 6 files changed, 376 insertions(+), 337 deletions(-) create mode 100644 arch/arm/boot/dts/s5pv210-pinctrl.h (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts index bc0b7354b6c0..0f5c6cd0f3a1 100644 --- a/arch/arm/boot/dts/s5pv210-aquila.dts +++ b/arch/arm/boot/dts/s5pv210-aquila.dts @@ -392,7 +392,7 @@ &pinctrl0 { t_flash_detect: t-flash-detect-pins { samsung,pins = "gph3-4"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; }; diff --git a/arch/arm/boot/dts/s5pv210-aries.dtsi b/arch/arm/boot/dts/s5pv210-aries.dtsi index daa1067055c8..5541df4df628 100644 --- a/arch/arm/boot/dts/s5pv210-aries.dtsi +++ b/arch/arm/boot/dts/s5pv210-aries.dtsi @@ -646,183 +646,183 @@ &pinctrl0 { bt_reset: bt-reset-pins { samsung,pins = "gpb-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; wlan_bt_en: wlan-bt-en-pins { samsung,pins = "gpb-5"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; samsung,pin-val = <1>; }; codec_ldo: codec-ldo-pins { samsung,pins = "gpf3-4"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; prox_i2c_pins: gp2a-i2c-pins { samsung,pins = "gpg0-2", "gpg2-2"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; wlan_gpio_rst: wlan-gpio-rst-pins { samsung,pins = "gpg1-2"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; bt_wake: bt-wake-pins { samsung,pins = "gpg3-4"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; gp2a_irq: gp2a-irq-pins { samsung,pins = "gph0-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pmic_dvs_pins: pmic-dvs-pins { samsung,pins = "gph0-3", "gph0-4", "gph0-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; samsung,pin-val = <0>; }; pmic_irq: pmic-irq-pins { samsung,pins = "gph0-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; wifi_host_wake: wifi-host-wake-pins { samsung,pins = "gph2-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; bt_host_wake: bt-host-wake-pins { samsung,pins = "gph2-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; musb_irq: musq-irq-pins { samsung,pins = "gph2-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; tf_detect: tf-detect-pins { samsung,pins = "gph3-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; wifi_wake: wifi-wake-pins { samsung,pins = "gph3-5"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; magnetometer_i2c_pins: yas529-i2c-pins-pins { samsung,pins = "gpj0-0", "gpj0-1"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; ts_irq: ts-irq-pins { samsung,pins = "gpj0-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; vibrator_ena: vibrator-ena-pins { samsung,pins = "gpj1-1"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; gp2a_power: gp2a-power-pins { samsung,pins = "gpj1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; touchkey_i2c_pins: touchkey-i2c-pins { samsung,pins = "gpj3-0", "gpj3-1"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; touchkey_vdd_ena: touchkey-vdd-ena-pins { samsung,pins = "gpj3-2"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; musb_i2c_pins: musb-i2c-pins { samsung,pins = "gpj3-4", "gpj3-5"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; accel_i2c_pins: accel-i2c-pins { samsung,pins = "gpj3-6", "gpj3-7"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pmic_i2c_pins: pmic-i2c-pins-pins { samsung,pins = "gpj4-0", "gpj4-3"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; touchkey_irq: touchkey-irq-pins { samsung,pins = "gpj4-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; lcd_spi_pins: spi-lcd-pins { samsung,pins = "mp01-1", "mp04-1", "mp04-3"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; fg_i2c_pins: fg-i2c-pins { samsung,pins = "mp05-0", "mp05-1"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sound_i2c_pins: sound-i2c-pins { samsung,pins = "mp05-2", "mp05-3"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; panel_rst: panel-rst-pins { samsung,pins = "mp05-5"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; }; diff --git a/arch/arm/boot/dts/s5pv210-fascinate4g.dts b/arch/arm/boot/dts/s5pv210-fascinate4g.dts index dfb2ee65e4a8..eae51b197ee9 100644 --- a/arch/arm/boot/dts/s5pv210-fascinate4g.dts +++ b/arch/arm/boot/dts/s5pv210-fascinate4g.dts @@ -128,33 +128,33 @@ headset_det: headset-det-pins { samsung,pins = "gph0-6", "gph3-6"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; fg_irq: fg-irq-pins { samsung,pins = "gph3-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; headset_micbias_ena: headset-micbias-ena-pins { samsung,pins = "gpj2-5"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; earpath_sel: earpath-sel-pins { samsung,pins = "gpj2-6"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; main_micbias_ena: main-micbias-ena-pins { samsung,pins = "gpj4-2"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; /* Based on vendor kernel v2.6.35.7 */ diff --git a/arch/arm/boot/dts/s5pv210-galaxys.dts b/arch/arm/boot/dts/s5pv210-galaxys.dts index a78caaa1f3c5..aaf880792f36 100644 --- a/arch/arm/boot/dts/s5pv210-galaxys.dts +++ b/arch/arm/boot/dts/s5pv210-galaxys.dts @@ -152,47 +152,47 @@ fm_i2c_pins: fm-i2c-pins-pins { samsung,pins = "gpd1-2", "gpd1-3"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; headset_det: headset-det-pins { samsung,pins = "gph0-6", "gph3-6"; - samsung,pin-function = ; - samsung,pin-pud = ; + samsung,pin-function = ; + samsung,pin-pud = ; }; fm_irq: fm-irq-pins { samsung,pins = "gpj2-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; fm_rst: fm-rst-pins { samsung,pins = "gpj2-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; earpath_sel: earpath-sel-pins { samsung,pins = "gpj2-6"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; massmemory_en: massmemory-en-pins { samsung,pins = "gpj2-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; micbias_reg_ena: micbias-reg-ena-pins { samsung,pins = "gpj4-2"; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; /* Based on CyanogenMod 3.0.101 kernel */ diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi index ae34e7e57892..6d6daef9fb7a 100644 --- a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi +++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi @@ -16,13 +16,13 @@ * nodes can be added to this file. */ -#include +#include "s5pv210-pinctrl.h" #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ samsung,pins = #_pin; \ - samsung,pin-con-pdn = ; \ - samsung,pin-pud-pdn = ; \ + samsung,pin-con-pdn = ; \ + samsung,pin-pud-pdn = ; \ } &pinctrl0 { @@ -280,559 +280,559 @@ uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart3_data: uart3-data-pins { samsung,pins = "gpa1-2", "gpa1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; uart_audio: uart-audio-pins { samsung,pins = "gpa1-2", "gpa1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpb-0", "gpb-2", "gpb-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpb-4", "gpb-6", "gpb-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2s0_bus: i2s0-bus-pins { samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", "gpi-4", "gpi-5", "gpi-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2s1_bus: i2s1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pcm1_bus: pcm1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; ac97_bus: ac97-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pcm2_bus: pcm2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spdif_bus: spdif-bus-pins { samsung,pins = "gpc1-0", "gpc1-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; spi2_bus: spi2-bus-pins { samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2c0_bus: i2c0-bus-pins { samsung,pins = "gpd1-0", "gpd1-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2c1_bus: i2c1-bus-pins { samsung,pins = "gpd1-2", "gpd1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; i2c2_bus: i2c2-bus-pins { samsung,pins = "gpd1-4", "gpd1-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pwm0_out: pwm0-out-pins { samsung,pins = "gpd0-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpd0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pwm2_out: pwm2-out-pins { samsung,pins = "gpd0-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; pwm3_out: pwm3-out-pins { samsung,pins = "gpd0-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row0: keypad-row-0-pins { samsung,pins = "gph3-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row1: keypad-row-1-pins { samsung,pins = "gph3-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row2: keypad-row-2-pins { samsung,pins = "gph3-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row3: keypad-row-3-pins { samsung,pins = "gph3-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row4: keypad-row-4-pins { samsung,pins = "gph3-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row5: keypad-row-5-pins { samsung,pins = "gph3-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row6: keypad-row-6-pins { samsung,pins = "gph3-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_row7: keypad-row-7-pins { samsung,pins = "gph3-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col0: keypad-col-0-pins { samsung,pins = "gph2-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col1: keypad-col-1-pins { samsung,pins = "gph2-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col2: keypad-col-2-pins { samsung,pins = "gph2-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col3: keypad-col-3-pins { samsung,pins = "gph2-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col4: keypad-col-4-pins { samsung,pins = "gph2-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col5: keypad-col-5-pins { samsung,pins = "gph2-5"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col6: keypad-col-6-pins { samsung,pins = "gph2-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; keypad_col7: keypad-col-7-pins { samsung,pins = "gph2-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_clk: sd0-clk-pins { samsung,pins = "gpg0-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_cmd: sd0-cmd-pins { samsung,pins = "gpg0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_cd: sd0-cd-pins { samsung,pins = "gpg0-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpg0-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd1_clk: sd1-clk-pins { samsung,pins = "gpg1-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd1_cmd: sd1-cmd-pins { samsung,pins = "gpg1-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd1_cd: sd1-cd-pins { samsung,pins = "gpg1-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpg1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_clk: sd2-clk-pins { samsung,pins = "gpg2-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_cmd: sd2-cmd-pins { samsung,pins = "gpg2-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_cd: sd2-cd-pins { samsung,pins = "gpg2-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpg2-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd2_bus8: sd2-bus-width8-pins { samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd3_clk: sd3-clk-pins { samsung,pins = "gpg3-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd3_cmd: sd3-cmd-pins { samsung,pins = "gpg3-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd3_cd: sd3-cd-pins { samsung,pins = "gpg3-2"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd3_bus1: sd3-bus-width1-pins { samsung,pins = "gpg3-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; sd3_bus4: sd3-bus-width4-pins { samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; eint0: ext-int0-pins { samsung,pins = "gph0-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; eint8: ext-int8-pins { samsung,pins = "gph1-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; eint15: ext-int15-pins { samsung,pins = "gph1-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; eint16: ext-int16-pins { samsung,pins = "gph2-0"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; eint31: ext-int31-pins { samsung,pins = "gph3-7"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_a_io: cam-port-a-io-pins { samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_a_clk_active: cam-port-a-clk-active-pins { samsung,pins = "gpe1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_a_clk_idle: cam-port-a-clk-idle-pins { samsung,pins = "gpe1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_b_io: cam-port-b-io-pins { samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_b_clk_active: cam-port-b-clk-active-pins { samsung,pins = "gpj1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; cam_port_b_clk_idle: cam-port-b-clk-idle-pins { samsung,pins = "gpj1-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpd0-0", "gpd0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; lcd_sync: lcd-sync-pins { samsung,pins = "gpf0-0", "gpf0-1"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; lcd_clk: lcd-clk-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; lcd_data24: lcd-data-width24-pins { @@ -842,8 +842,8 @@ "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; - samsung,pin-function = ; - samsung,pin-pud = ; - samsung,pin-drv = ; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; }; diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.h b/arch/arm/boot/dts/s5pv210-pinctrl.h new file mode 100644 index 000000000000..29bdf376d8f1 --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-pinctrl.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung S5PV210 DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_S5PV210_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_S5PV210_PINCTRL_H__ + +#define S5PV210_PIN_PULL_NONE 0 +#define S5PV210_PIN_PULL_DOWN 1 +#define S5PV210_PIN_PULL_UP 2 + +/* Pin function in power down mode */ +#define S5PV210_PIN_PDN_OUT0 0 +#define S5PV210_PIN_PDN_OUT1 1 +#define S5PV210_PIN_PDN_INPUT 2 +#define S5PV210_PIN_PDN_PREV 3 + +#define S5PV210_PIN_DRV_LV1 0 +#define S5PV210_PIN_DRV_LV2 2 +#define S5PV210_PIN_DRV_LV3 1 +#define S5PV210_PIN_DRV_LV4 3 + +#define S5PV210_PIN_FUNC_INPUT 0 +#define S5PV210_PIN_FUNC_OUTPUT 1 +#define S5PV210_PIN_FUNC_2 2 +#define S5PV210_PIN_FUNC_3 3 +#define S5PV210_PIN_FUNC_4 4 +#define S5PV210_PIN_FUNC_5 5 +#define S5PV210_PIN_FUNC_6 6 +#define S5PV210_PIN_FUNC_EINT 0xf +#define S5PV210_PIN_FUNC_F S5PV210_PIN_FUNC_EINT + +#endif /* __DTS_ARM_SAMSUNG_S5PV210_PINCTRL_H__ */ -- cgit v1.2.3 From f7b462646e81238ff278f731384832582229feab Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 5 Jun 2022 18:05:04 +0200 Subject: ARM: dts: exynos: use local header for pinctrl register values The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Chanho Park Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220605160508.134075-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos-pinctrl.h | 55 +++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4412-midas.dtsi | 3 +- arch/arm/boot/dts/exynos4412-p4note.dtsi | 2 +- arch/arm/boot/dts/exynos4412-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 2 +- 10 files changed, 65 insertions(+), 9 deletions(-) create mode 100644 arch/arm/boot/dts/exynos-pinctrl.h (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos-pinctrl.h b/arch/arm/boot/dts/exynos-pinctrl.h new file mode 100644 index 000000000000..e3a6df95281c --- /dev/null +++ b/arch/arm/boot/dts/exynos-pinctrl.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung Exynos DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ + +#define EXYNOS_PIN_PULL_NONE 0 +#define EXYNOS_PIN_PULL_DOWN 1 +#define EXYNOS_PIN_PULL_UP 3 + +/* Pin function in power down mode */ +#define EXYNOS_PIN_PDN_OUT0 0 +#define EXYNOS_PIN_PDN_OUT1 1 +#define EXYNOS_PIN_PDN_INPUT 2 +#define EXYNOS_PIN_PDN_PREV 3 + +/* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ +#define EXYNOS4_PIN_DRV_LV1 0 +#define EXYNOS4_PIN_DRV_LV2 2 +#define EXYNOS4_PIN_DRV_LV3 1 +#define EXYNOS4_PIN_DRV_LV4 3 + +/* Drive strengths for Exynos5260 */ +#define EXYNOS5260_PIN_DRV_LV1 0 +#define EXYNOS5260_PIN_DRV_LV2 1 +#define EXYNOS5260_PIN_DRV_LV4 2 +#define EXYNOS5260_PIN_DRV_LV6 3 + +/* + * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except + * GPIO_HSI block) + */ +#define EXYNOS5420_PIN_DRV_LV1 0 +#define EXYNOS5420_PIN_DRV_LV2 1 +#define EXYNOS5420_PIN_DRV_LV3 2 +#define EXYNOS5420_PIN_DRV_LV4 3 + +#define EXYNOS_PIN_FUNC_INPUT 0 +#define EXYNOS_PIN_FUNC_OUTPUT 1 +#define EXYNOS_PIN_FUNC_2 2 +#define EXYNOS_PIN_FUNC_3 3 +#define EXYNOS_PIN_FUNC_4 4 +#define EXYNOS_PIN_FUNC_5 5 +#define EXYNOS_PIN_FUNC_6 6 +#define EXYNOS_PIN_FUNC_EINT 0xf +#define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT + +#endif /* __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index cc30d154ec94..011ba2eff29e 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_IN(_pin, _pull, _drv) \ pin- ## _pin { \ diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 6373009bb727..76f44ae0de46 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -11,7 +11,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi index 23f50c9be527..b967397a46c5 100644 --- a/arch/arm/boot/dts/exynos4412-midas.dtsi +++ b/arch/arm/boot/dts/exynos4412-midas.dtsi @@ -12,11 +12,12 @@ /dts-v1/; #include "exynos4412.dtsi" #include "exynos4412-ppmu-common.dtsi" + #include #include #include #include -#include +#include "exynos-pinctrl.h" / { compatible = "samsung,midas", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi index 1fd051b52387..7a515b87bc7c 100644 --- a/arch/arm/boot/dts/exynos4412-p4note.dtsi +++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi @@ -15,8 +15,8 @@ #include #include #include -#include #include +#include "exynos-pinctrl.h" / { compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi index 88b8afd55664..58847d4fa846 100644 --- a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 918947a3897e..48732edadff1 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi index 150607f8103d..43e4a541f479 100644 --- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi index 6c7814b4372e..f7b923382892 100644 --- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -6,7 +6,7 @@ * https://www.hardkernel.com */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 546ba274f4e5..14cf9c4ca0ed 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpy7: gpy7-gpio-bank { -- cgit v1.2.3 From 70e76f7344e59266e8a97cfe64d0d7c081652b35 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 3 Jun 2022 16:46:27 +0200 Subject: ARM: dts: rockchip: enable nfc node in rk3066a-mk808.dts Enable nfc node in rk3066a-mk808.dts Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20220603144627.23269-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-mk808.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts index 667d57a4ff45..cfa318a506eb 100644 --- a/arch/arm/boot/dts/rk3066a-mk808.dts +++ b/arch/arm/boot/dts/rk3066a-mk808.dts @@ -160,6 +160,24 @@ status = "okay"; }; +&nfc { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + nand@0 { + reg = <0>; + label = "rk-nand"; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <40>; + nand-is-boot-medium; + rockchip,boot-blks = <8>; + rockchip,boot-ecc-strength = <24>; + }; +}; + &pinctrl { usb-host { host_drv: host-drv { -- cgit v1.2.3 From e0c5341acdbeb5c900f3204cf279153c1c8b7433 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Mon, 14 Mar 2022 09:44:05 +0100 Subject: ARM: dts: add clock support for Airoha EN7523 This driver only registers fixed rate clocks, since the clocks are fully initialized by the boot loader and should not be changed later, according to Airoha. Signed-off-by: Felix Fietkau Link: https://lore.kernel.org/r/20220314084409.84394-4-nbd@nbd.name Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/en7523.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index 36597f587f46..2e705b87b6c1 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -83,6 +84,13 @@ }; }; + scu: system-controller@1fa20000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller@9000000 { compatible = "arm,gic-v3"; interrupt-controller; -- cgit v1.2.3 From 1db2c0f7e8cedc3552e6742e0bffbdb8d1b3cb2a Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Tue, 7 Jun 2022 17:50:28 +0200 Subject: ARM: dts: bcm283x: Drop unnecessary properties from dpi node Since commit 094536003e06 ("dt-bindings: display: Convert VC4 bindings to schemas") it has been defined that the properties '#address-cells' and '#size-cells' are not necessary for the dpi node. This results in a warning during dtbs_check: dpi@7e208000: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+' Since we don't need a reg property to differentiate between multiple ports, drop them from the dtsi file. Suggested-by: Maxime Ripard Signed-off-by: Stefan Wahren Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm283x.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index c113661a6668..6f99b70e1db0 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -352,8 +352,6 @@ clocks = <&clocks BCM2835_CLOCK_VPU>, <&clocks BCM2835_CLOCK_DPI>; clock-names = "core", "pixel"; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; -- cgit v1.2.3 From fc85b7e64acb7fa45b37aeb2b0a4035bd9c5aed0 Mon Sep 17 00:00:00 2001 From: Anand Gore Date: Mon, 16 May 2022 10:38:06 -0700 Subject: ARM: dts: add dts files for bcmbca soc 63178 Add dts for ARMv7 based broadband SoC BCM63178. bcm63178.dtsi is the SoC description dts header and bcm963178.dts is a simple dts file for Broadcom BCM963178 Reference board that only enable the UART port. Signed-off-by: Anand Gore Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/bcm63178.dtsi | 118 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm963178.dts | 30 ++++++++++ 3 files changed, 150 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/bcm63178.dtsi create mode 100644 arch/arm/boot/dts/bcm963178.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 184899808ee7..d68e8c20791e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -182,7 +182,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ - bcm947622.dtb + bcm947622.dtb \ + bcm963178.dtb dtb-$(CONFIG_ARCH_CLPS711X) += \ ep7211-edb7211.dtb dtb-$(CONFIG_ARCH_DAVINCI) += \ diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi new file mode 100644 index 000000000000..5463443f0762 --- /dev/null +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm63178", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + cpu_off = <1>; + cpu_on = <2>; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x4000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm963178.dts b/arch/arm/boot/dts/bcm963178.dts new file mode 100644 index 000000000000..fa096e9cde23 --- /dev/null +++ b/arch/arm/boot/dts/bcm963178.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63178.dtsi" + +/ { + model = "Broadcom BCM963178 Reference Board"; + compatible = "brcm,bcm963178", "brcm,bcm63178", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 6bcad714e17399fb3d947f91a0474479f67170d8 Mon Sep 17 00:00:00 2001 From: Anand Gore Date: Thu, 2 Jun 2022 15:16:44 -0700 Subject: ARM: dts: Add DTS files for bcmbca SoC BCM6878 Add dts for ARMv7 based broadband SoC BCM6878. bcm6878.dtsi is the SoC description dts header and bcm96878.dts is a simple dts file for Broadcom BCM96878 Reference board that only enable the UART port. Signed-off-by: Anand Gore Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/bcm6878.dtsi | 110 +++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm96878.dts | 30 +++++++++++ 3 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/bcm6878.dtsi create mode 100644 arch/arm/boot/dts/bcm96878.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d68e8c20791e..b7905dd8579e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -183,7 +183,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ - bcm963178.dtb + bcm963178.dtb \ + bcm96878.dtb dtb-$(CONFIG_ARCH_CLPS711X) += \ ep7211-edb7211.dtb dtb-$(CONFIG_ARCH_DAVINCI) += \ diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi new file mode 100644 index 000000000000..a7dff596fe1e --- /dev/null +++ b/arch/arm/boot/dts/bcm6878.dtsi @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm6878", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = ; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts new file mode 100644 index 000000000000..8fbc175cb452 --- /dev/null +++ b/arch/arm/boot/dts/bcm96878.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6878.dtsi" + +/ { + model = "Broadcom BCM96878 Reference Board"; + compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From c799b5081448a839a60c90986b81aa677dcf2db6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:43:39 +0200 Subject: ARM: dts: broadcom: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm28155-ap.dts | 8 ++++---- arch/arm/boot/dts/bcm283x.dtsi | 6 +++--- arch/arm/boot/dts/bcm5301x.dtsi | 6 +++--- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm28155-ap.dts b/arch/arm/boot/dts/bcm28155-ap.dts index ead6e9804dbf..78465ad37c5f 100644 --- a/arch/arm/boot/dts/bcm28155-ap.dts +++ b/arch/arm/boot/dts/bcm28155-ap.dts @@ -31,22 +31,22 @@ }; i2c@3e016000 { - status="okay"; + status = "okay"; clock-frequency = <400000>; }; i2c@3e017000 { - status="okay"; + status = "okay"; clock-frequency = <400000>; }; i2c@3e018000 { - status="okay"; + status = "okay"; clock-frequency = <400000>; }; i2c@3500d000 { - status="okay"; + status = "okay"; clock-frequency = <100000>; pmu: pmu@8 { diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 6f99b70e1db0..d2d9c6e67f39 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -50,9 +50,9 @@ trips { cpu-crit { - temperature = <90000>; - hysteresis = <0>; - type = "critical"; + temperature = <90000>; + hysteresis = <0>; + type = "critical"; }; }; diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index 65f8a759f1e3..5fc1b847f4aa 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -568,9 +568,9 @@ trips { cpu-crit { - temperature = <125000>; - hysteresis = <0>; - type = "critical"; + temperature = <125000>; + hysteresis = <0>; + type = "critical"; }; }; -- cgit v1.2.3 From 829205d8410ee358bd6a107ee4d72de424fcd1b4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:35:16 +0200 Subject: ARM: tegra: Adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 2 +- arch/arm/boot/dts/tegra20-asus-tf101.dts | 2 +- arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi | 6 +++--- arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi | 2 +- arch/arm/boot/dts/tegra30-colibri.dtsi | 6 +++--- 5 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts index a170a4ba36c1..bf1126d26aff 100644 --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts @@ -417,7 +417,7 @@ vddio-supply = <&vdd_1v8_sys>; device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/tegra20-asus-tf101.dts b/arch/arm/boot/dts/tegra20-asus-tf101.dts index a054d39db466..f3b0166f7a9c 100644 --- a/arch/arm/boot/dts/tegra20-asus-tf101.dts +++ b/arch/arm/boot/dts/tegra20-asus-tf101.dts @@ -477,7 +477,7 @@ vddio-supply = <&vdd_1v8_sys>; device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi index 2c2ad2a38f04..55e6171a411d 100644 --- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi @@ -63,7 +63,7 @@ gpio@6000d000 { init-mode-hog { gpio-hog; - gpios = , + gpios = , , ; output-low; @@ -820,7 +820,7 @@ vddio-supply = <&vdd_1v8>; device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; }; }; @@ -833,7 +833,7 @@ status = "okay"; touchscreen@10 { - compatible ="elan,ektf3624"; + compatible = "elan,ektf3624"; reg = <0x10>; interrupt-parent = <&gpio>; diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi index cd63e0ef7445..1b241f0542b8 100644 --- a/arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dtsi @@ -25,7 +25,7 @@ gpio@6000d000 { init-mode-3g-hog { gpio-hog; - gpios = , + gpios = , , , , diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 22231d450b1b..310dff05910d 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -239,7 +239,7 @@ nvidia,enable-input = ; }; spdif-in-pk6 { - nvidia,pins = "spdif_in_pk6"; + nvidia,pins = "spdif_in_pk6"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; @@ -364,7 +364,7 @@ }; /* Multiplexed and therefore disabled */ cam-mclk-pcc0 { - nvidia,pins = "cam_mclk_pcc0"; + nvidia,pins = "cam_mclk_pcc0"; nvidia,function = "vi_alt3"; nvidia,pull = ; nvidia,tristate = ; @@ -511,7 +511,7 @@ /* Colibri USBC_DET */ spdif-out-pk5 { - nvidia,pins = "spdif_out_pk5"; + nvidia,pins = "spdif_out_pk5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; -- cgit v1.2.3 From c110f7a94015a8da24520c5f460dc461ffc30a34 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:45:52 +0200 Subject: ARM: dts: meson: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20220526204552.832961-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/meson.dtsi | 4 ++-- arch/arm/boot/dts/meson8.dtsi | 2 +- arch/arm/boot/dts/meson8b.dtsi | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 26eaba3fa96f..8e3860d5d916 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -214,14 +214,14 @@ ranges = <0x0 0xc8100000 0x100000>; ao_arc_rproc: remoteproc@1c { - compatible= "amlogic,meson-mx-ao-arc"; + compatible = "amlogic,meson-mx-ao-arc"; reg = <0x1c 0x8>, <0x38 0x8>; reg-names = "remap", "cpu"; status = "disabled"; }; ir_receiver: ir-receiver@480 { - compatible= "amlogic,meson6-ir"; + compatible = "amlogic,meson6-ir"; reg = <0x480 0x20>; interrupts = ; status = "disabled"; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 9997a5d0333a..0f8bac8bac8b 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -430,7 +430,7 @@ }; &ao_arc_rproc { - compatible= "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc"; + compatible = "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc"; amlogic,secbus2 = <&secbus2>; sram = <&ao_arc_sram>; resets = <&reset RESET_MEDIA_CPU>; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 94f1c03decce..cf9c04a61ba3 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -384,7 +384,7 @@ }; &ao_arc_rproc { - compatible= "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc"; + compatible = "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc"; amlogic,secbus2 = <&secbus2>; sram = <&ao_arc_sram>; resets = <&reset RESET_MEDIA_CPU>; -- cgit v1.2.3 From 4b076db78db48c67263ebde810a4475d9503713c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:42:17 +0200 Subject: ARM: dts: rockchip: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204218.832029-2-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-veyron-broadcom-bluetooth.dtsi | 10 +++++----- arch/arm/boot/dts/rv1108-elgin-r1.dts | 14 +++++++------- arch/arm/boot/dts/rv1108-evb.dts | 14 +++++++------- arch/arm/boot/dts/rv1108.dtsi | 2 +- 4 files changed, 20 insertions(+), 20 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/rk3288-veyron-broadcom-bluetooth.dtsi b/arch/arm/boot/dts/rk3288-veyron-broadcom-bluetooth.dtsi index a10d25ac8f7b..f9dde0eef527 100644 --- a/arch/arm/boot/dts/rk3288-veyron-broadcom-bluetooth.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-broadcom-bluetooth.dtsi @@ -13,10 +13,10 @@ <&bt_dev_wake>; compatible = "brcm,bcm43540-bt"; - host-wakeup-gpios = <&gpio4 RK_PD7 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; - device-wakeup-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - max-speed = <3000000>; - brcm,bt-pcm-int-params = [01 02 00 01 01]; + host-wakeup-gpios = <&gpio4 RK_PD7 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + max-speed = <3000000>; + brcm,bt-pcm-int-params = [01 02 00 01 01]; }; }; diff --git a/arch/arm/boot/dts/rv1108-elgin-r1.dts b/arch/arm/boot/dts/rv1108-elgin-r1.dts index 0c99a5934ebf..2d9994379eb2 100644 --- a/arch/arm/boot/dts/rv1108-elgin-r1.dts +++ b/arch/arm/boot/dts/rv1108-elgin-r1.dts @@ -83,7 +83,7 @@ regulators { vdd_core: DCDC_REG1 { - regulator-name= "vdd_core"; + regulator-name = "vdd_core"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1500000>; regulator-always-on; @@ -95,7 +95,7 @@ }; vdd_buck2: DCDC_REG2 { - regulator-name= "vdd_buck2"; + regulator-name = "vdd_buck2"; regulator-min-microvolt = <2200000>; regulator-max-microvolt = <2200000>; regulator-always-on; @@ -106,7 +106,7 @@ }; vcc_ddr: DCDC_REG3 { - regulator-name= "vcc_ddr"; + regulator-name = "vcc_ddr"; regulator-always-on; regulator-boot-on; regulator-state-mem { @@ -115,7 +115,7 @@ }; vcc_io: DCDC_REG4 { - regulator-name= "vcc_io"; + regulator-name = "vcc_io"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; @@ -127,7 +127,7 @@ }; vdd_10: LDO_REG1 { - regulator-name= "vdd_10"; + regulator-name = "vdd_10"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; @@ -138,7 +138,7 @@ }; vcc_18: LDO_REG2 { - regulator-name= "vcc_18"; + regulator-name = "vcc_18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; @@ -149,7 +149,7 @@ }; vdd10_pmu: LDO_REG3 { - regulator-name= "vdd10_pmu"; + regulator-name = "vdd10_pmu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts index 46cad7cb94bf..ef150f4ee99d 100644 --- a/arch/arm/boot/dts/rv1108-evb.dts +++ b/arch/arm/boot/dts/rv1108-evb.dts @@ -96,7 +96,7 @@ regulators { vdd_core: DCDC_REG1 { - regulator-name= "vdd_core"; + regulator-name = "vdd_core"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1500000>; regulator-always-on; @@ -108,7 +108,7 @@ }; vdd_cam: DCDC_REG2 { - regulator-name= "vdd_cam"; + regulator-name = "vdd_cam"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <2000000>; regulator-state-mem { @@ -117,7 +117,7 @@ }; vcc_ddr: DCDC_REG3 { - regulator-name= "vcc_ddr"; + regulator-name = "vcc_ddr"; regulator-always-on; regulator-boot-on; regulator-state-mem { @@ -126,7 +126,7 @@ }; vcc_io: DCDC_REG4 { - regulator-name= "vcc_io"; + regulator-name = "vcc_io"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; @@ -138,7 +138,7 @@ }; vdd_10: LDO_REG1 { - regulator-name= "vdd_10"; + regulator-name = "vdd_10"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; @@ -149,7 +149,7 @@ }; vcc_18: LDO_REG2 { - regulator-name= "vcc_18"; + regulator-name = "vcc_18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; @@ -160,7 +160,7 @@ }; vdd10_pmu: LDO_REG3 { - regulator-name= "vdd10_pmu"; + regulator-name = "vdd10_pmu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index c158a7ea86ec..abf3006f0a84 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -748,7 +748,7 @@ gmac { rmii_pins: rmii-pins { - rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>, + rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>, <1 RK_PC3 2 &pcfg_pull_none>, <1 RK_PC4 2 &pcfg_pull_none>, <1 RK_PB2 3 &pcfg_pull_none_drv_12ma>, -- cgit v1.2.3 From c77c5b25c1353d5db4a7d2213fe12e54ab3a05dd Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 13 May 2022 12:26:13 +0200 Subject: ARM: dts: imx6qdl-colibri: Mux mclk for sgtl5000 with the codec node Move the pin muxing for MCLK used by the codec to the codec node instead of placing it inside the audmux pinctrl group. While no negative effects have been observed this should make sure that MCLK is provided when the codec driver is probed. Follows commit fa51e1dc4b91 ("ARM: dts: imx6qdl-apalis: Fix sgtl5000 detection issue") Reviewed-by: Fabio Estevam Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index c383e0e4110c..f3965884b797 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -520,6 +520,8 @@ compatible = "fsl,sgtl5000"; clocks = <&clks IMX6QDL_CLK_CKO>; lrclk-strength = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; #sound-dai-cells = <0>; VDDA-supply = <®_module_3v3_audio>; @@ -739,8 +741,6 @@ pinctrl_audmux: audmuxgrp { fsl,pins = < - /* SGTL5000 sys_mclk */ - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 @@ -991,6 +991,13 @@ >; }; + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins = < + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 + >; + }; + pinctrl_spdif: spdifgrp { fsl,pins = < MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 -- cgit v1.2.3 From 14092ffbd7fd1d3aa4ea8006c747f225e9147dd6 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 13 May 2022 12:26:14 +0200 Subject: ARM: dts: imx6qdl-colibri: backlight pwm: Simplify inverted backlight Set #pwm-cells to the default 3 to gain access to the parameter which allows inverting the PWM signal. This is useful to specify a backlight which has its highest brightness at 0. With the change to use the PWM with inverted polarity the PWM signal is inverted to how it was before this patch. This changes the meaning of the values in the brightness-levels property. I.e. the duty-cycle changes from x/255 to (255-x)/255. Keeping the brightness-levels will then have a big brightness jump from 0 to 127 duty cycle, the other 6 steps will then be barely noticeable. Change the brightness-levels to provide the same brightness-levels as before. Signed-off-by: Max Krummenacher Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index f3965884b797..4e6a5f63199f 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -6,6 +6,7 @@ */ #include +#include / { model = "Toradex Colibri iMX6DL/S Module"; @@ -13,13 +14,13 @@ backlight: backlight { compatible = "pwm-backlight"; - brightness-levels = <0 127 191 223 239 247 251 255>; - default-brightness-level = <1>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; power-supply = <®_module_3v3>; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 PWM_POLARITY_INVERTED>; status = "disabled"; }; @@ -620,7 +621,6 @@ /* Colibri PWM */ &pwm3 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "disabled"; -- cgit v1.2.3 From 1c231f0b81cbd461e50ad388fed261d81b8c22e3 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 13 May 2022 12:26:15 +0200 Subject: ARM: dts: imx6qdl-colibri: backlight pwm: Adapt brightness steps Adapt the brightness steps as the backlight doesn't light up for very low duty cycles. Reviewed-by: Fabio Estevam Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index 4e6a5f63199f..31908542e26e 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -14,8 +14,8 @@ backlight: backlight { compatible = "pwm-backlight"; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; -- cgit v1.2.3 From dbeb8e72cc51536a70313e6d523dcb1429b40477 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:11 +0200 Subject: ARM: dts: imx7-colibri: overhaul display/touch functionality Rename display interface to match other modules to make it easier to use device tree overlays. The parallel RGB interface (lcdif) and all related stuff turn on in a device tree overlay. Keep them disabled in the main devicetree. As these subsystems are provided by module and not a part of boards, move their definitions into the module-level devicetree. Disable ad7879 touchscreen which turns on in a devic tree overlay. Remains it disabled in the main devicetree. Move Atmel MXT capacitive touch controller device tree nodes from carrier board to module level and add iomux pinctl groups for both the Capacitive Touch Adapter (using SODIMM 28/30) and the capacitive touch connector as found on later carrier boards (using SODIMM 106/107). Keep touchscreen and display nodes enabled for NAND based i.MX 7 modules, since device tree overlays are not yet supported. For the Colibri Evaluation Board keep the Capacitive Touch Adapter node disabled and PWM2, PWM3 enabled instead. For eMMC based modules keep nodes disabled to work in conjunction with device tree overlays. Add the iomuxc pinctrl group for the LVDS transceiver related signals to use it in a device tree overlay. While at it also alphabetically re=order them properties. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 53 ---------------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 66 ++++---------------- arch/arm/boot/dts/imx7-colibri.dtsi | 95 ++++++++++++++++++++++++----- arch/arm/boot/dts/imx7d-colibri-aster.dts | 20 ++++++ arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 32 ++++++++++ arch/arm/boot/dts/imx7s-colibri-aster.dts | 20 ++++++ arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 32 ++++++++++ 7 files changed, 197 insertions(+), 121 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index b770fc937970..950b4e5f6cf4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -4,10 +4,6 @@ * */ - -#include -#include - / { chosen { stdout-path = "serial0:115200n8"; @@ -27,18 +23,6 @@ }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -77,13 +61,6 @@ status = "disabled"; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - status = "okay"; -}; - &fec1 { status = "okay"; }; @@ -91,17 +68,6 @@ &i2c4 { status = "okay"; - /* Microchip/Atmel maxtouch controller */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio2>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ - reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */ - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -109,25 +75,6 @@ }; }; -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 - MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 - >; - }; -}; - -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 3b9df8c82ae3..d6fa74222960 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,18 +34,6 @@ }; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -72,14 +60,6 @@ }; }; -&bl { - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - power-supply = <®_3v3>; - - status = "okay"; -}; - &adc1 { status = "okay"; }; @@ -88,6 +68,18 @@ status = "okay"; }; +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ + status = "disabled"; +}; + &ecspi3 { status = "okay"; @@ -113,21 +105,6 @@ &i2c4 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiotouch>; - reg = <0x4a>; - interrupt-parent = <&gpio1>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ - reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ - status = "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc: rtc@68 { compatible = "st,m41t0"; @@ -135,16 +112,6 @@ }; }; -&lcdif { - status = "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - &pwm1 { status = "okay"; }; @@ -183,12 +150,3 @@ vmmc-supply = <®_3v3>; status = "okay"; }; - -&iomuxc { - pinctrl_gpiotouch: touchgpios { - fsl,pins = < - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 - MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f1c60b0cb143..e20b0977f38f 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -3,13 +3,32 @@ * Copyright 2016-2020 Toradex */ +#include + / { - bl: backlight { + backlight: backlight { + brightness-levels = <0 45 63 88 119 158 203 255>; compatible = "pwm-backlight"; + default-brightness-level = <4>; + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - pwms = <&pwm1 0 5000000 0>; - enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + power-supply = <®_module_3v3>; + pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; + status = "disabled"; + }; + + panel_dpi: panel-dpi { + backlight = <&backlight>; + compatible = "edt,et057090dhu"; + power-supply = <®_3v3>; + status = "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcdif_out>; + }; + }; }; reg_module_3v3: regulator-module-3v3 { @@ -301,18 +320,19 @@ VDDD-supply = <®_DCDC3>; }; - ad7879@2c { + ad7879_ts: touchscreen@2c { + adi,acquisition-time = /bits/ 8 <1>; + adi,averaging = /bits/ 8 <1>; + adi,conversion-interval = /bits/ 8 <255>; + adi,first-conversion-delay = /bits/ 8 <3>; + adi,median-filter-size = /bits/ 8 <2>; + adi,resistance-plate-x = <120>; compatible = "adi,ad7879-1"; - reg = <0x2c>; interrupt-parent = <&gpio1>; interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + reg = <0x2c>; touchscreen-max-pressure = <4096>; - adi,resistance-plate-x = <120>; - adi,first-conversion-delay = /bits/ 8 <3>; - adi,acquisition-time = /bits/ 8 <1>; - adi,median-filter-size = /bits/ 8 <2>; - adi,averaging = /bits/ 8 <1>; - adi,conversion-interval = /bits/ 8 <255>; + status = "disabled"; }; pmic@33 { @@ -392,12 +412,32 @@ pinctrl-1 = <&pinctrl_i2c4_recovery>; scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "disabled"; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: touchscreen@4a { + compatible = "atmel,maxtouch"; + interrupt-parent = <&gpio2>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_atmel_connector>; + reg = <0x4a>; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ + status = "disabled"; + }; }; &lcdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; + status = "disabled"; + + port { + lcdif_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; }; &pwm1 { @@ -486,7 +526,27 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_gpio7 &pinctrl_usbc_det>; + &pinctrl_usbc_det>; + + /* + * Atmel MXT touchsceen + Capacitive Touch Adapter + * NOTE: This pin group conflicts with pin groups pinctrl_pwm2/pinctrl_pwm3. + * Don't use them simultaneously. + */ + pinctrl_atmel_adapter: atmelconnectorgrp { + fsl,pins = < + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 /* SODIMM 28 / INT */ + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 /* SODIMM 30 / RST */ + >; + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */ + pinctrl_atmel_connector: atmeladaptergrp { + fsl,pins = < + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 / RST */ + MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ + >; + }; pinctrl_gpio1: gpio1-grp { fsl,pins = < @@ -494,8 +554,6 @@ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ - MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ @@ -729,6 +787,15 @@ >; }; + pinctrl_lvds_transceiver: lvdstx { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ + MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ + >; + }; + pinctrl_pwm1: pwm1-grp { fsl,pins = < MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index f3f0537d5a37..ce0e6bb7db37 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -14,6 +14,26 @@ "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 87b132bcd272..c610c50c003a 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -13,6 +13,38 @@ "fsl,imx7d"; }; +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + &usbotg2 { vbus-supply = <®_usbh_vbus>; status = "okay"; diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts index fca4e0a95c1b..87f9e0e079a8 100644 --- a/arch/arm/boot/dts/imx7s-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts @@ -13,3 +13,23 @@ compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index aa70d3f2e2e2..81956c16b95b 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -12,3 +12,35 @@ compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", "fsl,imx7s"; }; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; -- cgit v1.2.3 From b40549e9a07425b5633745de70edbe394898fb01 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:12 +0200 Subject: ARM: dts: imx7-colibri: add mdio phy node Add the MDIO bus with the respective PHY to allow for making changes to that easier. While at it also alphabetically re-order properties and improve indentation. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index e20b0977f38f..074ebb0f8001 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -83,21 +83,34 @@ }; &fec1 { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_enet1>; - pinctrl-1 = <&pinctrl_enet1_sleep>; - clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET_AXI_ROOT_CLK>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>, - <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; - clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; + clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET_AXI_ROOT_CLK>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; + fsl,magic-packet; + phy-handle = <ðphy0>; phy-mode = "rmii"; phy-supply = <®_LDO1>; - fsl,magic-packet; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_enet1>; + pinctrl-1 = <&pinctrl_enet1_sleep>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + micrel,led-mode = <0>; + reg = <0>; + }; + }; }; &flexcan1 { -- cgit v1.2.3 From 417092d5e7c0675c87decd77f142afb7a694874f Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 16 May 2022 15:47:13 +0200 Subject: ARM: dts: imx7-colibri: set lcdif clock source to video pll Use the video PLL as clock source to assure proper pixel clock generation. Signed-off-by: Stefan Agner Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 074ebb0f8001..3c1cfd766645 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -441,6 +441,8 @@ }; &lcdif { + assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; -- cgit v1.2.3 From 136f88458d829987548b3321e7122e05acd78dd9 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 16 May 2022 15:47:14 +0200 Subject: ARM: dts: imx7-colibri: add usb dual-role switching using extcon Add USB dual-role switching using extcon. Signed-off-by: Philippe Schenker Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 8 ++++++++ arch/arm/boot/dts/imx7-colibri.dtsi | 5 ++--- 2 files changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index d6fa74222960..17ad9065646d 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -20,6 +20,13 @@ clock-frequency = <16000000>; }; + extcon_usbc_det: usbc-det { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -141,6 +148,7 @@ }; &usbotg1 { + extcon = <0>, <&extcon_usbc_det>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3c1cfd766645..6df82a67953a 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -512,7 +512,7 @@ }; &usbotg1 { - dr_mode = "host"; + dr_mode = "otg"; }; &usdhc1 { @@ -540,8 +540,7 @@ &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_usbc_det>; + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>; /* * Atmel MXT touchsceen + Capacitive Touch Adapter -- cgit v1.2.3 From cfa7a1e150b991f925d1deda6a6a0d96b0520fbc Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Mon, 16 May 2022 15:47:15 +0200 Subject: ARM: dts: imx7-colibri: improve licensing and compatible strings Migrate to the latest SPDX license identifier, update copyright period and improve compatible strings. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 5 ++--- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 ++-- arch/arm/boot/dts/imx7-colibri.dtsi | 4 ++-- arch/arm/boot/dts/imx7d-colibri-aster.dts | 7 ++++--- arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 8 +++++--- arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 8 +++++--- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++-- arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 7 ++++--- arch/arm/boot/dts/imx7d-colibri.dtsi | 4 ++-- arch/arm/boot/dts/imx7s-colibri-aster.dts | 7 ++++--- arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 7 ++++--- arch/arm/boot/dts/imx7s-colibri.dtsi | 4 ++-- 12 files changed, 38 insertions(+), 31 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 950b4e5f6cf4..bfadb3a3124a 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -1,7 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG - * + * Copyright 2017-2022 Toradex */ / { diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 17ad9065646d..074c96f09191 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ / { diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 6df82a67953a..fa615379a117 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index ce0e6bb7db37..2ed1823c4805 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -10,7 +10,8 @@ / { model = "Toradex Colibri iMX7D on Aster Carrier Board"; - compatible = "toradex,colibri-imx7d-aster", "toradex,colibri-imx7d", + compatible = "toradex,colibri-imx7d-aster", + "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 20480276cb0e..33e1034b75a4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -11,7 +11,9 @@ / { model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board"; compatible = "toradex,colibri-imx7d-emmc-aster", - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; }; &usbotg2 { diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 8ee73c870b12..25d8d4583289 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017 Toradex AG + * Copyright 2017-2022 Toradex */ /dts-v1/; @@ -10,7 +10,9 @@ / { model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3"; compatible = "toradex,colibri-imx7d-emmc-eval-v3", - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; }; &usbotg2 { diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index af39e5370fa1..198e08409d59 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017 Toradex AG + * Copyright 2017-2022 Toradex */ #include "imx7d.dtsi" diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index c610c50c003a..51561388fac5 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ /dts-v1/; @@ -9,7 +9,8 @@ / { model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d", + compatible = "toradex,colibri-imx7d-eval-v3", + "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 219a0404a058..90d25c604de2 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include "imx7d.dtsi" diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts index 87f9e0e079a8..58ebb02d948a 100644 --- a/arch/arm/boot/dts/imx7s-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2020 Toradex AG + * Copyright 2017-2022 Toradex * */ @@ -10,7 +10,8 @@ / { model = "Toradex Colibri iMX7S on Aster Carrier Board"; - compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", + compatible = "toradex,colibri-imx7s-aster", + "toradex,colibri-imx7s", "fsl,imx7s"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index 81956c16b95b..6589c4179177 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ /dts-v1/; @@ -9,7 +9,8 @@ / { model = "Toradex Colibri iMX7S on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", + compatible = "toradex,colibri-imx7s-eval-v3", + "toradex,colibri-imx7s", "fsl,imx7s"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi index 94de220a5965..2ce102b7f5d4 100644 --- a/arch/arm/boot/dts/imx7s-colibri.dtsi +++ b/arch/arm/boot/dts/imx7s-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2016-2020 Toradex + * Copyright 2016-2022 Toradex */ #include "imx7s.dtsi" -- cgit v1.2.3 From fd5d2974652c96935d94301af6eaf6b3585ab330 Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Mon, 16 May 2022 15:47:16 +0200 Subject: ARM: dts: imx7-colibri: improve wake-up with gpio key The pin GPIO1_IO01 externally pulls down, it is required to sequentially connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to trigger a wakeup interrupt. Adding the flag GPIO_PULL_DOWN allows the system to be woken up just connecting the pin GPIO1_IO01 to +3v3. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 2 +- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index bfadb3a3124a..9148c54403f3 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -15,7 +15,7 @@ power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 074c96f09191..4a7e593e9ac6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,7 +34,7 @@ power { label = "Wake-Up"; - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; linux,code = ; debounce-interval = <10>; wakeup-source; -- cgit v1.2.3 From 0ef1969ea5699b00394e1a8c8c7f927b2d0bc5bb Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:17 +0200 Subject: ARM: dts: imx7-colibri: move aliases, chosen, extcon and gpio-keys Move aliases, chosen, extcon and gpio-keys to module-level device tree given they are standard Colibri functionalities. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 18 ---------------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 31 ---------------------------- arch/arm/boot/dts/imx7-colibri.dtsi | 32 +++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 49 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 9148c54403f3..c12de1861c05 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -4,24 +4,6 @@ */ / { - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiokeys>; - - power { - label = "Wake-Up"; - gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 4a7e593e9ac6..2e6678f81af6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -4,15 +4,6 @@ */ / { - aliases { - rtc0 = &rtc; - rtc1 = &snvs_rtc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - /* fixed crystal dedicated to mpc258x */ clk16m: clk16m { compatible = "fixed-clock"; @@ -20,27 +11,6 @@ clock-frequency = <16000000>; }; - extcon_usbc_det: usbc-det { - compatible = "linux,extcon-usb-gpio"; - id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbc_det>; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpiokeys>; - - power { - label = "Wake-Up"; - gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3.3V"; @@ -148,7 +118,6 @@ }; &usbotg1 { - extcon = <0>, <&extcon_usbc_det>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index fa615379a117..c5a58949d664 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -6,6 +6,11 @@ #include / { + aliases { + rtc0 = &rtc; + rtc1 = &snvs_rtc; + }; + backlight: backlight { brightness-levels = <0 45 63 88 119 158 203 255>; compatible = "pwm-backlight"; @@ -18,6 +23,32 @@ status = "disabled"; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + + extcon_usbc_det: usbc-det { + compatible = "linux,extcon-usb-gpio"; + debounce = <25>; + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpiokeys>; + + wakeup { + debounce-interval = <10>; + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ + label = "Wake-Up"; + linux,code = ; + wakeup-source; + }; + }; + panel_dpi: panel-dpi { backlight = <&backlight>; compatible = "edt,et057090dhu"; @@ -513,6 +544,7 @@ &usbotg1 { dr_mode = "otg"; + extcon = <0>, <&extcon_usbc_det>; }; &usdhc1 { -- cgit v1.2.3 From c37e0d58f2482eb9ab6f871f2c02c9983a22f60b Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Mon, 16 May 2022 15:47:18 +0200 Subject: ARM: dts: imx7-colibri: add ethernet aliases Add Ethernet aliases which is required to properly pass MAC address from bootloader. Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 6 ++++++ arch/arm/boot/dts/imx7d-colibri.dtsi | 6 ++++++ 2 files changed, 12 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 198e08409d59..e77f0b26b6fb 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 90d25c604de2..48993abacae4 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -7,6 +7,12 @@ #include "imx7-colibri.dtsi" / { + aliases { + /* Required to properly pass MAC addresses from bootloader. */ + ethernet0 = &fec1; + ethernet1 = &fec2; + }; + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; -- cgit v1.2.3 From 59cb7dfd9b1c8d80d5ee69d18ba5476130242b13 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:19 +0200 Subject: ARM: dts: imx7-colibri: move regulators Move regulators to module-level device tree given they are standard Colibri functionalities. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 27 ---------------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 25 --------------- arch/arm/boot/dts/imx7-colibri.dtsi | 39 ++++++++++++++++++++---- arch/arm/boot/dts/imx7d-colibri-aster.dts | 1 - arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 - arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 1 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 1 - arch/arm/boot/dts/imx7d-colibri.dtsi | 1 + 9 files changed, 35 insertions(+), 62 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index c12de1861c05..440f98dc323d 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,33 +3,6 @@ * Copyright 2017-2022 Toradex */ -/ { - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; -}; - &adc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 2e6678f81af6..33a9cbbca0d2 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -10,31 +10,6 @@ #clock-cells = <0>; clock-frequency = <16000000>; }; - - reg_3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; - vin-supply = <®_5v0>; - }; }; &adc1 { diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index c5a58949d664..329638985db6 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -62,20 +62,47 @@ }; }; - reg_module_3v3: regulator-module-3v3 { + reg_3v3: regulator-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V"; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5V"; }; - reg_module_3v3_avdd: regulator-module-3v3-avdd { + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3_AVDD_AUDIO"; - regulator-min-microvolt = <3300000>; + regulator-always-on; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3"; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_AVDD_AUDIO"; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_reg>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "VCC_USB[1-4]"; + vin-supply = <®_5v0>; }; sound { diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index 2ed1823c4805..cfd75e3424fa 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -36,6 +36,5 @@ }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 33e1034b75a4..7b4451699478 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -17,6 +17,5 @@ }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 25d8d4583289..3e84018392ee 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -16,6 +16,5 @@ }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index e77f0b26b6fb..45b12b0d8710 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -47,6 +47,7 @@ &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; &usdhc3 { diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 51561388fac5..7aabe5691459 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -47,6 +47,5 @@ }; &usbotg2 { - vbus-supply = <®_usbh_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index 48993abacae4..d1469aa8b025 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -29,4 +29,5 @@ &usbotg2 { dr_mode = "host"; + vbus-supply = <®_usbh_vbus>; }; -- cgit v1.2.3 From fe20bfa51c055e50f6abd1189397cfb3c425b402 Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Mon, 16 May 2022 15:47:20 +0200 Subject: ARM: dts: imx7-colibri: add delay for on-module phy supply There is a significant time required for PHY Micrel KSZ8041 to power up. Add a delay on start-up/wake-up before the FEC starts communicating with the PHY. LDO1 takes 6 ms, R39 + C44 takes ~100ms, the KSZ8041 datasheet asks for ~11 ms before starting any programming on the MIIM. Counting that, add a 200 ms delay to be sure the PHY is ready for programming. Also, add the same off delay time to give the capacitor time to discharge in order to properly reset. Signed-off-by: Oleksandr Suvorov Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 329638985db6..09dbd262dad1 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -94,6 +94,17 @@ regulator-name = "+V3.3_AVDD_AUDIO"; }; + reg_module_3v3_eth: regulator-module-3v3-eth { + compatible = "regulator-fixed"; + off-on-delay-us = <200000>; + regulator-name = "+V3.3_ETH"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + startup-delay-us = <200000>; + vin-supply = <®_LDO1>; + }; + reg_usbh_vbus: regulator-usbh-vbus { compatible = "regulator-fixed"; gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ @@ -153,7 +164,7 @@ fsl,magic-packet; phy-handle = <ðphy0>; phy-mode = "rmii"; - phy-supply = <®_LDO1>; + phy-supply = <®_module_3v3_eth>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet1>; pinctrl-1 = <&pinctrl_enet1_sleep>; @@ -440,7 +451,7 @@ }; reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ - regulator-min-microvolt = <1800000>; + regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; -- cgit v1.2.3 From 0c1356e084496ee1f288eda286acac6ec991d913 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:21 +0200 Subject: ARM: dts: imx7-colibri: clean-up usdhc1 and add sleep config Adding no-1-8-v property to usdhc1 to disable +1.8V signaling (UHS-I) mode on SoM dtsi level. Clean up no-1-8-v from Aster carrier board dtsi, which is using defaults from SoM dtsi and is not UHS-I capable. A carrier board may have a MMC/SD card slot with a switchable power supply. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 5 +- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 3 -- arch/arm/boot/dts/imx7-colibri.dtsi | 75 +++++++++++++++++++---------- 3 files changed, 51 insertions(+), 32 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 440f98dc323d..f3a5cb7d6a0c 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -61,10 +61,7 @@ status = "okay"; }; +/* Colibri MMC/SD */ &usdhc1 { - keep-power-in-suspend; - no-1-8-v; - wakeup-source; - vmmc-supply = <®_3v3>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 33a9cbbca0d2..618831e89ce8 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -97,8 +97,5 @@ }; &usdhc1 { - keep-power-in-suspend; - wakeup-source; - vmmc-supply = <®_3v3>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 09dbd262dad1..3da9ddc06aae 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -585,12 +585,19 @@ extcon = <0>, <&extcon_usbc_det>; }; +/* Colibri MMC/SD */ &usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; disable-wp; + no-1-8-v; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>; + pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>; + vmmc-supply = <®_3v3>; vqmmc-supply = <®_LDO2>; + wakeup-source; }; &usdhc3 { @@ -949,36 +956,48 @@ >; }; - pinctrl_usdhc1: usdhc1-grp { + pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 /* SODIMM 47 */ + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 /* SODIMM 190 */ + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 /* SODIMM 192 */ + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 /* SODIMM 49 */ + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 /* SODIMM 51 */ + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 /* SODIMM 53 */ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5a - MX7D_PAD_SD1_CLK__SD1_CLK 0x1a - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a >; }; - pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5b - MX7D_PAD_SD1_CLK__SD1_CLK 0x1b - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + >; + }; + + /* Avoid backfeeding with removed card power. */ + pinctrl_usdhc1_sleep: usdhc1-slpgrp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x10 + MX7D_PAD_SD1_CLK__SD1_CLK 0x10 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x10 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x10 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x10 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10 >; }; @@ -1077,9 +1096,15 @@ >; }; - pinctrl_cd_usdhc1: usdhc1-cd-grp { + pinctrl_cd_usdhc1: cdusdhc1grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ + >; + }; + + pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */ + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 >; }; -- cgit v1.2.3 From 5a0e80341496e44e1e1a73487a17aaa25ef07e6a Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:22 +0200 Subject: ARM: dts: imx7-colibri: move rtc node Move I2C RTC to module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +++++------ arch/arm/boot/dts/imx7-colibri.dtsi | 7 +++++++ 3 files changed, 17 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index f3a5cb7d6a0c..9796bfabe241 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -21,12 +21,6 @@ &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -45,6 +39,11 @@ status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 618831e89ce8..e3aac56aece8 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -56,12 +56,6 @@ &i2c4 { status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; }; &pwm1 { @@ -80,6 +74,11 @@ status = "okay"; }; +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 3da9ddc06aae..da3df00c7d67 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -507,6 +507,13 @@ reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ status = "disabled"; }; + + /* M41T0M6 real time clock on carrier board */ + rtc: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + status = "disabled"; + }; }; &lcdif { -- cgit v1.2.3 From ba28db60d34271e8a3cf4d7158d71607e8b1e57f Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:23 +0200 Subject: ARM: dts: imx7d-colibri-emmc: add cpu1 supply Each cpu-core is supposed to list its supply separately, add supply for cpu1. Fixes: 2d7401f8632f ("ARM: dts: imx7d: Add cpu1 supply") Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 45b12b0d8710..2b4be7646631 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -19,6 +19,10 @@ }; }; +&cpu1 { + cpu-supply = <®_DCDC2>; +}; + &gpio6 { gpio-line-names = "", "", -- cgit v1.2.3 From 32f054fef145878c5331f9dd343014970a15ebfa Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:24 +0200 Subject: ARM: dts: imx7-colibri-eval-v3: correct can controller comment Correct CAN controller comment. It is a MCP2515 rather than a mpc258x. Fixes: 66d59b678a87 ("ARM: dts: imx7-colibri: add MCP2515 CAN controller") Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index e3aac56aece8..069f56272546 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -4,7 +4,7 @@ */ / { - /* fixed crystal dedicated to mpc258x */ + /* Fixed crystal dedicated to MCP2515. */ clk16m: clk16m { compatible = "fixed-clock"; #clock-cells = <0>; -- cgit v1.2.3 From 145c4d0a23e0c78a1afb9f321264665809a4420b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:25 +0200 Subject: ARM: dts: imx7-colibri: disable adc2 ADC2 is not available as it conflicts with the AD7879 resistive touchscreen. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 8 -------- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 ---- arch/arm/boot/dts/imx7-colibri.dtsi | 3 ++- 3 files changed, 2 insertions(+), 13 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 9796bfabe241..a89c868ff3ed 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -7,14 +7,6 @@ status = "okay"; }; -/* - * ADC2 is not available on the Aster board and - * conflicts with AD7879 resistive touchscreen. - */ -&adc2 { - status = "disabled"; -}; - &fec1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 069f56272546..6ae38c1f38d4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -16,10 +16,6 @@ status = "okay"; }; -&adc2 { - status = "okay"; -}; - /* * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index da3df00c7d67..0fc4b33d97be 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -137,8 +137,9 @@ vref-supply = <®_DCDC3>; }; +/* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ &adc2 { - vref-supply = <®_DCDC3>; + status = "disabled"; }; &cpu0 { -- cgit v1.2.3 From 9b1617f948ada2e98e559ef6addc9fdf1af05a4f Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:26 +0200 Subject: ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pins Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as either used on Arduino UNO compatible header X18 or Raspberry Pi compatible header X20. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index a89c868ff3ed..117965705814 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -7,6 +7,16 @@ status = "okay"; }; +/* Colibri SSP */ +&ecspi3 { + cs-gpios = < + &gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or */ + &gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */ + &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */ + >; + status = "okay"; +}; + &fec1 { status = "okay"; }; -- cgit v1.2.3 From 12c8aa9b8d41c91cfd8c1e9dd96c0d0f563ee75d Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:27 +0200 Subject: ARM: dts: imx7-colibri: add clarifying comments - Add clarifying comments. - Remove spurious new line. - Add required new line. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 ++ arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 15 +++ arch/arm/boot/dts/imx7-colibri.dtsi | 140 +++++++++++++---------- arch/arm/boot/dts/imx7d-colibri-aster.dts | 2 +- arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 + arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 2 + arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 5 + arch/arm/boot/dts/imx7d-colibri.dtsi | 2 + arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 4 + arch/arm/boot/dts/imx7s-colibri.dtsi | 1 + 11 files changed, 121 insertions(+), 63 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi index 117965705814..fa488a6de0d4 100644 --- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi @@ -3,6 +3,7 @@ * Copyright 2017-2022 Toradex */ +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -17,26 +18,32 @@ status = "okay"; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { status = "okay"; }; +/* Colibri PWM */ &pwm3 { status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -46,18 +53,22 @@ status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 6ae38c1f38d4..441331b09fb4 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -12,6 +12,7 @@ }; }; +/* Colibri AD0 to AD3 */ &adc1 { status = "okay"; }; @@ -28,6 +29,7 @@ status = "disabled"; }; +/* Colibri SSP */ &ecspi3 { status = "okay"; @@ -46,26 +48,34 @@ }; }; +/* Colibri Fast Ethernet */ &fec1 { status = "okay"; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { status = "okay"; }; +/* Colibri PWM */ &pwm1 { status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm4 { status = "okay"; }; @@ -75,22 +85,27 @@ status = "okay"; }; +/* Colibri UART_A */ &uart1 { status = "okay"; }; +/* Colibri UART_B */ &uart2 { status = "okay"; }; +/* Colibri UART_C */ &uart3 { status = "okay"; }; +/* Colibri USBC */ &usbotg1 { status = "okay"; }; +/* Colibri MMC/SD */ &usdhc1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 0fc4b33d97be..4416b7befbfe 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -122,6 +122,7 @@ simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&dailink_master>; simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,cpu { sound-dai = <&sai1>; }; @@ -133,6 +134,7 @@ }; }; +/* Colibri AD0 to AD3 */ &adc1 { vref-supply = <®_DCDC3>; }; @@ -146,12 +148,14 @@ cpu-supply = <®_DCDC2>; }; +/* Colibri SSP */ &ecspi3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ }; +/* Colibri Fast Ethernet */ &fec1 { assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; @@ -174,6 +178,7 @@ #address-cells = <1>; #size-cells = <0>; + /* Micrel KSZ8041RNL */ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; max-speed = <100>; @@ -373,6 +378,7 @@ "SODIMM_137"; }; +/* NAND on such SKUs */ &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -381,6 +387,7 @@ nand-ecc-mode = "hw"; }; +/* On-module Power I2C */ &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -388,7 +395,6 @@ pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>; scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; codec: sgtl5000@a { @@ -488,6 +494,7 @@ }; }; +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ &i2c4 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -532,28 +539,32 @@ }; }; +/* Colibri PWM */ &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; }; +/* Colibri PWM */ &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; }; +/* Colibri PWM */ &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; }; +/* Colibri PWM */ &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; }; ®_1p0d { - vin-supply = <®_DCDC3>; + vin-supply = <®_DCDC3>; /* VDDA_1P8_IN */ }; &sai1 { @@ -562,6 +573,7 @@ status = "okay"; }; +/* Colibri UART_A */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; @@ -571,6 +583,7 @@ fsl,dte-mode; }; +/* Colibri UART_B */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -580,6 +593,7 @@ fsl,dte-mode; }; +/* Colibri UART_C */ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -588,6 +602,7 @@ fsl,dte-mode; }; +/* Colibri USBC */ &usbotg1 { dr_mode = "otg"; extcon = <0>, <&extcon_usbc_det>; @@ -608,6 +623,7 @@ wakeup-source; }; +/* eMMC on 1GB (eMMC) SKUs */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -778,15 +794,15 @@ pinctrl_ecspi3_cs: ecspi3-cs-grp { fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; }; pinctrl_ecspi3: ecspi3-grp { fsl,pins = < - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ >; }; @@ -831,8 +847,8 @@ pinctrl_i2c4: i2c4-grp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f - MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ + MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ >; }; @@ -845,44 +861,44 @@ pinctrl_lcdif_dat: lcdif-dat-grp { fsl,pins = < - MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 - MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 - MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 - MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 - MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 - MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 - MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 - MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 - MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 - MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 - MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 - MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 - MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 - MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 - MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 - MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 - MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 - MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */ + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */ + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */ + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */ + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */ + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */ + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */ + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */ + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */ + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */ + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */ + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */ + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */ + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */ + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */ + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ >; }; pinctrl_lcdif_dat_24: lcdif-dat-24-grp { fsl,pins = < - MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 - MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 - MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 - MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 - MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 - MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */ + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */ + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */ + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ >; }; pinctrl_lcdif_ctrl: lcdif-ctrl-grp { fsl,pins = < - MX7D_PAD_LCD_CLK__LCD_CLK 0x79 - MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 - MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ >; }; @@ -897,70 +913,70 @@ pinctrl_pwm1: pwm1-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ >; }; pinctrl_pwm2: pwm2-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; pinctrl_pwm3: pwm3-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; pinctrl_pwm4: pwm4-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ >; }; pinctrl_uart1: uart1-grp { fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 - MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 - MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ - MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ >; }; pinctrl_uart2: uart2-grp { fsl,pins = < - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 - MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 - MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ + MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ + MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ >; }; pinctrl_uart3: uart3-grp { fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 - MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ >; }; pinctrl_usbc_det: gpio-usbc-det { fsl,pins = < - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; pinctrl_usbh_reg: gpio-usbh-vbus { fsl,pins = < - MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ + MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; }; @@ -1079,14 +1095,14 @@ pinctrl_gpio_lpsr: gpio1-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ >; }; pinctrl_gpiokeys: gpiokeysgrp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ >; }; @@ -1118,8 +1134,8 @@ pinctrl_uart1_ctrl2: uart1-ctrl2-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */ - MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ >; }; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts index cfd75e3424fa..90aaeddfb4f6 100644 --- a/arch/arm/boot/dts/imx7d-colibri-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2017-2022 Toradex - * */ /dts-v1/; @@ -35,6 +34,7 @@ status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts index 7b4451699478..3ec9ef6baaa4 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts @@ -16,6 +16,7 @@ "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts index 3e84018392ee..6d505cb02aad 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts @@ -15,6 +15,7 @@ "fsl,imx7d"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi index 2b4be7646631..2fb4d2133a1b 100644 --- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi @@ -49,11 +49,13 @@ "SODIMM_34"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; }; +/* eMMC */ &usdhc3 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts index 7aabe5691459..c7a8b5aa2408 100644 --- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts @@ -38,14 +38,19 @@ status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri USBH */ &usbotg2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi index d1469aa8b025..531a45b176a1 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dtsi +++ b/arch/arm/boot/dts/imx7d-colibri.dtsi @@ -23,10 +23,12 @@ cpu-supply = <®_DCDC2>; }; +/* NAND */ &gpmi { status = "okay"; }; +/* Colibri USBH */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usbh_vbus>; diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts index 6589c4179177..38de76630d6a 100644 --- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts @@ -38,10 +38,14 @@ status = "okay"; }; +/* Colibri PWM */ &pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; +/* Colibri PWM */ &pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi index 2ce102b7f5d4..ef51395d3537 100644 --- a/arch/arm/boot/dts/imx7s-colibri.dtsi +++ b/arch/arm/boot/dts/imx7s-colibri.dtsi @@ -13,6 +13,7 @@ }; }; +/* NAND */ &gpmi { status = "okay"; }; -- cgit v1.2.3 From 18511d12b1a646cd33683f1efec125acd94bf3ee Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 15:47:28 +0200 Subject: ARM: dts: imx7-colibri: alphabetical re-order Alphabetically re-order device tree iomuxc pinctrl pads, nodes and properties. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 6 +- arch/arm/boot/dts/imx7-colibri.dtsi | 368 ++++++++++++++-------------- 2 files changed, 186 insertions(+), 188 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 441331b09fb4..fea6e4c0d4d6 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -34,13 +34,13 @@ status = "okay"; mcp2515: can@0 { + clocks = <&clk16m>; compatible = "microchip,mcp2515"; + interrupt-parent = <&gpio5>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can_int>; reg = <0>; - clocks = <&clk16m>; - interrupt-parent = <&gpio5>; - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; spi-max-frequency = <10000000>; vdd-supply = <®_3v3>; xceiver-supply = <®_5v0>; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 4416b7befbfe..f29096fca54d 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -118,18 +118,18 @@ sound { compatible = "simple-audio-card"; - simple-audio-card,name = "imx7-sgtl5000"; - simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "imx7-sgtl5000"; simple-audio-card,cpu { sound-dai = <&sai1>; }; dailink_master: simple-audio-card,codec { - sound-dai = <&codec>; clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + sound-dai = <&codec>; }; }; }; @@ -150,9 +150,9 @@ /* Colibri SSP */ &ecspi3 { + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ }; /* Colibri Fast Ethernet */ @@ -380,11 +380,11 @@ /* NAND on such SKUs */ &gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; fsl,use-minimum-ecc; - nand-on-flash-bbt; nand-ecc-mode = "hw"; + nand-on-flash-bbt; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; }; /* On-module Power I2C */ @@ -398,15 +398,15 @@ status = "okay"; codec: sgtl5000@a { - compatible = "fsl,sgtl5000"; #sound-dai-cells = <0>; - reg = <0x0a>; clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; + reg = <0x0a>; VDDA-supply = <®_module_3v3_avdd>; - VDDIO-supply = <®_module_3v3>; VDDD-supply = <®_DCDC3>; + VDDIO-supply = <®_module_3v3>; }; ad7879_ts: touchscreen@2c { @@ -430,65 +430,65 @@ regulators { reg_DCDC1: DCDC1 { /* V1.0_SOC */ - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1000000>; }; reg_DCDC2: DCDC2 { /* V1.1_ARM */ - regulator-min-microvolt = <975000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <975000>; }; reg_DCDC3: DCDC3 { /* V1.8 */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; }; reg_DCDC4: DCDC4 { /* V1.35_DRAM */ - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1350000>; + regulator-min-microvolt = <1350000>; }; reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; reg_LDO2: LDO2 { /* +V1.8_SD */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; reg_LDO4: LDO4 { /* V1.8_LPSR */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; }; reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; }; }; }; @@ -575,31 +575,31 @@ /* Colibri UART_A */ &uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; - uart-has-rtscts; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; + uart-has-rtscts; }; /* Colibri UART_B */ &uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; - uart-has-rtscts; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; }; /* Colibri UART_C */ &uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; fsl,dte-mode; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; }; /* Colibri USBC */ @@ -625,18 +625,18 @@ /* eMMC on 1GB (eMMC) SKUs */ &usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; bus-width = <8>; fsl,tuning-step = <2>; - vmmc-supply = <®_module_3v3>; - vqmmc-supply = <®_DCDC3>; non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; sdhci-caps-mask = <0x80000000 0x0>; + vmmc-supply = <®_module_3v3>; + vqmmc-supply = <®_DCDC3>; }; &iomuxc { @@ -663,13 +663,73 @@ >; }; + pinctrl_can_int: can-int-grp { + fsl,pins = < + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ + >; + }; + + pinctrl_ecspi3: ecspi3-grp { + fsl,pins = < + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ + >; + }; + + pinctrl_ecspi3_cs: ecspi3-cs-grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + >; + }; + + pinctrl_enet1_sleep: enet1sleepgrp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 + MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 + MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 + >; + }; + + pinctrl_flexcan1: flexcan1-grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ + >; + }; + + pinctrl_flexcan2: flexcan2-grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ + >; + }; + pinctrl_gpio1: gpio1-grp { fsl,pins = < - MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ - MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ - MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ - MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ + MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */ @@ -678,47 +738,51 @@ MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 /* SODIMM 121 */ MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14 /* SODIMM 123 */ MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */ - MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ - MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ + MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ + MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ + MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ + MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ + MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ + MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ + MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ + MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */ - MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ - MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ - MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ - MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */ - MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */ + MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ + MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ + MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ + MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ + MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */ MX7D_PAD_EPDC_SDLE__GPIO2_IO17 0x14 /* SODIMM 116 */ MX7D_PAD_EPDC_SDOE__GPIO2_IO18 0x14 /* SODIMM 118 */ MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 0x14 /* SODIMM 120 */ - MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ - MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ - MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ - MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ - MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ - MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ - MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ - MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ - MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ + MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ + MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ + MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ + MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ MX7D_PAD_SD2_CLK__GPIO5_IO12 0x14 /* SODIMM 184 */ MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */ + MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ + MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ + MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ >; }; pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ fsl,pins = < - MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ - MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ - MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ - MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ - MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ - MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ + MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ + MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ + MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x14 /* SODIMM 94 */ MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x14 /* SODIMM 96 */ + MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */ >; }; @@ -736,87 +800,15 @@ pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ fsl,pins = < - MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ + MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ >; }; pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ fsl,pins = < - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ - >; - }; - - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ - fsl,pins = < - MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 - >; - }; - - pinctrl_can_int: can-int-grp { - fsl,pins = < - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ - >; - }; - - pinctrl_enet1: enet1grp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 - - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 - MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 - >; - }; - - pinctrl_enet1_sleep: enet1sleepgrp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 - MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 - MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 - MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 - - MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 - MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 - MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 - MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 - MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 - MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 - >; - }; - - pinctrl_ecspi3_cs: ecspi3-cs-grp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ - >; - }; - - pinctrl_ecspi3: ecspi3-grp { - fsl,pins = < - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ - >; - }; - - pinctrl_flexcan1: flexcan1-grp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ - MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ - >; - }; - - pinctrl_flexcan2: flexcan2-grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ >; }; @@ -828,12 +820,10 @@ pinctrl_gpmi_nand: gpmi-nand-grp { fsl,pins = < - MX7D_PAD_SD3_CLK__NAND_CLE 0x71 - MX7D_PAD_SD3_CMD__NAND_ALE 0x71 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 - MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 - MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 @@ -842,13 +832,21 @@ MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + >; + }; + + pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ + fsl,pins = < + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 >; }; pinctrl_i2c4: i2c4-grp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ >; }; @@ -897,8 +895,8 @@ fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ >; }; @@ -913,8 +911,8 @@ pinctrl_pwm1: pwm1-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ >; }; @@ -932,39 +930,39 @@ pinctrl_pwm4: pwm4-grp { fsl,pins = < - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ >; }; pinctrl_uart1: uart1-grp { fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ >; }; pinctrl_uart2: uart2-grp { fsl,pins = < - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ >; }; pinctrl_uart3: uart3-grp { fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ >; }; @@ -1027,8 +1025,8 @@ pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 @@ -1043,8 +1041,8 @@ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a @@ -1059,8 +1057,8 @@ pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b @@ -1075,10 +1073,10 @@ pinctrl_sai1: sai1-grp { fsl,pins = < - MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f - MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 + MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f + MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f >; }; @@ -1093,6 +1091,18 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_lpsr>; + pinctrl_cd_usdhc1: cdusdhc1grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ + >; + }; + + pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 + >; + }; + pinctrl_gpio_lpsr: gpio1-grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ @@ -1108,8 +1118,8 @@ pinctrl_i2c1: i2c1-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f + MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f >; }; @@ -1120,22 +1130,10 @@ >; }; - pinctrl_cd_usdhc1: cdusdhc1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ - >; - }; - - pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 - >; - }; - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ >; }; }; -- cgit v1.2.3 From 5491ddafe381d8e1087921e120859c1bad82e10b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 16:09:38 +0200 Subject: ARM: dts: imx7-colibri: clean-up device enabling/disabling Disable most nodes on module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 - arch/arm/boot/dts/imx7-colibri.dtsi | 5 ----- 2 files changed, 6 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index fea6e4c0d4d6..826f13da5b81 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -44,7 +44,6 @@ spi-max-frequency = <10000000>; vdd-supply = <®_3v3>; xceiver-supply = <®_5v0>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index f29096fca54d..065d8f55f326 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -140,9 +140,6 @@ }; /* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ -&adc2 { - status = "disabled"; -}; &cpu0 { cpu-supply = <®_DCDC2>; @@ -191,13 +188,11 @@ &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; - status = "disabled"; }; &flexcan2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2>; - status = "disabled"; }; &gpio1 { -- cgit v1.2.3 From 4a0e8e15a390128d50336dad0e18eea571778c9b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 16:11:20 +0200 Subject: ARM: dts: imx7-colibri: remove leading zero from reg address Remove the unnecessary leading zero from the reg address. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 065d8f55f326..cbe4f072d4ef 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -398,7 +398,7 @@ compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; - reg = <0x0a>; + reg = <0xa>; VDDA-supply = <®_module_3v3_avdd>; VDDD-supply = <®_DCDC3>; VDDIO-supply = <®_module_3v3>; -- cgit v1.2.3 From 23acdfa0e2310404788226c37c97a279dd3f9e94 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 16:11:32 +0200 Subject: ARM: dts: imx7-colibri: set regulator-name properties Migrate comments to proper regulator-name properties. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index cbe4f072d4ef..27706a2bc3c4 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -424,66 +424,75 @@ reg = <0x33>; regulators { - reg_DCDC1: DCDC1 { /* V1.0_SOC */ + reg_DCDC1: DCDC1 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1100000>; regulator-min-microvolt = <1000000>; + regulator-name = "+V1.0_SOC"; }; - reg_DCDC2: DCDC2 { /* V1.1_ARM */ + reg_DCDC2: DCDC2 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1100000>; regulator-min-microvolt = <975000>; + regulator-name = "+V1.1_ARM"; }; - reg_DCDC3: DCDC3 { /* V1.8 */ + reg_DCDC3: DCDC3 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1800000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8"; }; - reg_DCDC4: DCDC4 { /* V1.35_DRAM */ + reg_DCDC4: DCDC4 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1350000>; regulator-min-microvolt = <1350000>; + regulator-name = "+V1.35_DRAM"; }; - reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ + reg_LDO1: LDO1 { regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3_ETH"; }; - reg_LDO2: LDO2 { /* +V1.8_SD */ + reg_LDO2: LDO2 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_SD"; }; - reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ + reg_LDO3: LDO3 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3_LPSR"; }; - reg_LDO4: LDO4 { /* V1.8_LPSR */ + reg_LDO4: LDO4 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <1800000>; regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_LPSR"; }; - reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ + reg_LDO5: LDO5 { regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; + regulator-name = "PWR_EN_+V3.3"; }; }; }; -- cgit v1.2.3 From f78ad7406289b606d4a9f27122acb97775f32b15 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 16:12:05 +0200 Subject: ARM: dts: imx7-colibri: clean-up iomuxc pinctrl group naming Clean-up iomuxc pinctrl group naming. Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7-colibri.dtsi | 70 ++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 35 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 27706a2bc3c4..a8c31ee65623 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -667,13 +667,13 @@ >; }; - pinctrl_can_int: can-int-grp { + pinctrl_can_int: canintgrp { fsl,pins = < MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ >; }; - pinctrl_ecspi3: ecspi3-grp { + pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ @@ -681,7 +681,7 @@ >; }; - pinctrl_ecspi3_cs: ecspi3-cs-grp { + pinctrl_ecspi3_cs: ecspi3csgrp { fsl,pins = < MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ >; @@ -702,7 +702,7 @@ >; }; - pinctrl_enet1_sleep: enet1sleepgrp { + pinctrl_enet1_sleep: enet1-sleepgrp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 @@ -717,21 +717,21 @@ >; }; - pinctrl_flexcan1: flexcan1-grp { + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ >; }; - pinctrl_flexcan2: flexcan2-grp { + pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ >; }; - pinctrl_gpio1: gpio1-grp { + pinctrl_gpio1: gpio1grp { fsl,pins = < MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ @@ -774,7 +774,7 @@ >; }; - pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ + pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */ fsl,pins = < MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ @@ -791,7 +791,7 @@ >; }; - pinctrl_gpio3: gpio3-grp { /* LCD 18-23 */ + pinctrl_gpio3: gpio3grp { /* LCD 18-23 */ fsl,pins = < MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ @@ -802,27 +802,27 @@ >; }; - pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ + pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */ fsl,pins = < MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ >; }; - pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ + pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */ fsl,pins = < MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ >; }; - pinctrl_gpio_bl_on: gpio-bl-on { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins = < MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */ >; }; - pinctrl_gpmi_nand: gpmi-nand-grp { + pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 @@ -841,13 +841,13 @@ >; }; - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ + pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */ fsl,pins = < MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 >; }; - pinctrl_i2c4: i2c4-grp { + pinctrl_i2c4: i2c4grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ @@ -861,7 +861,7 @@ >; }; - pinctrl_lcdif_dat: lcdif-dat-grp { + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ @@ -884,7 +884,7 @@ >; }; - pinctrl_lcdif_dat_24: lcdif-dat-24-grp { + pinctrl_lcdif_dat_24: lcdifdat24grp { fsl,pins = < MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ @@ -895,7 +895,7 @@ >; }; - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ @@ -913,33 +913,33 @@ >; }; - pinctrl_pwm1: pwm1-grp { + pinctrl_pwm1: pwm1grp { fsl,pins = < MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ >; }; - pinctrl_pwm2: pwm2-grp { + pinctrl_pwm2: pwm2grp { fsl,pins = < MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ >; }; - pinctrl_pwm3: pwm3-grp { + pinctrl_pwm3: pwm3grp { fsl,pins = < MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ >; }; - pinctrl_pwm4: pwm4-grp { + pinctrl_pwm4: pwm4grp { fsl,pins = < MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ >; }; - pinctrl_uart1: uart1-grp { + pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ @@ -948,14 +948,14 @@ >; }; - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { + pinctrl_uart1_ctrl1: uart1ctrl1grp { fsl,pins = < MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ >; }; - pinctrl_uart2: uart2-grp { + pinctrl_uart2: uart2grp { fsl,pins = < MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ @@ -963,20 +963,20 @@ MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ >; }; - pinctrl_uart3: uart3-grp { + pinctrl_uart3: uart3grp { fsl,pins = < MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ >; }; - pinctrl_usbc_det: gpio-usbc-det { + pinctrl_usbc_det: usbcdetgrp { fsl,pins = < MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ >; }; - pinctrl_usbh_reg: gpio-usbh-vbus { + pinctrl_usbh_reg: usbhreggrp { fsl,pins = < MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ >; @@ -1043,7 +1043,7 @@ >; }; - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1a MX7D_PAD_SD3_CMD__SD3_CMD 0x5a @@ -1059,7 +1059,7 @@ >; }; - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < MX7D_PAD_SD3_CLK__SD3_CLK 0x1b MX7D_PAD_SD3_CMD__SD3_CMD 0x5b @@ -1075,7 +1075,7 @@ >; }; - pinctrl_sai1: sai1-grp { + pinctrl_sai1: sai1grp { fsl,pins = < MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f @@ -1084,7 +1084,7 @@ >; }; - pinctrl_sai1_mclk: sai1grp_mclk { + pinctrl_sai1_mclk: sai1mclkgrp { fsl,pins = < MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f >; @@ -1107,7 +1107,7 @@ >; }; - pinctrl_gpio_lpsr: gpio1-grp { + pinctrl_gpio_lpsr: gpiolpsrgrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ @@ -1120,7 +1120,7 @@ >; }; - pinctrl_i2c1: i2c1-grp { + pinctrl_i2c1: i2c1grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f @@ -1134,7 +1134,7 @@ >; }; - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { + pinctrl_uart1_ctrl2: uart1ctrl2grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ -- cgit v1.2.3 From a180e4f09dd95ae3eee01e7046ca693be206e8ed Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 16 May 2022 16:13:13 +0200 Subject: ARM: dts: imx7-colibri: add support for Toradex Iris carrier boards Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Marcel Ziswiler Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 6 ++ arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi | 112 +++++++++++++++++++++++ arch/arm/boot/dts/imx7-colibri-iris.dtsi | 108 ++++++++++++++++++++++ arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts | 21 +++++ arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts | 21 +++++ arch/arm/boot/dts/imx7d-colibri-iris-v2.dts | 83 +++++++++++++++++ arch/arm/boot/dts/imx7d-colibri-iris.dts | 56 ++++++++++++ arch/arm/boot/dts/imx7s-colibri-iris-v2.dts | 78 ++++++++++++++++ arch/arm/boot/dts/imx7s-colibri-iris.dts | 51 +++++++++++ 9 files changed, 536 insertions(+) create mode 100644 arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi create mode 100644 arch/arm/boot/dts/imx7-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 184899808ee7..d3f1e3075178 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -741,8 +741,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-cl-som-imx7.dtb \ imx7d-colibri-aster.dtb \ imx7d-colibri-emmc-aster.dtb \ + imx7d-colibri-emmc-iris.dtb \ + imx7d-colibri-emmc-iris-v2.dtb \ imx7d-colibri-emmc-eval-v3.dtb \ imx7d-colibri-eval-v3.dtb \ + imx7d-colibri-iris.dtb \ + imx7d-colibri-iris-v2.dtb \ imx7d-flex-concentrator.dtb \ imx7d-flex-concentrator-mfg.dtb \ imx7d-mba7.dtb \ @@ -762,6 +766,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-zii-rpu2.dtb \ imx7s-colibri-aster.dtb \ imx7s-colibri-eval-v3.dtb \ + imx7s-colibri-iris.dtb \ + imx7s-colibri-iris-v2.dtb \ imx7s-mba7.dtb \ imx7s-warp.dtb dtb-$(CONFIG_SOC_IMX7ULP) += \ diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi new file mode 100644 index 000000000000..6e199613583c --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* SODIMM 100 */ + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + startup-delay-us = <100>; + }; +}; + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart_b_c_on_x14_enable turns the UART transceiver for UART2 and 5 on. If one wants to + * turn the transceiver off, that property has to be deleted and the gpio handled in + * userspace. + * The same applies to uart_a_on_x13_enable where the UART_A transceiver is turned on. + */ + uart-b-c-on-x14-enable-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart-a-on-x13-enable-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD, UHS-I capable uSD slot */ +&usdhc1 { + cap-power-off-card; + /delete-property/ keep-power-in-suspend; + /delete-property/ no-1-8-v; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7-colibri-iris.dtsi b/arch/arm/boot/dts/imx7-colibri-iris.dtsi new file mode 100644 index 000000000000..175c5d478d2e --- /dev/null +++ b/arch/arm/boot/dts/imx7-colibri-iris.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/* Colibri AD0 to AD3 */ +&adc1 { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ + pinctrl-0 = <&pinctrl_atmel_adapter>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ +}; + +/* Colibri SSP */ +&ecspi3 { + status = "okay"; +}; + +/* Colibri Fast Ethernet */ +&fec1 { + status = "okay"; +}; + +&gpio2 { + /* + * uart25 turns the UART transceiver for UART2 and 5 on. If one wants to turn the + * transceiver off, that property has to be deleted and the gpio handled in userspace. + * The same applies to uart1_tx_on where the UART1 transceiver is turned on. + */ + uart25-tx-on-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&gpio5 { + uart1-tx-on-hog { + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c4 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm4 { + status = "okay"; +}; + +/* M41T0M6 real time clock */ +&rtc { + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg1 { + status = "okay"; +}; + +/* Colibri MMC/SD */ +&usdhc1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts new file mode 100644 index 000000000000..7347659557f3 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris-v2", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts new file mode 100644 index 000000000000..5324c92e368d --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri-emmc.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-emmc-iris", + "toradex,colibri-imx7d-emmc", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts new file mode 100644 index 000000000000..5762f51d5f0f --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris-v2.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7d-iris-v2", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7d-colibri-iris.dts b/arch/arm/boot/dts/imx7d-colibri-iris.dts new file mode 100644 index 000000000000..9c63cb9d9a64 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-colibri-iris.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7d-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7D on Iris Carrier Board"; + compatible = "toradex,colibri-imx7d-iris", + "toradex,colibri-imx7d", + "fsl,imx7d"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts new file mode 100644 index 000000000000..72b5c17ab1ab --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris-v2.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris-v2.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris V2 Carrier Board"; + compatible = "toradex,colibri-imx7s-iris-v2", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +&atmel_mxt_ts { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name = "LVDS_COLOR_MAP"; + output-low; + }; +}; + +&gpio7 { + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode-hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name = "LVDS_RGB_MODE"; + output-low; + }; + + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name = "LVDS_CH_MODE"; + output-high; + }; + + /* This turns the LVDS transceiver on */ + lvds-power-on-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name = "LVDS_POWER_ON"; + output-high; + }; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7s-colibri-iris.dts b/arch/arm/boot/dts/imx7s-colibri-iris.dts new file mode 100644 index 000000000000..26ba72c17feb --- /dev/null +++ b/arch/arm/boot/dts/imx7s-colibri-iris.dts @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; +#include "imx7s-colibri.dtsi" +#include "imx7-colibri-iris.dtsi" + +/ { + model = "Toradex Colibri iMX7S on Iris Carrier Board"; + compatible = "toradex,colibri-imx7s-iris", + "toradex,colibri-imx7s", + "fsl,imx7s"; +}; + +&ad7879_ts { + status = "okay"; +}; + +/* + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM, PWM, aka pwm2, pwm3. + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. + */ +&atmel_mxt_ts { + status = "disabled"; +}; + +&backlight { + status = "okay"; +}; + +&lcdif { + status = "okay"; +}; + +&panel_dpi { + status = "okay"; +}; + +/* Colibri PWM */ +&pwm2 { + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; + +/* Colibri PWM */ +&pwm3 { + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ + status = "okay"; +}; -- cgit v1.2.3 From 74442c80d41df5d7e5059744d2e41e7341f4411b Mon Sep 17 00:00:00 2001 From: Simon Holesch Date: Tue, 17 May 2022 15:53:42 +0200 Subject: ARM: dts: imx6ulz-bsh-smm-m2: Support proper board power off Supports initiating poweroff on SNVS_PMIC_ON_REQ signal. Signed-off-by: Simon Holesch Signed-off-by: Michael Trimarchi Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts index 59bcfc9a6b10..c92e4e2f6ab9 100644 --- a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts +++ b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts @@ -29,6 +29,10 @@ status = "okay"; }; +&snvs_poweroff { + status = "okay"; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; -- cgit v1.2.3 From 1ee723ea39ba408f94c59bc764969009b4b784eb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:42:57 +0200 Subject: ARM: dts: fsl: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51-ts4800.dts | 2 +- arch/arm/boot/dts/imx6dl-plym2m.dts | 2 +- arch/arm/boot/dts/imx6dl-prtvt7.dts | 2 +- arch/arm/boot/dts/imx6dl-victgo.dts | 2 +- arch/arm/boot/dts/imx6q-bosch-acc.dts | 2 +- arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi | 4 ++-- arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi | 2 +- arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi | 2 +- arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi | 2 +- arch/arm/boot/dts/imx7d-sdb.dts | 2 +- arch/arm/boot/dts/imxrt1050.dtsi | 4 ++-- arch/arm/boot/dts/ls1021a-iot.dts | 2 +- 12 files changed, 14 insertions(+), 14 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts index 85654d6baf28..f7408722d68a 100644 --- a/arch/arm/boot/dts/imx51-ts4800.dts +++ b/arch/arm/boot/dts/imx51-ts4800.dts @@ -174,7 +174,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_interrupt_fpga>; interrupt-parent = <&gpio2>; - interrupts= <9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <1>; }; diff --git a/arch/arm/boot/dts/imx6dl-plym2m.dts b/arch/arm/boot/dts/imx6dl-plym2m.dts index c4ce23d8ac9f..522660c912a0 100644 --- a/arch/arm/boot/dts/imx6dl-plym2m.dts +++ b/arch/arm/boot/dts/imx6dl-plym2m.dts @@ -196,7 +196,7 @@ compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_tsc2046>; - pinctrl-names ="default"; + pinctrl-names = "default"; spi-max-frequency = <1000000>; interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; #io-channel-cells = <1>; diff --git a/arch/arm/boot/dts/imx6dl-prtvt7.dts b/arch/arm/boot/dts/imx6dl-prtvt7.dts index b86deebef7b7..0a0b7acddfb2 100644 --- a/arch/arm/boot/dts/imx6dl-prtvt7.dts +++ b/arch/arm/boot/dts/imx6dl-prtvt7.dts @@ -344,7 +344,7 @@ compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_tsc>; - pinctrl-names ="default"; + pinctrl-names = "default"; spi-max-frequency = <1000000>; interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; #io-channel-cells = <1>; diff --git a/arch/arm/boot/dts/imx6dl-victgo.dts b/arch/arm/boot/dts/imx6dl-victgo.dts index 516ec915a911..779b52858a25 100644 --- a/arch/arm/boot/dts/imx6dl-victgo.dts +++ b/arch/arm/boot/dts/imx6dl-victgo.dts @@ -144,7 +144,7 @@ compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_touchscreen>; - pinctrl-names ="default"; + pinctrl-names = "default"; spi-max-frequency = <1000000>; interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>; #io-channel-cells = <1>; diff --git a/arch/arm/boot/dts/imx6q-bosch-acc.dts b/arch/arm/boot/dts/imx6q-bosch-acc.dts index 8768222e183e..731fbc7b317c 100644 --- a/arch/arm/boot/dts/imx6q-bosch-acc.dts +++ b/arch/arm/boot/dts/imx6q-bosch-acc.dts @@ -594,7 +594,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog1>; fsl,ext-reset-output; - timeout-sec=<10>; + timeout-sec = <10>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi b/arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi index 69ae430a53bd..8254bce1b8a2 100644 --- a/arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi +++ b/arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi @@ -15,13 +15,13 @@ reg = <0>; spi-max-frequency = <1000000>; interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>; - vcc-supply = <®_3v3>; + vcc-supply = <®_3v3>; pendown-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>; ti,x-plate-ohms = /bits/ 16 <850>; ti,y-plate-ohms = /bits/ 16 <295>; ti,pressure-min = /bits/ 16 <2>; ti,pressure-max = /bits/ 16 <1500>; - ti,vref-mv = /bits/ 16 <3300>; + ti,vref-mv = /bits/ 16 <3300>; ti,settle-delay-usec = /bits/ 16 <15>; ti,vref-delay-usecs = /bits/ 16 <0>; ti,penirq-recheck-delay-usecs = /bits/ 16 <100>; diff --git a/arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi b/arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi index caf2c5d03f7e..4b87e2dc70dc 100644 --- a/arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi +++ b/arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi @@ -14,7 +14,7 @@ }; &usdhc2 { - fsl,tuning-step= <6>; + fsl,tuning-step = <6>; }; &iomuxc { diff --git a/arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi b/arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi index 326e6da91ed4..8541cb3f3b3e 100644 --- a/arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi +++ b/arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi @@ -14,7 +14,7 @@ }; &usdhc2 { - fsl,tuning-step= <6>; + fsl,tuning-step = <6>; /* Errata ERR010450 Workaround */ max-frequency = <99000000>; assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; diff --git a/arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi b/arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi index 8e4d5cd18614..be593d47e3b1 100644 --- a/arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi +++ b/arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi @@ -14,7 +14,7 @@ }; &usdhc2 { - fsl,tuning-step= <6>; + fsl,tuning-step = <6>; /* Errata ERR010450 Workaround */ max-frequency = <99000000>; assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index f053f5122741..78f4224a9bf4 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -201,7 +201,7 @@ compatible = "ti,tsc2046"; reg = <0>; spi-max-frequency = <1000000>; - pinctrl-names ="default"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc2046_pendown>; interrupt-parent = <&gpio2>; interrupts = <29 0>; diff --git a/arch/arm/boot/dts/imxrt1050.dtsi b/arch/arm/boot/dts/imxrt1050.dtsi index 77b911b06041..03e6a858a7be 100644 --- a/arch/arm/boot/dts/imxrt1050.dtsi +++ b/arch/arm/boot/dts/imxrt1050.dtsi @@ -83,7 +83,7 @@ }; usdhc1: mmc@402c0000 { - compatible ="fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc"; + compatible = "fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc"; reg = <0x402c0000 0x4000>; interrupts = <110>; clocks = <&clks IMXRT1050_CLK_IPG_PDOF>, @@ -95,7 +95,7 @@ no-1-8-v; max-frequency = <4000000>; fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + fsl,tuning-step = <2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/ls1021a-iot.dts b/arch/arm/boot/dts/ls1021a-iot.dts index 66bcdaf4b6f9..ce8e26d7791f 100644 --- a/arch/arm/boot/dts/ls1021a-iot.dts +++ b/arch/arm/boot/dts/ls1021a-iot.dts @@ -142,7 +142,7 @@ }; sgtl5000: audio-codec@2a { - #sound-dai-cells=<0x0>; + #sound-dai-cells = <0x0>; compatible = "fsl,sgtl5000"; reg = <0x2a>; VDDA-supply = <®_3p3v>; -- cgit v1.2.3 From 71b81f1cac29297769ec81fe29a3fcc40bc2c31c Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Mon, 30 May 2022 07:23:33 +0300 Subject: ARM: imx6ul: drop the adc num-channels property The mainline vf610_adc driver never used this property. Signed-off-by: Baruch Siach Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 1 - arch/arm/boot/dts/imx6ul-phytec-segin.dtsi | 5 ----- arch/arm/boot/dts/imx6ul.dtsi | 1 - arch/arm/boot/dts/imx6ull-colibri.dtsi | 1 - 4 files changed, 8 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi index a6cf0f21c66d..43868311f48a 100644 --- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi +++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi @@ -72,7 +72,6 @@ &adc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_adc1>; - num-channels = <3>; vref-supply = <®_vref_adc>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6ul-phytec-segin.dtsi b/arch/arm/boot/dts/imx6ul-phytec-segin.dtsi index 0d4ba9494cf2..38ea4dcfa228 100644 --- a/arch/arm/boot/dts/imx6ul-phytec-segin.dtsi +++ b/arch/arm/boot/dts/imx6ul-phytec-segin.dtsi @@ -83,11 +83,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_adc1>; vref-supply = <®_adc1_vref_3v3>; - /* - * driver can not separate a specific channel so we request 4 channels - * here - we need only the fourth channel - */ - num-channels = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index afeec01f6522..799d8d065731 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -923,7 +923,6 @@ reg = <0x02198000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_ADC1>; - num-channels = <2>; clock-names = "adc"; fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 15621e03fa4d..623bb7585ad1 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -94,7 +94,6 @@ }; &adc1 { - num-channels = <10>; vref-supply = <®_module_3v3_avdd>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_adc1>; -- cgit v1.2.3 From de1a99ac0b64e9a2319c5a3d80d519a64d4e1adb Mon Sep 17 00:00:00 2001 From: William Zhang Date: Wed, 25 May 2022 10:51:23 -0700 Subject: ARM: dts: Add DTS files for bcmbca SoC BCM6846 Add DTS for ARMv7 based broadband SoC BCM6846. bcm6846.dtsi is the SoC description DTS header and bcm96846.dts is a simple DTS file for Broadcom BCM96846 Reference board that only enable the UART port. Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm6846.dtsi | 103 +++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm96846.dts | 30 ++++++++++++ 3 files changed, 134 insertions(+) create mode 100644 arch/arm/boot/dts/bcm6846.dtsi create mode 100644 arch/arm/boot/dts/bcm96846.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b7905dd8579e..85975cbd9794 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ bcm963178.dtb \ + bcm96846.dtb \ bcm96878.dtb dtb-$(CONFIG_ARCH_CLPS711X) += \ ep7211-edb7211.dtb diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi new file mode 100644 index 000000000000..e610c102498f --- /dev/null +++ b/arch/arm/boot/dts/bcm6846.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm6846", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + cpu_off = <1>; + cpu_on = <2>; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x4000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x640 0x1b>; + interrupts = ; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts new file mode 100644 index 000000000000..c70ebccabc19 --- /dev/null +++ b/arch/arm/boot/dts/bcm96846.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6846.dtsi" + +/ { + model = "Broadcom BCM96846 Reference Board"; + compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 8a3ed46ff5402c0750810885eba85468e055ad4e Mon Sep 17 00:00:00 2001 From: William Zhang Date: Wed, 1 Jun 2022 16:36:06 -0700 Subject: ARM: dts: Update BCM47622 DTS file Fix a few issue in bcm47622.dtsi file: - Remove unnecessary cpu_on and cpu_off properties from psci node - Add the missing gic registers and interrupts property to gic node - Cosmetic changes Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm47622.dtsi | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi index c016e12b7372..2df04528af82 100644 --- a/arch/arm/boot/dts/bcm47622.dtsi +++ b/arch/arm/boot/dts/bcm47622.dtsi @@ -32,6 +32,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; }; + CA7_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; @@ -39,6 +40,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; }; + CA7_3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; @@ -46,6 +48,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; }; + L2_0: l2-cache0 { compatible = "cache"; }; @@ -76,6 +79,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -88,23 +92,23 @@ psci { compatible = "arm,psci-0.2"; method = "smc"; - cpu_off = <1>; - cpu_on = <2>; }; axi@81000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x81000000 0x818000>; + ranges = <0 0x81000000 0x8000>; gic: interrupt-controller@1000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; - #address-cells = <0>; interrupt-controller; + interrupts = ; reg = <0x1000 0x1000>, - <0x2000 0x2000>; + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; }; }; -- cgit v1.2.3 From 26f2a78b4a60ad1d16b00189600529424c068809 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Fri, 3 Jun 2022 10:26:08 +0100 Subject: ARM: dts: bcm2711: Enable V3D This adds the entry for V3D for bcm2711 (used in the Raspberry Pi 4) and the associated firmware clock entry. Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Peter Robinson Reviewed-by: Javier Martinez Canillas Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2711-rpi.dtsi | 4 ++++ arch/arm/boot/dts/bcm2711.dtsi | 11 +++++++++++ 2 files changed, 15 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2711-rpi.dtsi b/arch/arm/boot/dts/bcm2711-rpi.dtsi index ca266c5d9f9b..98817a6675b9 100644 --- a/arch/arm/boot/dts/bcm2711-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi @@ -69,6 +69,10 @@ }; }; +&v3d { + clocks = <&firmware_clocks 5>; +}; + &vchiq { interrupts = ; }; diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 89af57482bc8..20e6771e8b1f 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -601,6 +601,17 @@ #size-cells = <0x0>; }; }; + + v3d: gpu@7ec00000 { + compatible = "brcm,2711-v3d"; + reg = <0x0 0x7ec00000 0x4000>, + <0x0 0x7ec04000 0x4000>; + reg-names = "hub", "core0"; + + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + resets = <&pm BCM2835_RESET_V3D>; + interrupts = ; + }; }; }; -- cgit v1.2.3 From 8cce5702b6671be31405c08dacdc5b82ea704a63 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 6 Jun 2022 20:24:37 -0500 Subject: ARM: dts: sunxi: Use constants for RTC clock indexes The binding header provides descriptive names for the RTC clock indexes, since the indexes were arbitrarily chosen by the binding, not by the hardware. Let's use the names, so the meaning is clearer. Signed-off-by: Samuel Holland Acked-by: Jernej Skrabec Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220607012438.18183-1-samuel@sholland.org --- arch/arm/boot/dts/sun6i-a31.dtsi | 12 +++++++----- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 8 +++++--- arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 4 ++-- arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 2 +- arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 4 ++-- arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 2 +- arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 4 ++-- arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 4 ++-- arch/arm/boot/dts/sun8i-r40.dtsi | 8 +++++--- arch/arm/boot/dts/sun8i-v3s.dtsi | 6 ++++-- arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 4 ++-- arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi | 4 ++-- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 13 ++++++++----- 13 files changed, 43 insertions(+), 32 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 715d74854449..70e634b37aae 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -46,6 +46,7 @@ #include #include +#include #include / { @@ -598,7 +599,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun6i-a31-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -612,7 +613,8 @@ , , ; - clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -1319,7 +1321,7 @@ ar100: ar100_clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; - clocks = <&rtc 0>, <&osc24M>, + clocks = <&rtc CLK_OSC32K>, <&osc24M>, <&ccu CLK_PLL_PERIPH>, <&ccu CLK_PLL_PERIPH>; clock-output-names = "ar100"; @@ -1354,7 +1356,7 @@ ir_clk: ir_clk { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; - clocks = <&rtc 0>, <&osc24M>; + clocks = <&rtc CLK_OSC32K>, <&osc24M>; clock-output-names = "ir"; }; @@ -1385,7 +1387,7 @@ interrupt-parent = <&r_intc>; interrupts = , ; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; resets = <&apb0_rst 0>; gpio-controller; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 4461d5098b20..1a262a05fdcb 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -44,6 +44,7 @@ #include +#include #include #include @@ -329,7 +330,7 @@ ccu: clock@1c20000 { reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -340,7 +341,8 @@ reg = <0x01c20800 0x400>; interrupt-parent = <&r_intc>; /* interrupts get set in SoC specific dtsi file */ - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -810,7 +812,7 @@ reg = <0x01f02c00 0x400>; interrupt-parent = <&r_intc>; interrupts = ; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; resets = <&apb0_rst 0>; gpio-controller; diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts index d5c7b7984d85..c06b217a8af5 100644 --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -106,7 +106,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -181,7 +181,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <1500000>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts index cd9f655e4f92..7721a7a50d45 100644 --- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts @@ -125,7 +125,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts index 8e7dfcffe1fb..23aae3eaed79 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts @@ -90,7 +90,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; @@ -151,7 +151,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts index cd3df12b6573..9e1a33f94cad 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts @@ -127,7 +127,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts index 26e2e6172e0d..42cd1131adf3 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts @@ -46,7 +46,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; @@ -147,7 +147,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts index bf5b5e2f6168..bc394686fedb 100644 --- a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts +++ b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts @@ -91,7 +91,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -283,7 +283,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_dldo1>; vddio-supply = <®_aldo3>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 03d3e5f45a09..75d55a46b50e 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -42,6 +42,7 @@ */ #include +#include #include #include #include @@ -485,7 +486,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun8i-r40-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -504,7 +505,8 @@ compatible = "allwinner,sun8i-r40-pinctrl"; reg = <0x01c20800 0x400>; interrupts = ; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -1231,7 +1233,7 @@ reg-io-width = <1>; interrupts = ; clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 084323d5c61c..db194c606fdc 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -42,6 +42,7 @@ */ #include +#include #include #include #include @@ -321,7 +322,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun8i-v3s-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -342,7 +343,8 @@ reg = <0x01c20800 0x400>; interrupts = , ; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi index d03f5853ef7b..d4627bc7c122 100644 --- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi +++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi @@ -101,7 +101,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -221,7 +221,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <1500000>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi index fc67e30fe212..60804b0e6c56 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi @@ -22,7 +22,7 @@ compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ post-power-on-delay-ms = <200>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -124,7 +124,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index d7e9f977f986..09aefb4e90f8 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -40,6 +40,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include #include #include #include @@ -386,7 +387,7 @@ ccu: clock@1c20000 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -398,7 +399,8 @@ interrupt-parent = <&r_intc>; interrupts = , ; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -818,7 +820,7 @@ reg-io-width = <1>; interrupts = ; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; @@ -878,7 +880,7 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -931,7 +933,8 @@ reg = <0x01f02c00 0x400>; interrupt-parent = <&r_intc>; interrupts = ; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; -- cgit v1.2.3 From 7e0ed53b074ce8331b5fd7941408fe0c0ca784b1 Mon Sep 17 00:00:00 2001 From: Paweł Anikiel Date: Fri, 3 Jun 2022 11:23:50 +0200 Subject: ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi The Mercury+ AA1 is not a standalone board, rather it's a module with an Arria 10 SoC. Remove status = "okay" and i2c aliases, as they are routed to the base board and should be enabled from there. Signed-off-by: Paweł Anikiel Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts | 112 --------------------- arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi | 84 ++++++++++++++++ 3 files changed, 84 insertions(+), 113 deletions(-) delete mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 184899808ee7..b0dccad58a1d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1148,7 +1148,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ - socfpga_arria10_mercury_aa1.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts deleted file mode 100644 index a75c059b6727..000000000000 --- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/dts-v1/; - -#include "socfpga_arria10.dtsi" - -/ { - - model = "Enclustra Mercury AA1"; - compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; - - aliases { - ethernet0 = &gmac0; - serial1 = &uart1; - i2c0 = &i2c0; - i2c1 = &i2c1; - }; - - memory@0 { - name = "memory"; - device_type = "memory"; - reg = <0x0 0x80000000>; /* 2GB */ - }; - - chosen { - stdout-path = "serial1:115200n8"; - }; -}; - -&eccmgr { - sdmmca-ecc@ff8c2c00 { - compatible = "altr,socfpga-sdmmc-ecc"; - reg = <0xff8c2c00 0x400>; - altr,ecc-parent = <&mmc>; - interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, - <47 IRQ_TYPE_LEVEL_HIGH>, - <16 IRQ_TYPE_LEVEL_HIGH>, - <48 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - -&gmac0 { - phy-mode = "rgmii"; - phy-addr = <0xffffffff>; /* probe for phy addr */ - - max-frame-size = <3800>; - status = "okay"; - - phy-handle = <&phy3>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - phy3: ethernet-phy@3 { - txd0-skew-ps = <0>; /* -420ps */ - txd1-skew-ps = <0>; /* -420ps */ - txd2-skew-ps = <0>; /* -420ps */ - txd3-skew-ps = <0>; /* -420ps */ - rxd0-skew-ps = <420>; /* 0ps */ - rxd1-skew-ps = <420>; /* 0ps */ - rxd2-skew-ps = <420>; /* 0ps */ - rxd3-skew-ps = <420>; /* 0ps */ - txen-skew-ps = <0>; /* -420ps */ - txc-skew-ps = <1860>; /* 960ps */ - rxdv-skew-ps = <420>; /* 0ps */ - rxc-skew-ps = <1680>; /* 780ps */ - reg = <3>; - }; - }; -}; - -&gpio0 { - status = "okay"; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - isl12022: isl12022@6f { - status = "okay"; - compatible = "isil,isl12022"; - reg = <0x6f>; - }; -}; - -/* Following mappings are taken from arria10 socdk dts */ -&mmc { - status = "okay"; - cap-sd-highspeed; - broken-cd; - bus-width = <4>; -}; - -&osc1 { - clock-frequency = <33330000>; -}; - -&uart1 { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi new file mode 100644 index 000000000000..4b21351f2694 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "socfpga_arria10.dtsi" + +/ { + + model = "Enclustra Mercury AA1"; + compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial1 = &uart1; + }; + + memory@0 { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + max-frame-size = <3800>; + + phy-handle = <&phy3>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy3: ethernet-phy@3 { + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + reg = <3>; + }; + }; +}; + +&i2c1 { + isl12022: isl12022@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +/* Following mappings are taken from arria10 socdk dts */ +&mmc { + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + +&osc1 { + clock-frequency = <33330000>; +}; -- cgit v1.2.3 From cfdb455d1a54b257c5f2740738055f746efe9dea Mon Sep 17 00:00:00 2001 From: Paweł Anikiel Date: Fri, 3 Jun 2022 11:23:51 +0200 Subject: ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts The ecc manager is a part of the Arria 10 SoC, move it to the correct dts. Signed-off-by: Paweł Anikiel Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_arria10.dtsi | 10 ++++++++++ arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi | 12 ------------ 2 files changed, 10 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 26bda2557fe8..4370e3cbbb4b 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -736,6 +736,16 @@ <37 IRQ_TYPE_LEVEL_HIGH>; }; + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; + dma-ecc@ff8c8000 { compatible = "altr,socfpga-dma-ecc"; reg = <0xff8c8000 0x400>; diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi index 4b21351f2694..b0d20101cd00 100644 --- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi @@ -23,18 +23,6 @@ }; }; -&eccmgr { - sdmmca-ecc@ff8c2c00 { - compatible = "altr,socfpga-sdmmc-ecc"; - reg = <0xff8c2c00 0x400>; - altr,ecc-parent = <&mmc>; - interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, - <47 IRQ_TYPE_LEVEL_HIGH>, - <16 IRQ_TYPE_LEVEL_HIGH>, - <48 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - &gmac0 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ -- cgit v1.2.3 From 162552fa8844586332cbc8d65c1b30e6e2f90f5a Mon Sep 17 00:00:00 2001 From: Paweł Anikiel Date: Fri, 3 Jun 2022 11:23:52 +0200 Subject: ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts Add atsha204a node to Mercury+ AA1 dts Signed-off-by: Paweł Anikiel Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi index b0d20101cd00..ad7cd14de6b6 100644 --- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi @@ -1,4 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ #include "socfpga_arria10.dtsi" @@ -54,6 +57,11 @@ }; &i2c1 { + atsha204a: crypto@64 { + compatible = "atmel,atsha204a"; + reg = <0x64>; + }; + isl12022: isl12022@6f { compatible = "isil,isl12022"; reg = <0x6f>; -- cgit v1.2.3 From 15596df74e589fa68347928b152ed208eb1b41b1 Mon Sep 17 00:00:00 2001 From: Paweł Anikiel Date: Fri, 3 Jun 2022 11:23:53 +0200 Subject: ARM: dts: socfpga: Add Google Chameleon v3 devicetree Add devicetree for the Google Chameleon v3 board. Signed-off-by: Paweł Anikiel Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts | 90 +++++++++++++++++++++++ 2 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b0dccad58a1d..c7b194115c5c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1148,6 +1148,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_chameleonv3.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts new file mode 100644 index 000000000000..422d00cd4c74 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; +#include "socfpga_arria10_mercury_aa1.dtsi" + +/ { + model = "Google Chameleon V3"; + compatible = "google,chameleon-v3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + serial0 = &uart0; + i2c0 = &i2c0; + i2c1 = &i2c1; + }; +}; + +&gmac0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + ssm2603: audio-codec@1a { + compatible = "adi,ssm2603"; + reg = <0x1a>; + }; +}; + +&i2c1 { + status = "okay"; + + u80: gpio@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SOM_AUD_MUTE", + "DP1_OUT_CEC_EN", + "DP2_OUT_CEC_EN", + "DP1_SOM_PS8469_CAD", + "DPD_SOM_PS8469_CAD", + "DP_OUT_PWR_EN", + "STM32_RST_L", + "STM32_BOOT0", + + "FPGA_PROT", + "STM32_FPGA_COMM0", + "TP119", + "TP120", + "TP121", + "TP122", + "TP123", + "TP124"; + }; +}; + +&mmc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; -- cgit v1.2.3 From 66ae6aed733746483eec7bdcafd332e247e38649 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Tue, 7 Jun 2022 10:26:45 -0700 Subject: ARM: dts: Add DTS files for bcmbca SoC BCM6855 Add DTS for ARMv7 based broadband SoC BCM6855. bcm6855.dtsi is the SoC description DTS header and bcm96855.dts is a simple DTS file for Broadcom BCM96855 Reference board that only enable the UART port. Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm6855.dtsi | 120 +++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm96855.dts | 30 +++++++++++ 3 files changed, 151 insertions(+) create mode 100644 arch/arm/boot/dts/bcm6855.dtsi create mode 100644 arch/arm/boot/dts/bcm96855.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 85975cbd9794..70e73fda5e8c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -185,6 +185,7 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ bcm963178.dtb \ bcm96846.dtb \ + bcm96855.dtb \ bcm96878.dtb dtb-$(CONFIG_ARCH_CLPS711X) += \ ep7211-edb7211.dtb diff --git a/arch/arm/boot/dts/bcm6855.dtsi b/arch/arm/boot/dts/bcm6855.dtsi new file mode 100644 index 000000000000..620f51aee1a2 --- /dev/null +++ b/arch/arm/boot/dts/bcm6855.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm6855", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>, <&CA7_2>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm96855.dts b/arch/arm/boot/dts/bcm96855.dts new file mode 100644 index 000000000000..4438152561ac --- /dev/null +++ b/arch/arm/boot/dts/bcm96855.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6855.dtsi" + +/ { + model = "Broadcom BCM96855 Reference Board"; + compatible = "brcm,bcm96855", "brcm,bcm6855", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 2b0a95390568714c21581251097e2cba723d0837 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Wed, 8 Jun 2022 10:56:28 -0700 Subject: ARM: dts: Add DTS files for bcmbca SoC BCM6756 Add DTS for ARMv7 based broadband SoC BCM6756. bcm6756.dtsi is the SoC description DTS header and bcm96756.dts is a simple DTS file for Broadcom BCM96756 Reference board that only enable the UART port. Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm6756.dtsi | 130 +++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm96756.dts | 30 ++++++++++ 3 files changed, 161 insertions(+) create mode 100644 arch/arm/boot/dts/bcm6756.dtsi create mode 100644 arch/arm/boot/dts/bcm96756.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 70e73fda5e8c..79db8b5fbbb0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ bcm963178.dtb \ + bcm96756.dtb \ bcm96846.dtb \ bcm96855.dtb \ bcm96878.dtb diff --git a/arch/arm/boot/dts/bcm6756.dtsi b/arch/arm/boot/dts/bcm6756.dtsi new file mode 100644 index 000000000000..ce1b59faf800 --- /dev/null +++ b/arch/arm/boot/dts/bcm6756.dtsi @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm6756", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>, <&CA7_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm96756.dts b/arch/arm/boot/dts/bcm96756.dts new file mode 100644 index 000000000000..9a4a87ba9c8a --- /dev/null +++ b/arch/arm/boot/dts/bcm96756.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6756.dtsi" + +/ { + model = "Broadcom BCM96756 Reference Board"; + compatible = "brcm,bcm96756", "brcm,bcm6756", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From c5aec5611aec8fb1ca68f68e41acaefccfc93c16 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jun 2022 13:39:30 +0200 Subject: ARM: dts: broadcom: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts | 6 +++--- arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts | 8 ++++---- arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi | 10 +++++----- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 10 +++++----- arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts | 4 ++-- arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts | 4 ++-- arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 2 +- arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 2 +- arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 6 +++--- arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 6 +++--- arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 6 +++--- arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 4 ++-- arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 8 ++++---- arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 2 +- arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 2 +- arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 2 +- arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ++-- arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 4 ++-- arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 12 ++++++------ arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 4 ++-- arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 6 +++--- arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 8 ++++---- arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 4 ++-- arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 8 ++++---- arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 6 +++--- arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 6 +++--- arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 2 +- arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 2 +- arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 2 +- arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 2 +- arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 2 +- arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 2 +- arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 8 ++++---- arch/arm/boot/dts/bcm47094-phicomm-k3.dts | 2 +- arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 2 +- arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 2 +- arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 6 +++--- arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 +- arch/arm/boot/dts/bcm911360_entphn.dts | 4 ++-- arch/arm/boot/dts/bcm947189acdbmr.dts | 4 ++-- arch/arm/boot/dts/bcm953012er.dts | 4 ++-- arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 2 +- arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi | 2 +- 43 files changed, 97 insertions(+), 97 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts index 8ed403767540..09ee3e46c0cc 100644 --- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts +++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts @@ -70,19 +70,19 @@ gpio-keys { compatible = "gpio-keys"; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts index 667b118ba4ee..32619c6045d3 100644 --- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts +++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts @@ -54,25 +54,25 @@ gpio-keys { compatible = "gpio-keys"; - brightness { + button-brightness { label = "Backlight"; linux,code = ; gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi index d659e409a17e..a658b9b7bcec 100644 --- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi +++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi @@ -104,33 +104,33 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; - aoss { + button-aoss { label = "AOSS"; linux,code = ; gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; }; /* Commit mode set by switch? */ - mode { + button-mode { label = "Mode"; linux,code = ; gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; }; /* Switch: AP mode */ - sw_ap { + button-sw-ap { label = "AP"; linux,code = ; gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; }; - eject { + button-eject { label = "USB eject"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts index ff31ce45831a..f8f53457dd43 100644 --- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts +++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts @@ -100,33 +100,33 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; - aoss { + button-aoss { label = "AOSS"; linux,code = ; gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>; }; /* Commit mode set by switch? */ - mode { + button-mode { label = "Mode"; linux,code = ; gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; }; /* Switch: AP mode */ - sw_ap { + button-sw-ap { label = "AP"; linux,code = ; gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; }; - eject { + button-eject { label = "USB eject"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts index 5bac1e15775a..0ed25bf71f0d 100644 --- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts +++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts @@ -29,13 +29,13 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts index cd797b4202ad..f1412ba83def 100644 --- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts +++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts @@ -25,13 +25,13 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts index 5b4a481be4f4..14ee410183af 100644 --- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts +++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts @@ -45,7 +45,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts index c81944cd6d0b..600ab087f5e5 100644 --- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts +++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts @@ -52,7 +52,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts index 43a5d675dd67..fd6d8d2a4456 100644 --- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts @@ -63,19 +63,19 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts index 4c60eda296d9..76fc1099d47d 100644 --- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts +++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts @@ -59,19 +59,19 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts index 9ca6d1b2590d..6bcdfb73cb9e 100644 --- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts +++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts @@ -94,19 +94,19 @@ gpio-keys { compatible = "gpio-keys"; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts index 0e273c598732..ca47cc4f2ba1 100644 --- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts +++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts @@ -60,13 +60,13 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts index d00495a8b6fc..0edc2543e568 100644 --- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts +++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts @@ -91,26 +91,26 @@ gpio-keys { compatible = "gpio-keys"; - aoss { + button-aoss { label = "AOSS"; linux,code = ; gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; /* Switch device mode? */ - mode { + button-mode { label = "Mode"; linux,code = ; gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; }; - eject { + button-eject { label = "USB eject"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts index 8b1a05a0f1a1..1f0998f34afd 100644 --- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts +++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts @@ -96,7 +96,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts index 68aaf0af3945..c8c02377543b 100644 --- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts +++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts @@ -45,7 +45,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts index 9316a36434f7..3b35a7af4b1c 100644 --- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts +++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts @@ -94,7 +94,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts index 12e34a0439b4..19a7971b5a00 100644 --- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts @@ -77,13 +77,13 @@ gpio-keys { compatible = "gpio-keys"; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts index 7546c8d07bcd..14bb788a693d 100644 --- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts +++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts @@ -50,13 +50,13 @@ #address-cells = <1>; #size-cells = <0>; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts index beae9eab9cb8..a8294c1ac11b 100644 --- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts +++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts @@ -80,39 +80,39 @@ #address-cells = <1>; #size-cells = <0>; - power { + button-power { label = "Power"; linux,code = ; gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; }; - aoss { + button-aoss { label = "AOSS"; linux,code = ; gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; }; /* Commit mode set by switch? */ - mode { + button-mode { label = "Mode"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; }; /* Switch: AP mode */ - sw_ap { + button-sw-ap { label = "AP"; linux,code = ; gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; }; - eject { + button-eject { label = "USB eject"; linux,code = ; gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts index 7879f7d7d9c3..4bbd31916729 100644 --- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts +++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts @@ -32,13 +32,13 @@ #address-cells = <1>; #size-cells = <0>; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts index 56d309dbc6b0..8783963f113b 100644 --- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts +++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts @@ -75,19 +75,19 @@ #address-cells = <1>; #size-cells = <0>; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts index 89f992af61d1..ac2f4692fc4d 100644 --- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts +++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts @@ -102,25 +102,25 @@ #address-cells = <1>; #size-cells = <0>; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; }; - brightness { + button-brightness { label = "Backlight"; linux,code = ; gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts index c2a266a439d0..651113592598 100644 --- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts +++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts @@ -80,13 +80,13 @@ #address-cells = <1>; #size-cells = <0>; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts index d8503758342b..a5fec56d11c0 100644 --- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts +++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts @@ -72,25 +72,25 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; }; - wifi { + button-wifi { label = "Wi-Fi"; linux,code = ; gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; }; - led { + button-led { label = "Backlight"; linux,code = ; gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts index 60bfd52ee677..2c38b642a8b8 100644 --- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts @@ -86,20 +86,20 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; /* Switch: router / extender */ - extender { + button-extender { label = "Extender"; linux,code = ; gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts index 9bef6b9bfa8d..86c7cc0fa70e 100644 --- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts +++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts @@ -30,19 +30,19 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts index b51a0ee7e584..9ad15bcae1ca 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts index 6fa101f0a90d..ee24d3768536 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts @@ -43,7 +43,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts index b959a9504eea..6549d07b9887 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts index b0d8a688141d..9100ff66ab86 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts @@ -37,7 +37,7 @@ #address-cells = <1>; #size-cells = <0>; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts index cbe8c8e4a301..bf053a2fcc7c 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts @@ -89,7 +89,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts index 9efcb2424228..78a90dd57a4e 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts @@ -67,7 +67,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts index 42097a4c2659..f850dce37b20 100644 --- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts +++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts @@ -65,25 +65,25 @@ gpio-keys { compatible = "gpio-keys"; - brightness { + button-brightness { label = "Backlight"; linux,code = ; gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>; }; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts index a2566ad4619c..3bf6e24978ac 100644 --- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts +++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts @@ -22,7 +22,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts index 57ca1cfaecd8..e20b6d2eb274 100644 --- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts @@ -39,7 +39,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts index 2e1a7e382cb7..9d863570fcf3 100644 --- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts index 07eb3a8287d6..55b92645b0f1 100644 --- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts +++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts @@ -59,19 +59,19 @@ gpio-keys { compatible = "gpio-keys"; - rfkill { + button-rfkill { label = "WiFi"; linux,code = ; gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts index daca63f25134..64ea6def30a4 100644 --- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts +++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts @@ -50,7 +50,7 @@ #address-cells = <1>; #size-cells = <0>; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts index a76c74b44bba..363009e747b3 100644 --- a/arch/arm/boot/dts/bcm911360_entphn.dts +++ b/arch/arm/boot/dts/bcm911360_entphn.dts @@ -47,10 +47,10 @@ stdout-path = "serial0:115200n8"; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - hook { + button-hook { label = "HOOK"; linux,code = ; gpios = <&gpio_asiu 48 0>; diff --git a/arch/arm/boot/dts/bcm947189acdbmr.dts b/arch/arm/boot/dts/bcm947189acdbmr.dts index b0b8c774a37f..16e70a264faf 100644 --- a/arch/arm/boot/dts/bcm947189acdbmr.dts +++ b/arch/arm/boot/dts/bcm947189acdbmr.dts @@ -44,13 +44,13 @@ gpio-keys { compatible = "gpio-keys"; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; }; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm953012er.dts b/arch/arm/boot/dts/bcm953012er.dts index dd63a148a16b..4fe3b3653376 100644 --- a/arch/arm/boot/dts/bcm953012er.dts +++ b/arch/arm/boot/dts/bcm953012er.dts @@ -47,13 +47,13 @@ gpio-keys { compatible = "gpio-keys"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>; }; - restart { + button-restart { label = "Reset"; linux,code = ; gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi index 58b7d9fc7574..c54451dde6dd 100644 --- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi +++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi @@ -13,7 +13,7 @@ autorepeat; poll-interval = <20>; - reset { + button-reset { label = "reset"; linux,code = ; gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi index 576cfc52567b..1830844c8404 100644 --- a/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi +++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi @@ -14,7 +14,7 @@ autorepeat; poll-interval = <20>; - reset { + button-reset { label = "reset"; linux,code = ; gpios = <&gpioa 6 GPIO_ACTIVE_LOW>; -- cgit v1.2.3 From d634a6969c03803a945fdc2bccbe7d813420e569 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jun 2022 13:39:31 +0200 Subject: ARM: dts: broadcom: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 -- arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 -- arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 2 -- arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 -- arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 2 -- arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 2 -- arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 2 -- arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 -- 8 files changed, 16 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts index 14bb788a693d..f52a75c4ca09 100644 --- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts +++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts @@ -47,8 +47,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts index a8294c1ac11b..5ff6c588e16e 100644 --- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts +++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts @@ -77,8 +77,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-power { label = "Power"; diff --git a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts index 4bbd31916729..99253fd7adb3 100644 --- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts +++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts @@ -29,8 +29,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts index 8783963f113b..de961fbb6200 100644 --- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts +++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts @@ -72,8 +72,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts index ac2f4692fc4d..087f7f60de18 100644 --- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts +++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts @@ -99,8 +99,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-rfkill { label = "WiFi"; diff --git a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts index 651113592598..11d1068160da 100644 --- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts +++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts @@ -77,8 +77,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts index 9100ff66ab86..654fcce9fded 100644 --- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts +++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts @@ -34,8 +34,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-restart { label = "Reset"; diff --git a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts index 64ea6def30a4..e678bc03d816 100644 --- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts +++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts @@ -47,8 +47,6 @@ keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-restart { label = "Reset"; -- cgit v1.2.3 From 03b7500f5c3485f58b4485730f7e2ece0b73e0b6 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Thu, 9 Jun 2022 17:21:12 -0700 Subject: ARM: dts: Add DTS files for bcmbca SoC BCM63148 Add DTS for ARMv7 based broadband SoC BCM63148. bcm63148.dtsi is the SoC description DTS header and bcm963148.dts is a simple DTS file for Broadcom BCM963148 Reference board that only enable the UART port. Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm63148.dtsi | 103 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm963148.dts | 30 ++++++++++++ 3 files changed, 134 insertions(+) create mode 100644 arch/arm/boot/dts/bcm63148.dtsi create mode 100644 arch/arm/boot/dts/bcm963148.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 79db8b5fbbb0..c8bdba38a488 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -183,6 +183,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ + bcm963148.dtb \ bcm963178.dtb \ bcm96756.dtb \ bcm96846.dtb \ diff --git a/arch/arm/boot/dts/bcm63148.dtsi b/arch/arm/boot/dts/bcm63148.dtsi new file mode 100644 index 000000000000..df5307b6b3af --- /dev/null +++ b/arch/arm/boot/dts/bcm63148.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm63148", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + B15_0: cpu@0 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B15_1: cpu@1 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + pmu: pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = , + ; + interrupt-affinity = <&B15_0>, <&B15_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@80030000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x80030000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = ; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffe8000 0x8000>; + + uart0: serial@600 { + compatible = "brcm,bcm6345-uart"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm963148.dts b/arch/arm/boot/dts/bcm963148.dts new file mode 100644 index 000000000000..98f6a6d09f50 --- /dev/null +++ b/arch/arm/boot/dts/bcm963148.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63148.dtsi" + +/ { + model = "Broadcom BCM963148 Reference Board"; + compatible = "brcm,bcm963148", "brcm,bcm63148", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 393421f1854105922b99cfd90ad1169d7305dd8e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jun 2022 13:39:08 +0200 Subject: ARM: dts: allwinner: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Acked-by: Jernej Skrabec Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220609113911.380368-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts | 40 +++++++++++----------- arch/arm/boot/dts/sun4i-a10-pcduino.dts | 6 ++-- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 6 ++-- .../boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 4 +-- arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4 +-- arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts | 6 ++-- arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 4 +-- arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 4 +-- arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 6 ++-- arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 4 +-- arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 4 +-- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 4 +-- arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 4 +-- arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi | 4 +-- 14 files changed, 50 insertions(+), 50 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts index 0a562b2cc5bc..62e7aa587f89 100644 --- a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts +++ b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts @@ -63,7 +63,7 @@ compatible = "gpio-keys-polled"; poll-interval = <20>; - left-joystick-left { + event-left-joystick-left { label = "Left Joystick Left"; linux,code = ; linux,input-type = ; @@ -71,7 +71,7 @@ gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */ }; - left-joystick-right { + event-left-joystick-right { label = "Left Joystick Right"; linux,code = ; linux,input-type = ; @@ -79,7 +79,7 @@ gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */ }; - left-joystick-up { + event-left-joystick-up { label = "Left Joystick Up"; linux,code = ; linux,input-type = ; @@ -87,7 +87,7 @@ gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */ }; - left-joystick-down { + event-left-joystick-down { label = "Left Joystick Down"; linux,code = ; linux,input-type = ; @@ -95,7 +95,7 @@ gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */ }; - right-joystick-left { + event-right-joystick-left { label = "Right Joystick Left"; linux,code = ; linux,input-type = ; @@ -103,7 +103,7 @@ gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */ }; - right-joystick-right { + event-right-joystick-right { label = "Right Joystick Right"; linux,code = ; linux,input-type = ; @@ -111,7 +111,7 @@ gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */ }; - right-joystick-up { + event-right-joystick-up { label = "Right Joystick Up"; linux,code = ; linux,input-type = ; @@ -119,7 +119,7 @@ gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */ }; - right-joystick-down { + event-right-joystick-down { label = "Right Joystick Down"; linux,code = ; linux,input-type = ; @@ -127,7 +127,7 @@ gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */ }; - dpad-left { + event-dpad-left { label = "DPad Left"; linux,code = ; linux,input-type = ; @@ -135,7 +135,7 @@ gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */ }; - dpad-right { + event-dpad-right { label = "DPad Right"; linux,code = ; linux,input-type = ; @@ -143,7 +143,7 @@ gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */ }; - dpad-up { + event-dpad-up { label = "DPad Up"; linux,code = ; linux,input-type = ; @@ -151,7 +151,7 @@ gpios = <&pio 7 25 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH25 */ }; - dpad-down { + event-dpad-down { label = "DPad Down"; linux,code = ; linux,input-type = ; @@ -159,49 +159,49 @@ gpios = <&pio 7 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH26 */ }; - x { + event-x { label = "Button X"; linux,code = ; gpios = <&pio 0 16 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA16 */ }; - y { + event-y { label = "Button Y"; linux,code = ; gpios = <&pio 0 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA14 */ }; - a { + event-a { label = "Button A"; linux,code = ; gpios = <&pio 0 17 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA17 */ }; - b { + event-b { label = "Button B"; linux,code = ; gpios = <&pio 0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA15 */ }; - select { + event-select { label = "Select Button"; linux,code = ; gpios = <&pio 0 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA11 */ }; - start { + event-start { label = "Start Button"; linux,code = ; gpios = <&pio 0 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA12 */ }; - top-left { + event-top-left { label = "Top Left Button"; linux,code = ; gpios = <&pio 7 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH22 */ }; - top-right { + event-top-right { label = "Top Right Button"; linux,code = ; gpios = <&pio 0 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA13 */ diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts index 1ac82376baef..a332d61fd561 100644 --- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts @@ -77,19 +77,19 @@ gpio-keys { compatible = "gpio-keys"; - back { + key-back { label = "Key Back"; linux,code = ; gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; }; - home { + key-home { label = "Key Home"; linux,code = ; gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; }; - menu { + key-menu { label = "Key Menu"; linux,code = ; gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index 4f8d55d3ba79..928b86a95f34 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -78,19 +78,19 @@ gpio-keys { compatible = "gpio-keys"; - back { + key-back { label = "Key Back"; linux,code = ; gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; }; - home { + key-home { label = "Key Home"; linux,code = ; gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; }; - menu { + key-menu { label = "Key Menu"; linux,code = ; gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts index c06b217a8af5..d729b7c705db 100644 --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -47,10 +47,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "power"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts index 7721a7a50d45..27a0d51289dd 100644 --- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts @@ -93,10 +93,10 @@ }; }; - r-gpio-keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts b/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts index ff0a7a952e0c..f5c8ccc5b872 100644 --- a/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts +++ b/arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts @@ -39,16 +39,16 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ }; - user { + key-user { label = "user"; linux,code = ; gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts index 23aae3eaed79..43641cb82398 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts @@ -37,10 +37,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - k1 { + key-0 { label = "k1"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi index a9f749f49beb..cf8413fba6c1 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi +++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi @@ -73,10 +73,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - k1 { + key-0 { label = "k1"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts index 9daffd90c12f..f1f9dbead32a 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts @@ -88,16 +88,16 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw2 { + switch-2 { label = "sw2"; linux,code = ; gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; }; - sw4 { + switch-4 { label = "sw4"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts index 6f9c97add54e..305b34a321f5 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts @@ -87,10 +87,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts index 4759ba3f2986..59f6f6d5e7ca 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts @@ -86,10 +86,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts index 90f75fa85e68..b96e015f54ee 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts @@ -86,10 +86,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi index d4627bc7c122..e899d14f38c3 100644 --- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi +++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi @@ -77,10 +77,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "power"; linux,code = ; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi index 9e14fe5fdcde..89731bb34c6b 100644 --- a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi +++ b/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi @@ -42,10 +42,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = ; gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ -- cgit v1.2.3 From 08a4aeb2c23f3cc8866e509cae4707d1cc1ed72f Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Wed, 15 Jun 2022 14:53:35 +0200 Subject: ARM: dts: Add PCIe support for Airoha EN7523 This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is nearly identical to the one in MT7622 Signed-off-by: Felix Fietkau Link: https://lore.kernel.org/r/20220615125335.96089-3-nbd@nbd.name Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/en7523-evb.dts | 8 ++++++ arch/arm/boot/dts/en7523.dtsi | 58 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts index a8d8bb0419a0..f23a25cce119 100644 --- a/arch/arm/boot/dts/en7523-evb.dts +++ b/arch/arm/boot/dts/en7523-evb.dts @@ -33,3 +33,11 @@ &gpio1 { status = "okay"; }; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index 2e705b87b6c1..7f839331a777 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -143,4 +143,62 @@ gpio-controller; #gpio-cells = <2>; }; + + pcie0: pcie@1fa91000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa91000 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck0"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pcie1: pcie@1fa92000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa92000 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck1"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + pcie_intc1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; }; -- cgit v1.2.3 From 97a9495efbdc5184930a75d36ca845d578e3ee1b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jun 2022 13:40:46 +0200 Subject: ARM: dts: exynos: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220609114047.380793-8-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4210-i9100.dts | 8 ++++---- arch/arm/boot/dts/exynos4210-origen.dts | 10 +++++----- arch/arm/boot/dts/exynos4412-itop-elite.dts | 10 +++++----- arch/arm/boot/dts/exynos5250-arndale.dts | 12 ++++++------ arch/arm/boot/dts/exynos5250-snow-common.dtsi | 2 +- arch/arm/boot/dts/exynos5250-spring.dts | 2 +- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +- arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 +- arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 +- 9 files changed, 25 insertions(+), 25 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts index 3c0a18b30837..bba85011ecc9 100644 --- a/arch/arm/boot/dts/exynos4210-i9100.dts +++ b/arch/arm/boot/dts/exynos4210-i9100.dts @@ -89,21 +89,21 @@ gpio-keys { compatible = "gpio-keys"; - vol-down { + key-vol-down { gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; linux,code = ; label = "volume down"; debounce-interval = <10>; }; - vol-up { + key-vol-up { gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; linux,code = ; label = "volume up"; debounce-interval = <10>; }; - power { + key-power { gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; linux,code = ; label = "power"; @@ -111,7 +111,7 @@ wakeup-source; }; - ok { + key-ok { gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; linux,code = ; label = "ok"; diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index a08ce2f37ea2..bfdc21854914 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -46,35 +46,35 @@ gpio-keys { compatible = "gpio-keys"; - up { + key-up { label = "Up"; gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - down { + key-down { label = "Down"; gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - back { + key-back { label = "Back"; gpios = <&gpx1 7 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - home { + key-home { label = "Home"; gpios = <&gpx1 6 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - menu { + key-menu { label = "Menu"; gpios = <&gpx1 5 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts index a9406280b979..05db9eb9b24c 100644 --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts @@ -44,31 +44,31 @@ gpio-keys { compatible = "gpio-keys"; - home { + key-home { label = "GPIO Key Home"; linux,code = ; gpios = <&gpx1 1 GPIO_ACTIVE_LOW>; }; - back { + key-back { label = "GPIO Key Back"; linux,code = ; gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; }; - sleep { + key-sleep { label = "GPIO Key Sleep"; linux,code = ; gpios = <&gpx3 3 GPIO_ACTIVE_LOW>; }; - vol-up { + key-vol-up { label = "GPIO Key Vol+"; linux,code = ; gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; }; - vol-down { + key-vol-down { label = "GPIO Key Vol-"; linux,code = ; gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index f7795f2d0f0e..71c0e87d3a1d 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -30,42 +30,42 @@ gpio-keys { compatible = "gpio-keys"; - menu { + key-menu { label = "SW-TACT2"; gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - home { + key-home { label = "SW-TACT3"; gpios = <&gpx1 5 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - up { + key-up { label = "SW-TACT4"; gpios = <&gpx1 6 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - down { + key-down { label = "SW-TACT5"; gpios = <&gpx1 7 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - back { + key-back { label = "SW-TACT6"; gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - wakeup { + key-wakeup { label = "SW-TACT7"; gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi index c15ecfc4077d..3d84b9c6dea3 100644 --- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi +++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi @@ -32,7 +32,7 @@ pinctrl-names = "default"; pinctrl-0 = <&power_key_irq &lid_irq>; - power { + power-key { label = "Power"; gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts index 24609bb20158..5eca10ecd550 100644 --- a/arch/arm/boot/dts/exynos5250-spring.dts +++ b/arch/arm/boot/dts/exynos5250-spring.dts @@ -33,7 +33,7 @@ pinctrl-names = "default"; pinctrl-0 = <&power_key_irq>, <&lid_irq>; - power { + power-key { label = "Power"; gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 946b791faf85..55b7759682a9 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -42,7 +42,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "SW-TACT1"; gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index d6434ec86022..9e2123470cad 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -60,7 +60,7 @@ pinctrl-names = "default"; pinctrl-0 = <&power_key_irq &lid_irq>; - power { + power-key { label = "Power"; gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 4ee76281979c..0ebcb66c6319 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -59,7 +59,7 @@ pinctrl-names = "default"; pinctrl-0 = <&power_key_irq &lid_irq>; - power { + power-key { label = "Power"; gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From 8b86f733c0e512f92e43a9db1559498ef64d244e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 Jun 2022 13:40:47 +0200 Subject: ARM: dts: s5pv210: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220609114047.380793-9-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s5pv210-fascinate4g.dts | 6 +++--- arch/arm/boot/dts/s5pv210-galaxys.dts | 8 ++++---- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s5pv210-fascinate4g.dts b/arch/arm/boot/dts/s5pv210-fascinate4g.dts index eae51b197ee9..eaa7c4f0e257 100644 --- a/arch/arm/boot/dts/s5pv210-fascinate4g.dts +++ b/arch/arm/boot/dts/s5pv210-fascinate4g.dts @@ -17,20 +17,20 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; gpios = <&gph2 6 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - vol-down { + key-vol-down { label = "volume_down"; gpios = <&gph3 2 GPIO_ACTIVE_LOW>; linux,code = ; }; - vol-up { + key-vol-up { label = "volume_up"; gpios = <&gph3 1 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/s5pv210-galaxys.dts b/arch/arm/boot/dts/s5pv210-galaxys.dts index aaf880792f36..cdd3653d487f 100644 --- a/arch/arm/boot/dts/s5pv210-galaxys.dts +++ b/arch/arm/boot/dts/s5pv210-galaxys.dts @@ -24,26 +24,26 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; gpios = <&gph2 6 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - vol-down { + key-vol-down { label = "volume_down"; gpios = <&gph3 1 GPIO_ACTIVE_LOW>; linux,code = ; }; - vol-up { + key-vol-up { label = "volume_up"; gpios = <&gph3 2 GPIO_ACTIVE_LOW>; linux,code = ; }; - home { + key-home { label = "home"; gpios = <&gph3 5 GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From 4580f60b2337aa9f1da5a493adc5d609fe126185 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:45:25 +0200 Subject: ARM: dts: pxa: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204525.832847-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/pxa300-raumfeld-common.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/pxa300-raumfeld-common.dtsi b/arch/arm/boot/dts/pxa300-raumfeld-common.dtsi index 8a6721d436bd..147c99191dc2 100644 --- a/arch/arm/boot/dts/pxa300-raumfeld-common.dtsi +++ b/arch/arm/boot/dts/pxa300-raumfeld-common.dtsi @@ -189,31 +189,31 @@ regulators { regulator-v3 { - regulator-compatible= "V3(DCDC)"; + regulator-compatible = "V3(DCDC)"; regulator-min-microvolt = <725000>; regulator-max-microvolt = <1800000>; }; regulator-v4 { - regulator-compatible= "V4(DCDC)"; + regulator-compatible = "V4(DCDC)"; regulator-min-microvolt = <725000>; regulator-max-microvolt = <1800000>; }; regulator-v5 { - regulator-compatible= "V5(LDO)"; + regulator-compatible = "V5(LDO)"; regulator-min-microvolt = <1700000>; regulator-max-microvolt = <2000000>; }; reg_vcc_sdio: regulator-v6 { - regulator-compatible= "V6(LDO)"; + regulator-compatible = "V6(LDO)"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; regulator-v7 { - regulator-compatible= "V7(LDO)"; + regulator-compatible = "V7(LDO)"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; -- cgit v1.2.3 From 94d0a03297615cad2d40b0f02ceab902a7339062 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:41:27 +0200 Subject: ARM: dts: aspeed: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204127.831853-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts | 6 +++--- arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts b/arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts index 61bc74b423cf..a5e64ccc2b3a 100644 --- a/arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts +++ b/arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts @@ -24,17 +24,17 @@ leds { compatible = "gpio-leds"; postcode0 { - label="BMC_UP"; + label = "BMC_UP"; gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; default-state = "on"; }; postcode1 { - label="BMC_HB"; + label = "BMC_HB"; gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; postcode2 { - label="FAULT"; + label = "FAULT"; gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; }; // postcode3-7 are GPIOH3-H7 diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts index 69e1bd256271..46cbba6305b8 100644 --- a/arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts @@ -65,19 +65,19 @@ compatible = "gpio-leds"; BMC_HEARTBEAT_N { - label="BMC_HEARTBEAT_N"; + label = "BMC_HEARTBEAT_N"; gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; BMC_LED_STATUS_AMBER_N { - label="BMC_LED_STATUS_AMBER_N"; + label = "BMC_LED_STATUS_AMBER_N"; gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; default-state = "off"; }; FM_ID_LED_N { - label="FM_ID_LED_N"; + label = "FM_ID_LED_N"; gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; default-state = "off"; }; -- cgit v1.2.3 From bc5187b427ddbfefd533178c7af6af9fa3a0490d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:41:09 +0200 Subject: ARM: dts: at91: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204110.831805-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/at91-kizbox3-hs.dts | 2 +- arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 2 +- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_icp.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 6 +++--- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 6 +++--- arch/arm/boot/dts/sam9x60.dtsi | 2 +- 9 files changed, 15 insertions(+), 15 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91-kizbox3-hs.dts b/arch/arm/boot/dts/at91-kizbox3-hs.dts index 2799b2a1f4d2..224f4d5ac4df 100644 --- a/arch/arm/boot/dts/at91-kizbox3-hs.dts +++ b/arch/arm/boot/dts/at91-kizbox3-hs.dts @@ -186,7 +186,7 @@ &pioA { pinctrl_key_gpio_default: key_gpio_default { - pinmux= , + pinmux = , , , , diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 7719ea3d4933..886bc855daa4 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -85,7 +85,7 @@ sw1 { label = "SW1"; gpios = <&pioD 18 GPIO_ACTIVE_LOW>; - linux,code=; + linux,code = ; wakeup-source; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi index a4623cc67cc1..e87c4990bf5d 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi @@ -15,7 +15,7 @@ compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; aliases { - i2c0 = &i2c0; + i2c0 = &i2c0; }; clocks { diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 08f0d4b995ff..b1c390ae5f98 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -21,8 +21,8 @@ serial0 = &uart1; /* DBGU */ serial1 = &uart4; /* mikro BUS 1 */ serial2 = &uart2; /* mikro BUS 2 */ - i2c1 = &i2c1; - i2c2 = &i2c3; + i2c1 = &i2c1; + i2c2 = &i2c3; }; chosen { diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index 5e8755f22784..48e85fc3d998 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -19,7 +19,7 @@ serial1 = &uart6; /* BT */ serial2 = &uart5; /* mikro BUS 2 */ serial3 = &uart3; /* mikro BUS 1 */ - i2c1 = &i2c1; + i2c1 = &i2c1; }; chosen { diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 806eb1d911d7..5ff692ea8a20 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -24,8 +24,8 @@ serial1 = &uart1; /* mikro BUS 3 */ serial3 = &uart3; /* mikro BUS 2 */ serial5 = &uart7; /* flx2 */ - i2c0 = &i2c0; - i2c1 = &i2c1; + i2c0 = &i2c0; + i2c1 = &i2c1; }; chosen { diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 8ed58af01391..64c3e63de179 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -20,9 +20,9 @@ aliases { serial0 = &uart0; /* DBGU */ - i2c0 = &i2c0; /* mikroBUS 1 */ - i2c1 = &i2c1; /* XPRO EXT1 */ - i2c2 = &i2c2; + i2c0 = &i2c0; /* mikroBUS 1 */ + i2c1 = &i2c1; /* XPRO EXT1 */ + i2c2 = &i2c2; }; chosen { diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index cdfe891f9a9e..5959bf0c2fa3 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -205,10 +205,10 @@ regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-min-microvolt=<1400000>; - regulator-suspend-max-microvolt=<1400000>; + regulator-suspend-min-microvolt = <1400000>; + regulator-suspend-max-microvolt = <1400000>; regulator-changeable-in-suspend; - regulator-mode=; + regulator-mode = ; }; }; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index c328b67bea0c..a0e21022dbc5 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -464,7 +464,7 @@ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; #pwm-cells = <3>; - status="disabled"; + status = "disabled"; }; hlcdc: hlcdc@f8038000 { -- cgit v1.2.3 From 06e00a512d0a09760bef10621d4cdefc26777fad Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:41:00 +0200 Subject: ARM: dts: axm: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204100.831742-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/axm5516-cpus.dtsi | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/axm5516-cpus.dtsi b/arch/arm/boot/dts/axm5516-cpus.dtsi index 3bcf4e0a3c85..f13ef80b6637 100644 --- a/arch/arm/boot/dts/axm5516-cpus.dtsi +++ b/arch/arm/boot/dts/axm5516-cpus.dtsi @@ -73,7 +73,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x00>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -81,7 +81,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x01>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -89,7 +89,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x02>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -97,7 +97,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x03>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -105,7 +105,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x100>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -113,7 +113,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x101>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -121,7 +121,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x102>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -129,7 +129,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x103>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -137,7 +137,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x200>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -145,7 +145,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x201>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -153,7 +153,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x202>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -161,7 +161,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x203>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -169,7 +169,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x300>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -177,7 +177,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x301>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -185,7 +185,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x302>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; @@ -193,7 +193,7 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x303>; - clock-frequency= <1400000000>; + clock-frequency = <1400000000>; cpu-release-addr = <0>; // Fixed by the boot loader }; }; -- cgit v1.2.3 From 194f47c31ab6c37e4557eb60b382704296c10925 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:38:15 +0200 Subject: ARM: dts: spear: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20220526203815.831383-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/spear1310-evb.dts | 2 +- arch/arm/boot/dts/spear1340-evb.dts | 2 +- arch/arm/boot/dts/spear1340.dtsi | 2 +- arch/arm/boot/dts/spear300-evb.dts | 2 +- arch/arm/boot/dts/spear310-evb.dts | 2 +- arch/arm/boot/dts/spear320-evb.dts | 2 +- arch/arm/boot/dts/spear320-hmi.dts | 2 +- arch/arm/boot/dts/spear320.dtsi | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts index ddd1cf4d0554..05408df38203 100644 --- a/arch/arm/boot/dts/spear1310-evb.dts +++ b/arch/arm/boot/dts/spear1310-evb.dts @@ -170,7 +170,7 @@ smi: flash@ea000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@e6000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts index 3a51a41eb5e4..7700f2afc128 100644 --- a/arch/arm/boot/dts/spear1340-evb.dts +++ b/arch/arm/boot/dts/spear1340-evb.dts @@ -168,7 +168,7 @@ smi: flash@ea000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@e6000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index 13e1bdb3ddbf..818886e11713 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -88,7 +88,7 @@ }; pwm: pwm@e0180000 { - compatible ="st,spear13xx-pwm"; + compatible = "st,spear13xx-pwm"; reg = <0xe0180000 0x1000>; #pwm-cells = <2>; status = "disabled"; diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index 2beb30ca2cba..303ef29fb805 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -80,7 +80,7 @@ smi: flash@fc000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@f8000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts index 1c41e4a40334..ea0b53036f7b 100644 --- a/arch/arm/boot/dts/spear310-evb.dts +++ b/arch/arm/boot/dts/spear310-evb.dts @@ -94,7 +94,7 @@ smi: flash@fc000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@f8000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts index c322407a0ade..3c026d021c92 100644 --- a/arch/arm/boot/dts/spear320-evb.dts +++ b/arch/arm/boot/dts/spear320-evb.dts @@ -95,7 +95,7 @@ smi: flash@fc000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@f8000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear320-hmi.dts b/arch/arm/boot/dts/spear320-hmi.dts index b587e4ec11e5..34503ac9c51c 100644 --- a/arch/arm/boot/dts/spear320-hmi.dts +++ b/arch/arm/boot/dts/spear320-hmi.dts @@ -167,7 +167,7 @@ smi: flash@fc000000 { status = "okay"; - clock-rate=<50000000>; + clock-rate = <50000000>; flash@f8000000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi index 47ac4474ed96..b12474446a48 100644 --- a/arch/arm/boot/dts/spear320.dtsi +++ b/arch/arm/boot/dts/spear320.dtsi @@ -78,7 +78,7 @@ }; pwm: pwm@a8000000 { - compatible ="st,spear-pwm"; + compatible = "st,spear-pwm"; reg = <0xa8000000 0x1000>; #pwm-cells = <2>; status = "disabled"; -- cgit v1.2.3 From b3b0f459c2490e63106a86a3dfd3610d16184bfa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:38:10 +0200 Subject: ARM: dts: alpine: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203810.831352-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/alpine.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi index 3b0675a1c460..4be9887033f9 100644 --- a/arch/arm/boot/dts/alpine.dtsi +++ b/arch/arm/boot/dts/alpine.dtsi @@ -154,7 +154,7 @@ reg = <0x0 0xfbc00000 0x0 0x100000>; interrupt-map-mask = <0xf800 0 0 7>; /* Add legacy interrupts for SATA devices only */ - interrupt-map = <0x4000 0 0 1 &gic 0 43 4>, + interrupt-map = <0x4000 0 0 1 &gic 0 43 4>, <0x4800 0 0 1 &gic 0 44 4>; /* 32 bit non prefetchable memory space */ -- cgit v1.2.3 From 4f2ff3feab43d81e1627b02b8a0ad9938dcbdc99 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:37:58 +0200 Subject: ARM: dts: ecx: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203758.831301-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/ecx-common.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi index 57a028a69373..ce5221c6b358 100644 --- a/arch/arm/boot/dts/ecx-common.dtsi +++ b/arch/arm/boot/dts/ecx-common.dtsi @@ -9,11 +9,11 @@ }; psci { - compatible = "arm,psci"; - method = "smc"; - cpu_suspend = <0x84000002>; - cpu_off = <0x84000004>; - cpu_on = <0x84000006>; + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0x84000002>; + cpu_off = <0x84000004>; + cpu_on = <0x84000006>; }; soc { -- cgit v1.2.3 From 468aaf56bd5fbd65686320121a6bcf6970ec3b10 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:37:32 +0200 Subject: ARM: dts: lpc: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203732.831250-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/lpc18xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index 10b8249b8ab6..c6f8942f8d3d 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -183,7 +183,7 @@ compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac"; reg = <0x40010000 0x2000>; interrupts = <5>; - interrupt-names = "macirq"; + interrupt-names = "macirq"; clocks = <&ccu1 CLK_CPU_ETHERNET>; clock-names = "stmmaceth"; resets = <&rgu 22>; -- cgit v1.2.3 From f30528c6b08a4e4b8e6a36ef10c1e7bc918bf6f0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:37:24 +0200 Subject: ARM: dts: nuvoton: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203724.831215-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 2 +- arch/arm/boot/dts/nuvoton-npcm750.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index 3696980a3da1..9633b50a9c6d 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -128,7 +128,7 @@ interrupts = ; interrupt-names = "macirq"; ethernet = <0>; - clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>; + clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>; clock-names = "stmmaceth", "clk_gmac"; pinctrl-names = "default"; pinctrl-0 = <&rg1_pins diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi index 13eee0fe5642..30eed40b89b5 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi +++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi @@ -51,7 +51,7 @@ interrupts = ; interrupt-names = "macirq"; ethernet = <1>; - clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>; + clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>; clock-names = "stmmaceth", "clk_gmac"; pinctrl-names = "default"; pinctrl-0 = <&rg2_pins -- cgit v1.2.3 From 282a4b9ee9ec8cf8c5e516d127b065318a376289 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:36:56 +0200 Subject: ARM: dts: ste: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203656.831126-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/ste-ab8500.dtsi | 6 +++--- arch/arm/boot/dts/ste-hrefv60plus.dtsi | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ste-ab8500.dtsi b/arch/arm/boot/dts/ste-ab8500.dtsi index 35137c6e52ee..dd30d08ccb9b 100644 --- a/arch/arm/boot/dts/ste-ab8500.dtsi +++ b/arch/arm/boot/dts/ste-ab8500.dtsi @@ -195,7 +195,7 @@ "CH_WD_EXP", "VBUS_CH_DROP_END"; monitored-battery = <&battery>; - vddadc-supply = <&ab8500_ldo_tvout_reg>; + vddadc-supply = <&ab8500_ldo_tvout_reg>; io-channels = <&gpadc 0x03>, <&gpadc 0x0a>, <&gpadc 0x09>, @@ -207,8 +207,8 @@ }; ab8500_chargalg { - compatible = "stericsson,ab8500-chargalg"; - monitored-battery = <&battery>; + compatible = "stericsson,ab8500-chargalg"; + monitored-battery = <&battery>; }; ab8500_usb: phy { diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi index 8f504edefd3f..e66fa59c2de6 100644 --- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi +++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi @@ -353,11 +353,11 @@ * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset) */ hrefv60_cfg1 { - pins ="GPIO65_F1"; + pins = "GPIO65_F1"; ste,config = <&gpio_out_hi>; }; hrefv60_cfg2 { - pins ="GPIO66_G3"; + pins = "GPIO66_G3"; ste,config = <&gpio_out_lo>; }; }; -- cgit v1.2.3 From 53f2ade4b0a36a38c3c29134586857d6db6f6dcb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:36:31 +0200 Subject: ARM: dts: sti: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Patrice Chotard Link: https://lore.kernel.org/r/20220526203632.831039-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/stih407-family.dtsi | 174 +++++++++++++++++----------------- arch/arm/boot/dts/stih407.dtsi | 4 +- arch/arm/boot/dts/stih410.dtsi | 4 +- arch/arm/boot/dts/stihxxx-b2120.dtsi | 8 +- 4 files changed, 95 insertions(+), 95 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 1713f7878117..33cf54cb46cc 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -137,8 +137,8 @@ }; irq-syscfg { - compatible = "st,stih407-irq-syscfg"; - st,syscfg = <&syscfg_core>; + compatible = "st,stih407-irq-syscfg"; + st,syscfg = <&syscfg_core>; st,irq-device = , ; st,fiq-device = , @@ -157,8 +157,8 @@ miphy28lp_phy: miphy28lp { compatible = "st,miphy28lp-phy"; st,syscfg = <&syscfg_core>; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; ranges; phy_port0: port@9b22000 { @@ -208,26 +208,26 @@ }; st231_gp0: st231-gp0 { - compatible = "st,st231-rproc"; - memory-region = <&gp0_reserved>; - resets = <&softreset STIH407_ST231_GP0_SOFTRESET>; - reset-names = "sw_reset"; - clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>; - clock-frequency = <600000000>; - st,syscfg = <&syscfg_core 0x22c>; + compatible = "st,st231-rproc"; + memory-region = <&gp0_reserved>; + resets = <&softreset STIH407_ST231_GP0_SOFTRESET>; + reset-names = "sw_reset"; + clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>; + clock-frequency = <600000000>; + st,syscfg = <&syscfg_core 0x22c>; #mbox-cells = <1>; mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>; }; st231_delta: st231-delta { - compatible = "st,st231-rproc"; - memory-region = <&delta_reserved>; - resets = <&softreset STIH407_ST231_DMU_SOFTRESET>; - reset-names = "sw_reset"; - clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>; - clock-frequency = <600000000>; - st,syscfg = <&syscfg_core 0x224>; + compatible = "st,st231-rproc"; + memory-region = <&delta_reserved>; + resets = <&softreset STIH407_ST231_DMU_SOFTRESET>; + reset-names = "sw_reset"; + clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>; + clock-frequency = <600000000>; + st,syscfg = <&syscfg_core 0x224>; #mbox-cells = <1>; mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>; @@ -710,78 +710,78 @@ st_dwc3: dwc3@8f94000 { - compatible = "st,stih407-dwc3"; - reg = <0x08f94000 0x1000>, <0x110 0x4>; - reg-names = "reg-glue", "syscfg-reg"; - st,syscfg = <&syscfg_core>; - resets = <&powerdown STIH407_USB3_POWERDOWN>, - <&softreset STIH407_MIPHY2_SOFTRESET>; - reset-names = "powerdown", "softreset"; - #address-cells = <1>; - #size-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb3>; + compatible = "st,stih407-dwc3"; + reg = <0x08f94000 0x1000>, <0x110 0x4>; + reg-names = "reg-glue", "syscfg-reg"; + st,syscfg = <&syscfg_core>; + resets = <&powerdown STIH407_USB3_POWERDOWN>, + <&softreset STIH407_MIPHY2_SOFTRESET>; + reset-names = "powerdown", "softreset"; + #address-cells = <1>; + #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb3>; ranges; status = "disabled"; dwc3: dwc3@9900000 { - compatible = "snps,dwc3"; - reg = <0x09900000 0x100000>; - interrupts = ; - dr_mode = "host"; - phy-names = "usb2-phy", "usb3-phy"; - phys = <&usb2_picophy0>, - <&phy_port2 PHY_TYPE_USB3>; + compatible = "snps,dwc3"; + reg = <0x09900000 0x100000>; + interrupts = ; + dr_mode = "host"; + phy-names = "usb2-phy", "usb3-phy"; + phys = <&usb2_picophy0>, + <&phy_port2 PHY_TYPE_USB3>; snps,dis_u3_susphy_quirk; }; }; /* COMMS PWM Module */ pwm0: pwm@9810000 { - compatible = "st,sti-pwm"; - #pwm-cells = <2>; - reg = <0x9810000 0x68>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm0_chan0_default>; - clock-names = "pwm"; - clocks = <&clk_sysin>; + compatible = "st,sti-pwm"; + #pwm-cells = <2>; + reg = <0x9810000 0x68>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_chan0_default>; + clock-names = "pwm"; + clocks = <&clk_sysin>; st,pwm-num-chan = <1>; - status = "disabled"; + status = "disabled"; }; /* SBC PWM Module */ pwm1: pwm@9510000 { - compatible = "st,sti-pwm"; - #pwm-cells = <2>; - reg = <0x9510000 0x68>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm1_chan0_default - &pinctrl_pwm1_chan1_default - &pinctrl_pwm1_chan2_default - &pinctrl_pwm1_chan3_default>; - clock-names = "pwm"; - clocks = <&clk_sysin>; + compatible = "st,sti-pwm"; + #pwm-cells = <2>; + reg = <0x9510000 0x68>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1_chan0_default + &pinctrl_pwm1_chan1_default + &pinctrl_pwm1_chan2_default + &pinctrl_pwm1_chan3_default>; + clock-names = "pwm"; + clocks = <&clk_sysin>; st,pwm-num-chan = <4>; - status = "disabled"; + status = "disabled"; }; rng10: rng@8a89000 { - compatible = "st,rng"; - reg = <0x08a89000 0x1000>; - clocks = <&clk_sysin>; - status = "okay"; + compatible = "st,rng"; + reg = <0x08a89000 0x1000>; + clocks = <&clk_sysin>; + status = "okay"; }; rng11: rng@8a8a000 { - compatible = "st,rng"; - reg = <0x08a8a000 0x1000>; - clocks = <&clk_sysin>; - status = "okay"; + compatible = "st,rng"; + reg = <0x08a8a000 0x1000>; + clocks = <&clk_sysin>; + status = "okay"; }; ethernet0: dwmac@9630000 { @@ -812,36 +812,36 @@ }; mailbox0: mailbox@8f00000 { - compatible = "st,stih407-mailbox"; - reg = <0x8f00000 0x1000>; - interrupts = ; - #mbox-cells = <2>; - mbox-name = "a9"; - status = "okay"; + compatible = "st,stih407-mailbox"; + reg = <0x8f00000 0x1000>; + interrupts = ; + #mbox-cells = <2>; + mbox-name = "a9"; + status = "okay"; }; mailbox1: mailbox@8f01000 { - compatible = "st,stih407-mailbox"; - reg = <0x8f01000 0x1000>; - #mbox-cells = <2>; - mbox-name = "st231_gp_1"; - status = "okay"; + compatible = "st,stih407-mailbox"; + reg = <0x8f01000 0x1000>; + #mbox-cells = <2>; + mbox-name = "st231_gp_1"; + status = "okay"; }; mailbox2: mailbox@8f02000 { - compatible = "st,stih407-mailbox"; - reg = <0x8f02000 0x1000>; - #mbox-cells = <2>; - mbox-name = "st231_gp_0"; - status = "okay"; + compatible = "st,stih407-mailbox"; + reg = <0x8f02000 0x1000>; + #mbox-cells = <2>; + mbox-name = "st231_gp_0"; + status = "okay"; }; mailbox3: mailbox@8f03000 { - compatible = "st,stih407-mailbox"; - reg = <0x8f03000 0x1000>; - #mbox-cells = <2>; - mbox-name = "st231_audio_video"; - status = "okay"; + compatible = "st,stih407-mailbox"; + reg = <0x8f03000 0x1000>; + #mbox-cells = <2>; + mbox-name = "st231_audio_video"; + status = "okay"; }; /* fdma audio */ @@ -913,7 +913,7 @@ dmas = <&fdma0 2 0 1>; dma-names = "tx"; - status = "disabled"; + status = "disabled"; }; sti_uni_player1: sti-uni-player@8d81000 { diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi index 9e212b0af89d..aca43d2bdaad 100644 --- a/arch/arm/boot/dts/stih407.dtsi +++ b/arch/arm/boot/dts/stih407.dtsi @@ -13,7 +13,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0 0>; - assigned-clocks = <&clk_s_d2_quadfs 0>, + assigned-clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, <&clk_s_c0_pll1 0>, <&clk_s_c0_flexgen CLK_COMPO_DVP>, @@ -106,7 +106,7 @@ reg-names = "hdmi-reg"; #sound-dai-cells = <0>; interrupts = ; - interrupt-names = "irq"; + interrupt-names = "irq"; clock-names = "pix", "tmds", "phy", diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index ce2f62cf129b..a39dd5f7bcae 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -105,7 +105,7 @@ #size-cells = <1>; reg = <0 0>; - assigned-clocks = <&clk_s_d2_quadfs 0>, + assigned-clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, <&clk_s_c0_pll1 0>, <&clk_s_c0_flexgen CLK_COMPO_DVP>, @@ -198,7 +198,7 @@ reg-names = "hdmi-reg"; #sound-dai-cells = <0>; interrupts = ; - interrupt-names = "irq"; + interrupt-names = "irq"; clock-names = "pix", "tmds", "phy", diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi index 4c72dedcd1be..2aa94605d3d4 100644 --- a/arch/arm/boot/dts/stihxxx-b2120.dtsi +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi @@ -175,11 +175,11 @@ /* tsin0 is TSA on NIMA */ tsin0: port { - tsin-num = <0>; + tsin-num = <0>; serial-not-parallel; - i2c-bus = <&ssc2>; - reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>; - dvb-card = ; + i2c-bus = <&ssc2>; + reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>; + dvb-card = ; }; }; -- cgit v1.2.3 From b03f15ee9881310cacfab1db0967598f88bfbb4d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:37:14 +0200 Subject: ARM: dts: sd: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526203714.831177-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/sd5203.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sd5203.dts b/arch/arm/boot/dts/sd5203.dts index a61a078ea042..69381819e07b 100644 --- a/arch/arm/boot/dts/sd5203.dts +++ b/arch/arm/boot/dts/sd5203.dts @@ -15,7 +15,7 @@ #size-cells = <1>; chosen { - bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000"; + bootargs = "console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000"; }; aliases { -- cgit v1.2.3 From 9e8322dcf5f677cfc65d982546fb3aa6fa8b399a Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Wed, 8 Jun 2022 11:08:50 +0200 Subject: ARM: dts: r9a06g032-rzn1d400-db: Enable rtc0 The RZ/N1D-DB board does have a battery to power the RTC. Enable the RTC device on this board. Signed-off-by: Clément Léger Link: https://lore.kernel.org/r/20220608090850.92735-1-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts index 3f8f3ce87e12..ca39e1d681c1 100644 --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts @@ -23,6 +23,10 @@ }; }; +&rtc0 { + status = "okay"; +}; + &uart0 { status = "okay"; }; -- cgit v1.2.3 From 3c7742a45c170430001c5a1767d9dd76686dc14d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 15 Jun 2022 16:01:10 +0200 Subject: ARM: dts: rza2mevb: Fix LED node names "make dtbs_check": arch/arm/boot/dts/r7s9210-rza2mevb.dtb: leds: 'green', 'red' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/leds/leds-gpio.yaml Fix this by prefixing the LED node names with "led-". Signed-off-by: Geert Uytterhoeven Reviewed-by: Kieran Bingham Link: https://lore.kernel.org/r/f6e2883c16803b5d90a26c38d8e61ad15096089c.1655301593.git.geert+renesas@glider.be --- arch/arm/boot/dts/r7s9210-rza2mevb.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r7s9210-rza2mevb.dts b/arch/arm/boot/dts/r7s9210-rza2mevb.dts index 9c0d9686fe01..69a5a44b8a2f 100644 --- a/arch/arm/boot/dts/r7s9210-rza2mevb.dts +++ b/arch/arm/boot/dts/r7s9210-rza2mevb.dts @@ -71,10 +71,10 @@ leds { compatible = "gpio-leds"; - red { + led-red { gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>; }; - green { + led-green { gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>; }; }; -- cgit v1.2.3 From c4218e8cb97104b316e3e22286e15a064721effc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:44:02 +0200 Subject: ARM: dts: mediatek: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204402.832393-2-krzysztof.kozlowski@linaro.org Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt2701.dtsi | 8 ++++---- arch/arm/boot/dts/mt7623.dtsi | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index ef583cfd3baf..b8eba3ba153c 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -427,9 +427,9 @@ afe: audio-controller { compatible = "mediatek,mt2701-audio"; - interrupts = , + interrupts = , ; - interrupt-names = "afe", "asys"; + interrupt-names = "afe", "asys"; power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; clocks = <&infracfg CLK_INFRA_AUDIO>, @@ -559,7 +559,7 @@ compatible = "mediatek,mt2701-jpgdec"; reg = <0 0x15004000 0 0x1000>; interrupts = ; - clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, <&imgsys CLK_IMG_JPGDEC>; clock-names = "jpgdec-smi", "jpgdec"; @@ -573,7 +573,7 @@ "mediatek,mtk-jpgenc"; reg = <0 0x1500a000 0 0x1000>; interrupts = ; - clocks = <&imgsys CLK_IMG_VENC>; + clocks = <&imgsys CLK_IMG_VENC>; clock-names = "jpgenc"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index f4848362b3be..25d31e40a553 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -241,7 +241,7 @@ }; pericfg: syscon@10003000 { - compatible = "mediatek,mt7623-pericfg", + compatible = "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon"; reg = <0 0x10003000 0 0x1000>; @@ -628,9 +628,9 @@ afe: audio-controller { compatible = "mediatek,mt7623-audio", "mediatek,mt2701-audio"; - interrupts = , + interrupts = , ; - interrupt-names = "afe", "asys"; + interrupt-names = "afe", "asys"; power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; clocks = <&infracfg CLK_INFRA_AUDIO>, -- cgit v1.2.3 From 4da8b5e9f24a8036660f7a09553c0ddc5db4839a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:11 -0700 Subject: ARM: dts: mediatek: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-18-krzysztof.kozlowski@linaro.org Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 4 ++-- arch/arm/boot/dts/mt7623a-rfb-nand.dts | 4 ++-- arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 4 ++-- arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 4 ++-- arch/arm/boot/dts/mt7629-rfb.dts | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/mt7623a-rfb-emmc.dts b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts index 13c86936d1c8..e8b4b6d30d19 100644 --- a/arch/arm/boot/dts/mt7623a-rfb-emmc.dts +++ b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts @@ -45,13 +45,13 @@ pinctrl-names = "default"; pinctrl-0 = <&key_pins_a>; - factory { + button-factory { label = "factory"; linux,code = ; gpios = <&pio 256 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&pio 257 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/mt7623a-rfb-nand.dts b/arch/arm/boot/dts/mt7623a-rfb-nand.dts index 88d8f0b2f4c2..61f5da68d4b0 100644 --- a/arch/arm/boot/dts/mt7623a-rfb-nand.dts +++ b/arch/arm/boot/dts/mt7623a-rfb-nand.dts @@ -45,13 +45,13 @@ pinctrl-names = "default"; pinctrl-0 = <&key_pins_a>; - factory { + button-factory { label = "factory"; linux,code = ; gpios = <&pio 256 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&pio 257 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts index 027c1b0c6a98..5008115d2494 100644 --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts @@ -91,13 +91,13 @@ pinctrl-names = "default"; pinctrl-0 = <&key_pins_a>; - factory { + button-factory { label = "factory"; linux,code = ; gpios = <&pio 256 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&pio 257 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts index 1b9b9a8145a7..bf67a8e9be59 100644 --- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts +++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts @@ -60,13 +60,13 @@ pinctrl-names = "default"; pinctrl-0 = <&key_pins_a>; - factory { + button-factory { label = "factory"; linux,code = ; gpios = <&pio 256 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&pio 257 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/mt7629-rfb.dts b/arch/arm/boot/dts/mt7629-rfb.dts index eb536cbebd9b..84e14bee7235 100644 --- a/arch/arm/boot/dts/mt7629-rfb.dts +++ b/arch/arm/boot/dts/mt7629-rfb.dts @@ -23,13 +23,13 @@ gpio-keys { compatible = "gpio-keys"; - reset { + button-reset { label = "factory"; linux,code = ; gpios = <&pio 60 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&pio 58 GPIO_ACTIVE_LOW>; -- cgit v1.2.3 From 3ea73bf02225ad433e7cfbf8427b08aa8c593775 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:41:38 +0200 Subject: ARM: dts: keystone: Adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Nishanth Menon Link: https://lore.kernel.org/r/20220526204139.831895-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 26 +++++++++++++------------- arch/arm/boot/dts/keystone-k2e.dtsi | 6 +++--- arch/arm/boot/dts/keystone-k2g-netcp.dtsi | 2 +- arch/arm/boot/dts/keystone-k2g.dtsi | 18 +++++++++--------- arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 12 ++++++------ arch/arm/boot/dts/keystone-k2hk.dtsi | 4 ++-- arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 18 +++++++++--------- arch/arm/boot/dts/keystone-k2l.dtsi | 8 ++++---- arch/arm/boot/dts/keystone.dtsi | 18 +++++++++--------- 9 files changed, 56 insertions(+), 56 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi index 71064483d34f..42cf74db673c 100644 --- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi @@ -12,9 +12,9 @@ qmss: qmss@2a40000 { #size-cells = <1>; clocks = <&chipclk13>; ranges; - queue-range = <0 0x2000>; - linkram0 = <0x100000 0x4000>; - linkram1 = <0 0x10000>; + queue-range = <0 0x2000>; + linkram0 = <0x100000 0x4000>; + linkram1 = <0 0x10000>; qmgrs { #address-cells = <1>; @@ -176,40 +176,40 @@ netcp: netcp@24000000 { interfaces { gbe0: interface-0 { slave-port = <0>; - link-interface = <1>; - phy-handle = <ðphy0>; + link-interface = <1>; + phy-handle = <ðphy0>; }; gbe1: interface-1 { slave-port = <1>; - link-interface = <1>; - phy-handle = <ðphy1>; + link-interface = <1>; + phy-handle = <ðphy1>; }; }; secondary-slave-ports { port-2 { slave-port = <2>; - link-interface = <2>; + link-interface = <2>; }; port-3 { slave-port = <3>; - link-interface = <2>; + link-interface = <2>; }; port-4 { slave-port = <4>; - link-interface = <2>; + link-interface = <2>; }; port-5 { slave-port = <5>; - link-interface = <2>; + link-interface = <2>; }; port-6 { slave-port = <6>; - link-interface = <2>; + link-interface = <2>; }; port-7 { slave-port = <7>; - link-interface = <2>; + link-interface = <2>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi index b8f152e7af7f..65c32946c522 100644 --- a/arch/arm/boot/dts/keystone-k2e.dtsi +++ b/arch/arm/boot/dts/keystone-k2e.dtsi @@ -141,7 +141,7 @@ clock-names = "pcie"; #address-cells = <3>; #size-cells = <2>; - reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>; + reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>; ranges = <0x82000000 0 0x60000000 0x60000000 0 0x10000000>; @@ -185,14 +185,14 @@ }; mdio: mdio@24200f00 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x24200f00 0x100>; status = "disabled"; clocks = <&clkcpgmac>; clock-names = "fck"; - bus_freq = <2500000>; + bus_freq = <2500000>; }; /include/ "keystone-k2e-netcp.dtsi" }; diff --git a/arch/arm/boot/dts/keystone-k2g-netcp.dtsi b/arch/arm/boot/dts/keystone-k2g-netcp.dtsi index d0e6a9a43402..f6306933ff42 100644 --- a/arch/arm/boot/dts/keystone-k2g-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2g-netcp.dtsi @@ -125,7 +125,7 @@ netcp: netcp@4000000 { interfaces { gbe0: interface-0 { slave-port = <0>; - link-interface = <5>; + link-interface = <5>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi index 37198294f4b2..380dd9d637ee 100644 --- a/arch/arm/boot/dts/keystone-k2g.dtsi +++ b/arch/arm/boot/dts/keystone-k2g.dtsi @@ -262,7 +262,7 @@ */ ti,system-reboot-controller; mbox-names = "rx", "tx"; - mboxes= <&msgmgr 5 2>, + mboxes = <&msgmgr 5 2>, <&msgmgr 0 0>; reg-names = "debug_messages"; reg = <0x02921c00 0x400>; @@ -326,13 +326,13 @@ dss: dss@02540000 { compatible = "ti,k2g-dss"; - reg = <0x02540000 0x400>, + reg = <0x02540000 0x400>, <0x02550000 0x1000>, <0x02557000 0x1000>, <0x0255a800 0x100>, <0x0255ac00 0x100>; reg-names = "cfg", "common", "vid1", "ovr1", "vp1"; - clocks = <&k2g_clks 0x2 0>, + clocks = <&k2g_clks 0x2 0>, <&k2g_clks 0x2 1>; clock-names = "fck", "vp1"; interrupts = ; @@ -348,7 +348,7 @@ edma0: edma@2700000 { compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; - reg = <0x02700000 0x8000>; + reg = <0x02700000 0x8000>; reg-names = "edma3_cc"; interrupts = , , @@ -367,19 +367,19 @@ edma0_tptc0: tptc@2760000 { compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; - reg = <0x02760000 0x400>; + reg = <0x02760000 0x400>; power-domains = <&k2g_pds 0x3f>; }; edma0_tptc1: tptc@2768000 { compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; - reg = <0x02768000 0x400>; + reg = <0x02768000 0x400>; power-domains = <&k2g_pds 0x3f>; }; edma1: edma@2728000 { compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; - reg = <0x02728000 0x8000>; + reg = <0x02728000 0x8000>; reg-names = "edma3_cc"; interrupts = , , @@ -402,13 +402,13 @@ edma1_tptc0: tptc@27b0000 { compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; - reg = <0x027b0000 0x400>; + reg = <0x027b0000 0x400>; power-domains = <&k2g_pds 0x4f>; }; edma1_tptc1: tptc@27b8000 { compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; - reg = <0x027b8000 0x400>; + reg = <0x027b8000 0x400>; power-domains = <&k2g_pds 0x4f>; }; diff --git a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi index 022d93c366c7..8a421c65f920 100644 --- a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi @@ -12,9 +12,9 @@ qmss: qmss@2a40000 { #size-cells = <1>; clocks = <&chipclk13>; ranges; - queue-range = <0 0x4000>; - linkram0 = <0x100000 0x8000>; - linkram1 = <0x0 0x10000>; + queue-range = <0 0x4000>; + linkram0 = <0x100000 0x8000>; + linkram1 = <0x0 0x10000>; qmgrs { #address-cells = <1>; @@ -150,7 +150,7 @@ netcp: netcp@2000000 { #size-cells = <1>; /* NetCP address range */ - ranges = <0 0x2000000 0x100000>; + ranges = <0 0x2000000 0x100000>; clocks = <&clkpa>, <&clkcpgmac>; clock-names = "pa_clk", "ethss_clk"; @@ -207,11 +207,11 @@ netcp: netcp@2000000 { secondary-slave-ports { port-2 { slave-port = <2>; - link-interface = <2>; + link-interface = <2>; }; port-3 { slave-port = <3>; - link-interface = <2>; + link-interface = <2>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi index 8a9447703310..da6d3934c2e8 100644 --- a/arch/arm/boot/dts/keystone-k2hk.dtsi +++ b/arch/arm/boot/dts/keystone-k2hk.dtsi @@ -282,14 +282,14 @@ }; mdio: mdio@2090300 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x02090300 0x100>; status = "disabled"; clocks = <&clkcpgmac>; clock-names = "fck"; - bus_freq = <2500000>; + bus_freq = <2500000>; }; /include/ "keystone-k2hk-netcp.dtsi" }; diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi index e96ca664abc2..5ec6680a533d 100644 --- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi @@ -12,9 +12,9 @@ qmss: qmss@2a40000 { #size-cells = <1>; clocks = <&chipclk13>; ranges; - queue-range = <0 0x2000>; - linkram0 = <0x100000 0x4000>; - linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ + queue-range = <0 0x2000>; + linkram0 = <0x100000 0x4000>; + linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ qmgrs { #address-cells = <1>; @@ -174,24 +174,24 @@ netcp: netcp@26000000 { interfaces { gbe0: interface-0 { slave-port = <0>; - link-interface = <1>; - phy-handle = <ðphy0>; + link-interface = <1>; + phy-handle = <ðphy0>; }; gbe1: interface-1 { slave-port = <1>; - link-interface = <1>; - phy-handle = <ðphy1>; + link-interface = <1>; + phy-handle = <ðphy1>; }; }; secondary-slave-ports { port-2 { slave-port = <2>; - link-interface = <2>; + link-interface = <2>; }; port-3 { slave-port = <3>; - link-interface = <2>; + link-interface = <2>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi index dff5fea72b2f..421a02bbc9d3 100644 --- a/arch/arm/boot/dts/keystone-k2l.dtsi +++ b/arch/arm/boot/dts/keystone-k2l.dtsi @@ -47,7 +47,7 @@ reg-shift = <2>; reg-io-width = <4>; reg = <0x02348400 0x100>; - clocks = <&clkuart2>; + clocks = <&clkuart2>; interrupts = ; }; @@ -57,7 +57,7 @@ reg-shift = <2>; reg-io-width = <4>; reg = <0x02348800 0x100>; - clocks = <&clkuart3>; + clocks = <&clkuart3>; interrupts = ; }; @@ -388,14 +388,14 @@ }; mdio: mdio@26200f00 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x26200f00 0x100>; status = "disabled"; clocks = <&clkcpgmac>; clock-names = "fck"; - bus_freq = <2500000>; + bus_freq = <2500000>; }; /include/ "keystone-k2l-netcp.dtsi" }; diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index fc9fdc857ae8..50789f9e2215 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -14,7 +14,7 @@ interrupt-parent = <&gic>; aliases { - serial0 = &uart0; + serial0 = &uart0; spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; @@ -61,11 +61,11 @@ }; psci { - compatible = "arm,psci"; - method = "smc"; - cpu_suspend = <0x84000001>; - cpu_off = <0x84000002>; - cpu_on = <0x84000003>; + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0x84000001>; + cpu_off = <0x84000002>; + cpu_on = <0x84000003>; }; soc0: soc@0 { @@ -119,7 +119,7 @@ reg-shift = <2>; reg-io-width = <4>; reg = <0x02530c00 0x100>; - clocks = <&clkuart0>; + clocks = <&clkuart0>; interrupts = ; }; @@ -129,7 +129,7 @@ reg-shift = <2>; reg-io-width = <4>; reg = <0x02531000 0x100>; - clocks = <&clkuart1>; + clocks = <&clkuart1>; interrupts = ; }; @@ -301,7 +301,7 @@ clock-names = "pcie"; #address-cells = <3>; #size-cells = <2>; - reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; + reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; ranges = <0x82000000 0 0x50000000 0x50000000 0 0x10000000>; -- cgit v1.2.3 From 4c2f2775abce79bfdf34c6d6f9329493d2c96981 Mon Sep 17 00:00:00 2001 From: Ulrich Ölmann Date: Tue, 17 May 2022 09:18:14 +0200 Subject: ARM: dts: imx6: skov: add pwm-regulator to control the panel's VCOM Skov's i.MX6 based boards come in different flavors which have different panels attached. For optimal contrast experience each panel type needs an individual common voltage (VCOM) to drive its TFT backplane. The latter is generated by an LCD bias supply IC controlled by a pwm as input signal. Introduce a pwm- regulator to describe this hardware property and parameterize it appropriately for the different boards. Signed-off-by: Ulrich Ölmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts | 6 ++++++ arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi | 10 ++++++++++ 2 files changed, 16 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts b/arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts index 7f1f19b74bfa..a3f247c722b4 100644 --- a/arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts +++ b/arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts @@ -125,3 +125,9 @@ >; }; }; + +®_tft_vcom { + regulator-min-microvolt = <3160000>; + regulator-max-microvolt = <3160000>; + voltage-table = <3160000 73>; +}; diff --git a/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi index 77a91a97e6cf..3def1b621c8e 100644 --- a/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi +++ b/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi @@ -149,6 +149,16 @@ gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; }; + reg_tft_vcom: regulator-tft-vcom { + compatible = "pwm-regulator"; + pwms = <&pwm3 0 20000 0>; + regulator-name = "tft_vcom"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + voltage-table = <3600000 26>; + }; + reg_vcc_mmc: regulator-vcc-mmc { compatible = "regulator-fixed"; pinctrl-names = "default"; -- cgit v1.2.3 From 82cc47fd88d5221e9daa7af0b20474ea99369f71 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 4 Jun 2022 17:57:05 +0200 Subject: ARM: dts: imx6sl-tolino-shine2hd: fix led node name. Node name is supposed to be led or led-x Signed-off-by: Andreas Kemnade Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts index a17b8bbbdb95..e94fad6b9b15 100644 --- a/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts +++ b/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts @@ -60,7 +60,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led>; - on { + led-0 { label = "tolinoshine2hd:white:on"; gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; linux,default-trigger = "timer"; -- cgit v1.2.3 From ce23644c5aa2742acaa385eee119cd8c924857f6 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 4 Jun 2022 17:57:48 +0200 Subject: ARM: dts: imx6: fix node names for ebook reader keys Node names are supposed to start with key- Signed-off-by: Andreas Kemnade Signed-off-by: Shawn Guo --- arch/arm/boot/dts/e60k02.dtsi | 4 ++-- arch/arm/boot/dts/e70k02.dtsi | 8 ++++---- arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/e60k02.dtsi b/arch/arm/boot/dts/e60k02.dtsi index 1a49f15f2df2..935e2359f8df 100644 --- a/arch/arm/boot/dts/e60k02.dtsi +++ b/arch/arm/boot/dts/e60k02.dtsi @@ -22,14 +22,14 @@ gpio_keys: gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - cover { + key-cover { label = "Cover"; gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/e70k02.dtsi b/arch/arm/boot/dts/e70k02.dtsi index 156de653f2cd..27ef9a62b23c 100644 --- a/arch/arm/boot/dts/e70k02.dtsi +++ b/arch/arm/boot/dts/e70k02.dtsi @@ -26,14 +26,14 @@ gpio_keys: gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - cover { + key-cover { label = "Cover"; gpios = <&gpio4 23 GPIO_ACTIVE_LOW>; linux,code = ; @@ -41,13 +41,13 @@ wakeup-source; }; - pageup { + key-pageup { label = "PageUp"; gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; linux,code = ; }; - pagedown { + key-pagedown { label = "PageDown"; gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts index e94fad6b9b15..663ee9df79e6 100644 --- a/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts +++ b/arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts @@ -27,7 +27,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; - cover { + key-cover { label = "Cover"; gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; linux,code = ; @@ -35,19 +35,19 @@ wakeup-source; }; - fl { + key-fl { label = "Frontlight"; gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; linux,code = ; }; - home { + key-home { label = "Home"; gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; linux,code = ; }; - power { + key-power { label = "Power"; gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From 5655699cf5cff9f4c4ee703792156bdd05d1addf Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:51 +0200 Subject: ARM: dts: imx6ul: add missing properties for sram All 3 properties are required by sram.yaml. Fixes the dtbs_check warning: sram@900000: '#address-cells' is a required property sram@900000: '#size-cells' is a required property sram@900000: 'ranges' is a required property Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 799d8d065731..97650709aaa3 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -149,6 +149,9 @@ ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; + ranges = <0 0x00900000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; }; intc: interrupt-controller@a01000 { -- cgit v1.2.3 From edb67843983bbdf61b4c8c3c50618003d38bb4ae Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:52 +0200 Subject: ARM: dts: imx6ul: change operating-points to uint32-matrix operating-points is a uint32-matrix as per opp-v1.yaml. Change it accordingly. While at it, change fsl,soc-operating-points as well, although there is no bindings file (yet). But they should have the same format. Fixes the dt_binding_check warning: cpu@0: operating-points:0: [696000, 1275000, 528000, 1175000, 396000, 1025000, 198000, 950000] is too long cpu@0: operating-points:0: Additional items are not allowed (528000, 1175000, 396000, 1025000, 198000, 950000 were unexpected) Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 97650709aaa3..d429243b1925 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -64,20 +64,18 @@ clock-frequency = <696000000>; clock-latency = <61036>; /* two CLK32 periods */ #cooling-cells = <2>; - operating-points = < + operating-points = /* kHz uV */ - 696000 1275000 - 528000 1175000 - 396000 1025000 - 198000 950000 - >; - fsl,soc-operating-points = < + <696000 1275000>, + <528000 1175000>, + <396000 1025000>, + <198000 950000>; + fsl,soc-operating-points = /* KHz uV */ - 696000 1275000 - 528000 1175000 - 396000 1175000 - 198000 1175000 - >; + <696000 1275000>, + <528000 1175000>, + <396000 1175000>, + <198000 1175000>; clocks = <&clks IMX6UL_CLK_ARM>, <&clks IMX6UL_CLK_PLL2_BUS>, <&clks IMX6UL_CLK_PLL2_PFD2>, -- cgit v1.2.3 From 7d15e0c9a515494af2e3199741cdac7002928a0e Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:53 +0200 Subject: ARM: dts: imx6ul: fix keypad compatible According to binding, the compatible shall only contain imx6ul and imx21 compatibles. Fixes the dt_binding_check warning: keypad@20b8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6ul-kpp', 'fsl,imx6q-kpp', 'fsl,imx21-kpp'] is too long Additional items are not allowed ('fsl,imx6q-kpp', 'fsl,imx21-kpp' were unexpected) Additional items are not allowed ('fsl,imx21-kpp' was unexpected) 'fsl,imx21-kpp' was expected Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index d429243b1925..b951bdb793d2 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -544,7 +544,7 @@ }; kpp: keypad@20b8000 { - compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp"; + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; reg = <0x020b8000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_KPP>; -- cgit v1.2.3 From e0aca931a2c7c29c88ebf37f9c3cd045e083483d Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:55 +0200 Subject: ARM: dts: imx6ul: fix csi node compatible "fsl,imx6ul-csi" was never listed as compatible to "fsl,imx7-csi", neither in yaml bindings, nor previous txt binding. Remove the imx7 part. Fixes the dt schema check warning: csi@21c4000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6ul-csi', 'fsl,imx7-csi'] is too long Additional items are not allowed ('fsl,imx7-csi' was unexpected) 'fsl,imx8mm-csi' was expected Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index b951bdb793d2..c67e28232d97 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -998,7 +998,7 @@ }; csi: csi@21c4000 { - compatible = "fsl,imx6ul-csi", "fsl,imx7-csi"; + compatible = "fsl,imx6ul-csi"; reg = <0x021c4000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_CSI>; -- cgit v1.2.3 From 1a884d17ca324531634cce82e9f64c0302bdf7de Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:56 +0200 Subject: ARM: dts: imx6ul: fix lcdif node compatible In yaml binding "fsl,imx6ul-lcdif" is listed as compatible to imx6sx-lcdif, but not imx28-lcdif. Change the list accordingly. Fixes the dt_binding_check warning: lcdif@21c8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6ul-lcdif', 'fsl,imx28-lcdif'] is too long Additional items are not allowed ('fsl,imx28-lcdif' was unexpected) 'fsl,imx6ul-lcdif' is not one of ['fsl,imx23-lcdif', 'fsl,imx28-lcdif', 'fsl,imx6sx-lcdif'] 'fsl,imx6sx-lcdif' was expected Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index c67e28232d97..1dda3cddcbf2 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -1007,7 +1007,7 @@ }; lcdif: lcdif@21c8000 { - compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; + compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif"; reg = <0x021c8000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_LCDIF_PIX>, -- cgit v1.2.3 From 0c6cf86e1ab433b2d421880fdd9c6e954f404948 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 13 Jun 2022 14:33:57 +0200 Subject: ARM: dts: imx6ul: fix qspi node compatible imx6ul is not compatible to imx6sx, both have different erratas. Fixes the dt_binding_check warning: spi@21e0000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6ul-qspi', 'fsl,imx6sx-qspi'] is too long Additional items are not allowed ('fsl,imx6sx-qspi' was unexpected) 'fsl,imx6ul-qspi' is not one of ['fsl,ls1043a-qspi'] 'fsl,imx6ul-qspi' is not one of ['fsl,imx8mq-qspi'] 'fsl,ls1021a-qspi' was expected 'fsl,imx7d-qspi' was expected Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 1dda3cddcbf2..52ac0d8292d8 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -1028,7 +1028,7 @@ qspi: spi@21e0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi"; + compatible = "fsl,imx6ul-qspi"; reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>; reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = ; -- cgit v1.2.3 From 8e82a523151164e495f04f50c1af70f2d9adacf0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 14 Jun 2022 13:22:33 -0300 Subject: ARM: dts: imx: Pass a label to the soc node Pass a label to the 'soc' node to make it easier to reference it from other devicetree files. U-Boot, for example usually needs to access the AIPS node to pass U-Boot-specific properties. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx25.dtsi | 2 +- arch/arm/boot/dts/imx27.dtsi | 2 +- arch/arm/boot/dts/imx31.dtsi | 2 +- arch/arm/boot/dts/imx50.dtsi | 2 +- arch/arm/boot/dts/imx51.dtsi | 2 +- arch/arm/boot/dts/imx53.dtsi | 2 +- arch/arm/boot/dts/imx6dl.dtsi | 2 +- arch/arm/boot/dts/imx6q.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/imx6sx.dtsi | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 2 +- arch/arm/boot/dts/imx6ull.dtsi | 2 +- arch/arm/boot/dts/imx7d.dtsi | 2 +- arch/arm/boot/dts/imx7s.dtsi | 2 +- 14 files changed, 14 insertions(+), 14 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index fa8044c21cb8..bc4de0c05511 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -68,7 +68,7 @@ }; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index b660c7d05584..6270685a1397 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -74,7 +74,7 @@ }; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi index 2adb923c0b27..b5ece07e78d5 100644 --- a/arch/arm/boot/dts/imx31.dtsi +++ b/arch/arm/boot/dts/imx31.dtsi @@ -48,7 +48,7 @@ reg = <0x68000000 0x100000>; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi index be0de0fd31f9..440909068e11 100644 --- a/arch/arm/boot/dts/imx50.dtsi +++ b/arch/arm/boot/dts/imx50.dtsi @@ -94,7 +94,7 @@ status = "okay"; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 1e20a6639e42..a6d8a606bc48 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -114,7 +114,7 @@ ports = <&ipu_di0>, <&ipu_di1>; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 67487f3caee1..b183bbe4efd3 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -132,7 +132,7 @@ status = "okay"; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index fdd81fdc3f35..8e0ed209ede0 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -80,7 +80,7 @@ }; }; - soc { + soc: soc { ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 9caba4529c71..92084420e321 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -159,7 +159,7 @@ }; }; - soc { + soc: soc { ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x40000>; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index d27beb47f9a3..0f4f2ffd540c 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -143,7 +143,7 @@ #phy-cells = <0>; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index fc6334336b3d..4d075e2bf749 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -154,7 +154,7 @@ #phy-cells = <0>; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 52ac0d8292d8..c95efd1d8c2d 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -137,7 +137,7 @@ interrupts = ; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index 9bf67490ac49..2bccd45e9fc2 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -50,7 +50,7 @@ }; / { - soc { + soc: soc { aips3: bus@2200000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index f8cba47536a0..7ceb7c09f7ad 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -78,7 +78,7 @@ #phy-cells = <0>; }; - soc { + soc: soc { etm@3007d000 { compatible = "arm,coresight-etm3x", "arm,primecell"; reg = <0x3007d000 0x1000>; diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 008e3da460f1..d0fcc4dd0711 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -175,7 +175,7 @@ ; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; -- cgit v1.2.3 From e56d3274770e07f9542a1a129fdf0979ec87f4b1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 14 Jun 2022 13:22:34 -0300 Subject: ARM: dts: imx: Pass a label to the AIPS nodes Pass a label to the AIPS nodes to make it easier to reference it from other devicetree files. Some i.MX dtsi files already describe labels for the AIPS nodes. Make it available for all SoCs for consistency. U-Boot, for example usually needs to access the AIPS node to pass U-Boot-specific properties. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27.dtsi | 4 ++-- arch/arm/boot/dts/imx31.dtsi | 2 +- arch/arm/boot/dts/imx50.dtsi | 4 ++-- arch/arm/boot/dts/imx51.dtsi | 4 ++-- arch/arm/boot/dts/imx53.dtsi | 4 ++-- arch/arm/boot/dts/imx6q.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 4 ++-- 7 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 6270685a1397..e140307be2e7 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -81,7 +81,7 @@ interrupt-parent = <&aitc>; ranges; - aipi@10000000 { /* AIPI1 */ + aipi1: aipi@10000000 { /* AIPI1 */ compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -453,7 +453,7 @@ }; }; - aipi@10020000 { /* AIPI2 */ + aipi2: aipi@10020000 { /* AIPI2 */ compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi index b5ece07e78d5..5c4938b0d5a1 100644 --- a/arch/arm/boot/dts/imx31.dtsi +++ b/arch/arm/boot/dts/imx31.dtsi @@ -63,7 +63,7 @@ ranges = <0 0x1fffc000 0x4000>; }; - bus@43f00000 { /* AIPS1 */ + aips1: bus@43f00000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi index 440909068e11..c0c7575fbecf 100644 --- a/arch/arm/boot/dts/imx50.dtsi +++ b/arch/arm/boot/dts/imx50.dtsi @@ -101,7 +101,7 @@ interrupt-parent = <&tzic>; ranges; - bus@50000000 { /* AIPS1 */ + aips1: bus@50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -385,7 +385,7 @@ }; }; - bus@60000000 { /* AIPS2 */ + aips2: bus@60000000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index a6d8a606bc48..592d9c23a447 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -171,7 +171,7 @@ }; }; - bus@70000000 { /* AIPS1 */ + aips1: bus@70000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -460,7 +460,7 @@ }; }; - bus@80000000 { /* AIPS2 */ + aips2: bus@80000000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index b183bbe4efd3..b7a6469d3472 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -222,7 +222,7 @@ clock-names = "core_clk", "mem_iface_clk"; }; - bus@50000000 { /* AIPS1 */ + aips1: bus@50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -655,7 +655,7 @@ }; }; - bus@60000000 { /* AIPS2 */ + aips2: bus@60000000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 92084420e321..3b77eae40e39 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -166,7 +166,7 @@ clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - bus@2000000 { /* AIPS1 */ + aips1: bus@2000000 { /* AIPS1 */ spba-bus@2000000 { ecspi5: spi@2018000 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 0f4f2ffd540c..845257e0c8b7 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -290,7 +290,7 @@ status = "disabled"; }; - bus@2000000 { /* AIPS1 */ + aips1: bus@2000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -941,7 +941,7 @@ }; }; - bus@2100000 { /* AIPS2 */ + aips2: bus@2100000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; -- cgit v1.2.3 From 9c0919acb3fa7c1a24e384ff912f2d88f060c373 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:50 +0200 Subject: Revert "ARM: dts: imx6qdl-apalis: Avoid underscore in node name" The STMPE MFD device binding requires the child node to have a fixed name, i.e. with '_', not '-'. Otherwise the stmpe_adc, stmpe_touchscreen drivers will not be probed. Fixes: 56086b5e804f ("ARM: dts: imx6qdl-apalis: Avoid underscore in node name") Reviewed-by: Ahmad Fatoum Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index bd763bae596b..da919d0544a8 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -315,7 +315,7 @@ /* ADC conversion time: 80 clocks */ st,sample-time = <4>; - stmpe_touchscreen: stmpe-touchscreen { + stmpe_touchscreen: stmpe_touchscreen { compatible = "st,stmpe-ts"; /* 8 sample average control */ st,ave-ctrl = <3>; @@ -332,7 +332,7 @@ st,touch-det-delay = <5>; }; - stmpe_adc: stmpe-adc { + stmpe_adc: stmpe_adc { compatible = "st,stmpe-adc"; /* forbid to use ADC channels 3-0 (touch) */ st,norequest-mask = <0x0F>; -- cgit v1.2.3 From 966b48d983daa15ae4af56b24ae5ec6ec5eae0d7 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:51 +0200 Subject: ARM: dts: imx6q-apalis: Add gpio-line-names Add GPIO line names on module level. Those are all GPIOs which a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board level device tree. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 193 ++++++++++++++++++++++++++++++++++ 1 file changed, 193 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index da919d0544a8..e56451651a6d 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -141,6 +141,199 @@ status = "disabled"; }; +&gpio1 { + gpio-line-names = "MXM3_84", + "MXM3_4", + "MXM3_15/GPIO7", + "MXM3_96", + "MXM3_37", + "", + "MXM3_17/GPIO8", + "MXM3_14", + "MXM3_12", + "MXM3_2", + "MXM3_184", + "MXM3_180", + "MXM3_178", + "MXM3_176", + "MXM3_188", + "MXM3_186", + "MXM3_160", + "MXM3_162", + "MXM3_150", + "MXM3_144", + "MXM3_154", + "MXM3_146", + "", + "", + "MXM3_72"; +}; + +&gpio2 { + gpio-line-names = "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "MXM3_95", + "MXM3_6", + "MXM3_8", + "MXM3_123", + "MXM3_126", + "MXM3_128", + "MXM3_130", + "MXM3_132", + "MXM3_253", + "MXM3_251", + "MXM3_283", + "MXM3_281", + "MXM3_279", + "MXM3_277", + "MXM3_243", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_198", + "MXM3_275", + "MXM3_273", + "MXM3_207", + "MXM3_122"; +}; + +&gpio3 { + gpio-line-names = "MXM3_271", + "MXM3_269", + "MXM3_301", + "MXM3_299", + "MXM3_297", + "MXM3_295", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_286", + "MXM3_239", + "MXM3_35", + "MXM3_205", + "MXM3_203", + "MXM3_201", + "MXM3_116", + "MXM3_114", + "MXM3_262", + "MXM3_274", + "MXM3_124", + "MXM3_110", + "MXM3_120", + "MXM3_263", + "MXM3_265", + "", + "MXM3_135", + "MXM3_261", + "MXM3_259"; +}; + +&gpio4 { + gpio-line-names = "", + "", + "", + "", + "", + "MXM3_194", + "MXM3_136", + "MXM3_134", + "MXM3_140", + "MXM3_138", + "", + "MXM3_220", + "", + "", + "MXM3_18", + "MXM3_16", + "", + "", + "MXM3_214", + "MXM3_216", + "MXM3_164"; +}; + +&gpio5 { + gpio-line-names = "MXM3_159", + "", + "", + "", + "MXM3_257", + "", + "", + "", + "", + "", + "MXM3_200", + "MXM3_196", + "MXM3_204", + "MXM3_202", + "", + "", + "", + "", + "MXM3_191", + "MXM3_197", + "MXM3_77", + "MXM3_195", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_209", + "MXM3_211", + "MXM3_118", + "MXM3_112", + "MXM3_187", + "MXM3_185"; +}; + +&gpio6 { + gpio-line-names = "MXM3_183", + "MXM3_181", + "MXM3_179", + "MXM3_177", + "MXM3_175", + "MXM3_173", + "MXM3_255", + "MXM3_83", + "MXM3_91", + "MXM3_13/GPIO6", + "MXM3_11/GPIO5", + "MXM3_79", + "", + "", + "MXM3_190", + "MXM3_193", + "MXM3_89"; +}; + +&gpio7 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_99", + "MXM3_85", + "MXM3_217", + "MXM3_215"; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; -- cgit v1.2.3 From 4eb56e26f92e9071a267ff71a373f33235fe9b48 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:52 +0200 Subject: ARM: dts: imx6q-apalis: Command pmic to standby for poweroff The Apalis iMX6 HW doesn't allow to use the PWR_ON_REQ signal for poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC into a low power mode in poweroff. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index e56451651a6d..668793356b46 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -125,6 +125,10 @@ status = "disabled"; }; +&clks { + fsl,pmic-stby-poweroff; +}; + /* Apalis SPI1 */ &ecspi1 { cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; @@ -387,6 +391,7 @@ pmic: pfuze100@8 { compatible = "fsl,pfuze100"; + fsl,pmic-stby-poweroff; reg = <0x08>; regulators { -- cgit v1.2.3 From 36d46dff9d5a7b206db8f0560e5802488a438ac5 Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:49:53 +0200 Subject: ARM: dts: imx6q-apalis: Move parallel rgb interface to SoM dtsi Move all Parallel RGB-related nodes to the module level and disable it by default. This allows to enable it in an overlay per the current system configuration. Update SPDX-License spelling to latest convention. Update Copyright year. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 57 +-------------------------- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 55 +------------------------- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 55 +------------------------- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 52 ++++++++++++++++++++++-- 4 files changed, 55 insertions(+), 164 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index a0683b4aeca1..1e6b5482a777 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -44,48 +44,6 @@ }; }; - lcd_display: disp0 { - compatible = "fsl,imx-parallel-display"; - #address-cells = <1>; - #size-cells = <0>; - interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu1_lcdif>; - status = "okay"; - - port@0 { - reg = <0>; - - lcd_display_in: endpoint { - remote-endpoint = <&ipu1_di1_disp1>; - }; - }; - - port@1 { - reg = <1>; - - lcd_display_out: endpoint { - remote-endpoint = <&lcd_panel_in>; - }; - }; - }; - - panel: panel { - /* - * edt,et057090dhu: EDT 5.7" LCD TFT - * edt,et070080dh6: EDT 7.0" LCD TFT - */ - compatible = "edt,et057090dhu"; - backlight = <&backlight>; - power-supply = <®_3v3_sw>; - - port { - lcd_panel_in: endpoint { - remote-endpoint = <&lcd_display_out>; - }; - }; - }; - reg_pcie_switch: regulator-pcie-switch { compatible = "regulator-fixed"; regulator-name = "pcie_switch"; @@ -106,13 +64,6 @@ }; }; -&backlight { - brightness-levels = <0 127 191 223 239 247 251 255>; - default-brightness-level = <1>; - power-supply = <®_3v3_sw>; - status = "okay"; -}; - &can1 { xceiver-supply = <®_3v3_sw>; status = "okay"; @@ -164,10 +115,6 @@ status = "okay"; }; -&ipu1_di1_disp1 { - remote-endpoint = <&lcd_display_in>; -}; - &ldb { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 86e84781cf5d..527585d26e51 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -45,47 +45,6 @@ }; }; - lcd_display: disp0 { - compatible = "fsl,imx-parallel-display"; - #address-cells = <1>; - #size-cells = <0>; - interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu1_lcdif>; - status = "okay"; - - port@0 { - reg = <0>; - - lcd_display_in: endpoint { - remote-endpoint = <&ipu1_di1_disp1>; - }; - }; - - port@1 { - reg = <1>; - - lcd_display_out: endpoint { - remote-endpoint = <&lcd_panel_in>; - }; - }; - }; - - panel: panel { - /* - * edt,et057090dhu: EDT 5.7" LCD TFT - * edt,et070080dh6: EDT 7.0" LCD TFT - */ - compatible = "edt,et057090dhu"; - backlight = <&backlight>; - - port { - lcd_panel_in: endpoint { - remote-endpoint = <&lcd_display_out>; - }; - }; - }; - leds { compatible = "gpio-leds"; @@ -114,12 +73,6 @@ }; }; -&backlight { - brightness-levels = <0 127 191 223 239 247 251 255>; - default-brightness-level = <1>; - status = "okay"; -}; - &can1 { status = "okay"; }; @@ -164,10 +117,6 @@ status = "okay"; }; -&ipu1_di1_disp1 { - remote-endpoint = <&lcd_display_in>; -}; - &ldb { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 62e72773e53b..9900ab04fb28 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -44,47 +44,6 @@ }; }; - lcd_display: disp0 { - compatible = "fsl,imx-parallel-display"; - #address-cells = <1>; - #size-cells = <0>; - interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu1_lcdif>; - status = "okay"; - - port@0 { - reg = <0>; - - lcd_display_in: endpoint { - remote-endpoint = <&ipu1_di1_disp1>; - }; - }; - - port@1 { - reg = <1>; - - lcd_display_out: endpoint { - remote-endpoint = <&lcd_panel_in>; - }; - }; - }; - - panel: panel { - /* - * edt,et057090dhu: EDT 5.7" LCD TFT - * edt,et070080dh6: EDT 7.0" LCD TFT - */ - compatible = "edt,et057090dhu"; - backlight = <&backlight>; - - port { - lcd_panel_in: endpoint { - remote-endpoint = <&lcd_display_out>; - }; - }; - }; - leds { compatible = "gpio-leds"; @@ -113,12 +72,6 @@ }; }; -&backlight { - brightness-levels = <0 127 191 223 239 247 251 255>; - default-brightness-level = <1>; - status = "okay"; -}; - &can1 { status = "okay"; }; @@ -168,10 +121,6 @@ status = "okay"; }; -&ipu1_di1_disp1 { - remote-endpoint = <&lcd_display_in>; -}; - &ldb { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 668793356b46..c0ae08780d86 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -21,11 +21,53 @@ compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - pwms = <&pwm4 0 5000000>; + brightness-levels = <0 127 191 223 239 247 251 255>; + default-brightness-level = <1>; enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + power-supply = <®_module_3v3>; + pwms = <&pwm4 0 5000000>; status = "disabled"; }; + lcd_display: disp0 { + compatible = "fsl,imx-parallel-display"; + #address-cells = <1>; + #size-cells = <0>; + interface-pix-fmt = "rgb24"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_lcdif>; + status = "disabled"; + + port@0 { + reg = <0>; + + lcd_display_in: endpoint { + remote-endpoint = <&ipu1_di1_disp1>; + }; + }; + + port@1 { + reg = <1>; + + lcd_display_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; + }; + + panel_dpi: panel-dpi { + compatible = "edt,et057090dhu"; + backlight = <&backlight>; + + status = "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcd_display_out>; + }; + }; + }; + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; regulator-name = "+V3.3"; @@ -553,6 +595,10 @@ status = "disabled"; }; +&ipu1_di1_disp1 { + remote-endpoint = <&lcd_display_in>; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; -- cgit v1.2.3 From 1c5fa82860d84327ae0355016852928f300745a9 Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:49:54 +0200 Subject: ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi GPIO pinmux groups are declared on the module level. Move muxing them to the same level. It also reduces code duplication. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 12 ------------ arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 10 ---------- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 8 -------- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 8 ++++++++ 4 files changed, 8 insertions(+), 30 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index 1e6b5482a777..fe5d491e1399 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -206,15 +206,3 @@ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; status = "okay"; }; - -&iomuxc { - /* - * Mux the Apalis GPIOs - */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; -}; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 527585d26e51..8febfc0aea93 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -202,16 +202,6 @@ }; &iomuxc { - /* - * Mux the Apalis GPIOs - */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; - pinctrl_leds_ixora: ledsixoragrp { fsl,pins = < MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 9900ab04fb28..78cf1d9583c1 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -205,14 +205,6 @@ }; &iomuxc { - /* Mux the Apalis GPIOs */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 - >; - pinctrl_leds_ixora: ledsixoragrp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index c0ae08780d86..9413c14ce5f6 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -709,6 +709,14 @@ }; &iomuxc { + /* Mux the Apalis GPIOs */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 + &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 + &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 + &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 + >; + pinctrl_apalis_gpio1: gpio2io04grp { fsl,pins = < MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 -- cgit v1.2.3 From 2c119c4d9cdf208f94aaa8e1b4af7981d9a4b532 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:55 +0200 Subject: ARM: dts: imx6q-apalis: Move Atmel MXT touch ctrl to SoM dtsi Reduces code duplication. While at it drop the comments which do not apply on Apalis iMX6 but add the correct SoM pin names. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 13 ------------- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 13 ------------- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 13 ------------- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 11 +++++++++++ 4 files changed, 11 insertions(+), 39 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index fe5d491e1399..5985d1169be1 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -82,19 +82,6 @@ &i2c1 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - reg = <0x4a>; - interrupt-parent = <&gpio6>; - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ - status = "disabled"; - }; - pcie-switch@58 { compatible = "plx,pex8605"; reg = <0x58>; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 8febfc0aea93..21f88e19e87d 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -89,19 +89,6 @@ &i2c1 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - reg = <0x4a>; - interrupt-parent = <&gpio6>; - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ - status = "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible = "st,m41t0"; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 78cf1d9583c1..6743617ad1c1 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -88,19 +88,6 @@ &i2c1 { status = "okay"; - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible = "atmel,maxtouch"; - reg = <0x4a>; - interrupt-parent = <&gpio6>; - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ - status = "disabled"; - }; - eeprom@50 { compatible = "atmel,24c02"; reg = <0x50>; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 9413c14ce5f6..3aa66b6d0c88 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -416,6 +416,17 @@ scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; + + atmel_mxt_ts: touchscreen@4a { + compatible = "atmel,maxtouch"; + /* These GPIOs are muxed with the iomuxc node */ + interrupt-parent = <&gpio6>; + interrupts = <10 IRQ_TYPE_EDGE_FALLING>; /* MXM3_11 */ + reg = <0x4a>; + reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* MXM3_13 */ + status = "disabled"; + }; + }; /* -- cgit v1.2.3 From 1347e20118d58926672e969e608485e9876427db Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:56 +0200 Subject: ARM: dts: imx6q-apalis: move gpio-keys to SoM dtsi Move gpio-keys to module-level device tree given it is standard Apalis functionality. Sort properties alphabetical. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 14 -------------- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 14 -------------- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 14 ++++++++++++++ 3 files changed, 14 insertions(+), 28 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index 5985d1169be1..fdcb740a7a54 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -30,20 +30,6 @@ stdout-path = "serial0:115200n8"; }; - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_keys>; - - wakeup { - label = "Wake-Up"; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - reg_pcie_switch: regulator-pcie-switch { compatible = "regulator-fixed"; regulator-name = "pcie_switch"; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 6743617ad1c1..e6fc76776b2e 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -30,20 +30,6 @@ stdout-path = "serial0:115200n8"; }; - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_keys>; - - wakeup { - label = "Wake-Up"; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - leds { compatible = "gpio-leds"; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 3aa66b6d0c88..240783d0901c 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -29,6 +29,20 @@ status = "disabled"; }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + wakeup { + debounce-interval = <10>; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + label = "Wake-Up"; + linux,code = ; + wakeup-source; + }; + }; + lcd_display: disp0 { compatible = "fsl,imx-parallel-display"; #address-cells = <1>; -- cgit v1.2.3 From a9b9f1c6de0db9623dbfd0df44e07ad68ed24ffb Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:49:57 +0200 Subject: ARM: dts: imx6q-apalis: Add LVDS panel support Add LVDS panel and endpoint linkage support but keep the inherited disabled state. This allows to enable it in an overlay per the current system configuration. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 4 --- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 4 --- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 4 --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 36 +++++++++++++++++++++++++++ 4 files changed, 36 insertions(+), 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index fdcb740a7a54..51efa7c57879 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -88,10 +88,6 @@ status = "okay"; }; -&ldb { - status = "okay"; -}; - &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reset_moci>; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 21f88e19e87d..beb1981fc775 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -104,10 +104,6 @@ status = "okay"; }; -&ldb { - status = "okay"; -}; - &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reset_moci>; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index e6fc76776b2e..3d42f8ffeb34 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -94,10 +94,6 @@ status = "okay"; }; -&ldb { - status = "okay"; -}; - &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reset_moci>; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 240783d0901c..636b04139a5b 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -82,6 +82,18 @@ }; }; + panel_lvds: panel-lvds { + compatible = "panel-lvds"; + backlight = <&backlight>; + status = "disabled"; + + port { + lvds_panel_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; regulator-name = "+V3.3"; @@ -624,6 +636,30 @@ remote-endpoint = <&lcd_display_in>; }; +&ldb { + lvds-channel@0 { + port@4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&lvds_panel_in>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <18>; + + port@4 { + reg = <4>; + + lvds1_out: endpoint { + }; + }; + }; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; -- cgit v1.2.3 From 6429a399ae6f9396a214ca1fda8642798fcabb7a Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:49:58 +0200 Subject: ARM: dts: imx6q-apalis: Disable HDMI This allows to enable it in an overlay per the current system configuration. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 4 ---- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 4 ---- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 4 ---- 3 files changed, 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index 51efa7c57879..eeb20d7a637d 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -60,10 +60,6 @@ status = "okay"; }; -&hdmi { - status = "okay"; -}; - /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { status = "okay"; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index beb1981fc775..b254e96d194a 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -81,10 +81,6 @@ status = "okay"; }; -&hdmi { - status = "okay"; -}; - /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { status = "okay"; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index 3d42f8ffeb34..a9daf1bb970f 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -66,10 +66,6 @@ status = "okay"; }; -&hdmi { - status = "okay"; -}; - /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { status = "okay"; -- cgit v1.2.3 From 30b847665e41d330ad0cec2bf42819875e2124eb Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:49:59 +0200 Subject: ARM: dts: imx6q-apalis: Disable stmpe touchscreen Unify its label with other toradex SoM dtbs. This allows to enable it in an overlay per the current system configuration. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 636b04139a5b..b4742ad85f56 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -592,7 +592,7 @@ /* ADC conversion time: 80 clocks */ st,sample-time = <4>; - stmpe_touchscreen: stmpe_touchscreen { + stmpe_ts: stmpe_touchscreen { compatible = "st,stmpe-ts"; /* 8 sample average control */ st,ave-ctrl = <3>; @@ -607,6 +607,7 @@ st,settling = <3>; /* 5 ms touch detect interrupt delay */ st,touch-det-delay = <5>; + status = "disabled"; }; stmpe_adc: stmpe_adc { -- cgit v1.2.3 From b656eb41be70e205916a1d0a80ee412690336b9d Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:50:00 +0200 Subject: ARM: dts: imx6q-apalis: Add ov5640 mipi csi camera The Apalis iMX6 modules allow connecting a mipi-csi video input. Add support for our OV5640 camera module but have it disabled. This allows to enable it in an overlay per the current system configuration. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 67 ++++++++++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index b4742ad85f56..bbd838acb8d6 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -29,6 +29,12 @@ status = "disabled"; }; + clk_ov5640_osc: clk-ov5640-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -110,6 +116,26 @@ regulator-always-on; }; + reg_ov5640_1v8_d_o_vdd: regulator-ov5640-1v8-d-o-vdd { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "DOVDD/DVDD_1.8V"; + /* Note: The CSI module uses on-board 3.3V_SW supply */ + vin-supply = <®_module_3v3>; + }; + + reg_ov5640_2v8_a_vdd: regulator-ov5640-2v8-a-vdd { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <2800000>; + regulator-min-microvolt = <2800000>; + regulator-name = "AVDD/AFVDD_2.8V"; + /* Note: The CSI module uses on-board 3.3V_SW supply */ + vin-supply = <®_module_3v3>; + }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -452,7 +478,6 @@ reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* MXM3_13 */ status = "disabled"; }; - }; /* @@ -631,6 +656,30 @@ scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; + + ov5640_csi_cam: ov5640_mipi@3c { + compatible = "ovti,ov5640"; + AVDD-supply = <®_ov5640_2v8_a_vdd>; + DOVDD-supply = <®_ov5640_1v8_d_o_vdd>; + DVDD-supply = <®_ov5640_1v8_d_o_vdd>; + clock-names = "xclk"; + clocks = <&clks IMX6QDL_CLK_CKO2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam_mclk>; + /* These GPIOs are muxed with the iomuxc node */ + powerdown-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + reg = <0x3c>; + reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + status = "disabled"; + + port { + ov5640_to_mipi_csi2: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&mipi_csi_from_ov5640>; + }; + }; + }; }; &ipu1_di1_disp1 { @@ -661,6 +710,22 @@ }; }; +&mipi_csi { + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + port@0 { + reg = <0>; + + mipi_csi_from_ov5640: endpoint { + clock-lanes = <0>; + data-lanes = <1 2>; + remote-endpoint = <&ov5640_to_mipi_csi2>; + }; + }; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; -- cgit v1.2.3 From 9560fc59425cfe43381739da9eae52ffee28116f Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Wed, 15 Jun 2022 13:50:01 +0200 Subject: ARM: dts: imx6q-apalis: Add adv7280 video input The Apalis iMX6 modules allow connecting a parallel video input. Add support for our ADV7280 video input module but have it disabled. This allows to enable it in an overlay per the current system configuration. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index bbd838acb8d6..6d072aa87952 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -432,6 +432,21 @@ "MXM3_215"; }; +&gpr { + ipu1_csi0_mux { + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + port@1 { + reg = <1>; + ipu1_csi0_mux_from_parallel_sensor: endpoint { + remote-endpoint = <&adv7280_to_ipu1_csi0_mux>; + }; + }; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; @@ -657,6 +672,22 @@ sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; + adv_7280: adv7280@21 { + compatible = "adi,adv7280"; + adv,force-bt656-4; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_csi0>; + reg = <0x21>; + status = "disabled"; + + port { + adv7280_to_ipu1_csi0_mux: endpoint { + bus-width = <8>; + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + }; + }; + }; + ov5640_csi_cam: ov5640_mipi@3c { compatible = "ovti,ov5640"; AVDD-supply = <®_ov5640_2v8_a_vdd>; -- cgit v1.2.3 From 6a1155449899732e80cd2d8ef2e430e6562b41c5 Mon Sep 17 00:00:00 2001 From: Denys Drozdov Date: Wed, 15 Jun 2022 13:50:02 +0200 Subject: ARM: dts: imx6q-apalis: Clean-up sd card support Configure SOM DTSI to 8-bit, card detect in the SoM dtsi as this is the Apalis family default functionality. Limit the interface to 4-bit only on the Ixora V1.1 carrier boards. Signed-off-by: Denys Drozdov Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 3 --- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 1 - arch/arm/boot/dts/imx6qdl-apalis.dtsi | 3 ++- 3 files changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index eeb20d7a637d..19aaffd71f3d 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -158,9 +158,6 @@ /* MMC1 */ &usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; - cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index b254e96d194a..2d0324103804 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -175,7 +175,6 @@ &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; - cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; bus-width = <4>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 6d072aa87952..4ff46ffd2300 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -832,7 +832,8 @@ /* MMC1 */ &usdhc1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>; + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; vqmmc-supply = <®_module_3v3>; bus-width = <8>; disable-wp; -- cgit v1.2.3 From 1868abc13d3dffd31479867b1b11def92baa9f0d Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:50:03 +0200 Subject: ARM: dts: imx6q-apalis: Add support for Toradex Ixora V1.2 carrier boards The Ixora V1.2 carrier board adds SW relevant new features compared to the V1.1 version. - An I2C EEPROM is added. - The SD card slot got a switchable 3.3V supply. - Pull ups on the SD card signals are not assembled to faciliate 1.8V speed modes. - The CAN transceivers got a switchable 3.3V supply. Add a new device tree and, as the differences are so small rework the device tree for V1.1 to include the V1.2 device tree and adjust as needed. Drop adding the toradex,apalis_imx6q-ixora to the dtb compatible to adhere to the binding yaml document. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 178 ++--------------- arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts | 276 ++++++++++++++++++++++++++ 3 files changed, 289 insertions(+), 166 deletions(-) create mode 100644 arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d3f1e3075178..428d758fc411 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -550,6 +550,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-apalis-eval.dtb \ imx6q-apalis-ixora.dtb \ imx6q-apalis-ixora-v1.1.dtb \ + imx6q-apalis-ixora-v1.2.dtb \ imx6q-apf6dev.dtb \ imx6q-arm2.dtb \ imx6q-b450v3.dtb \ diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts index 2d0324103804..44637d606e61 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts @@ -5,187 +5,33 @@ * Copyright 2011 Linaro Ltd. */ -/dts-v1/; - -#include -#include -#include -#include "imx6q.dtsi" -#include "imx6qdl-apalis.dtsi" +#include "imx6q-apalis-ixora-v1.2.dts" / { model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1"; - compatible = "toradex,apalis_imx6q-ixora-v1.1", - "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q", + compatible = "toradex,apalis_imx6q-ixora-v1.1", "toradex,apalis_imx6q", "fsl,imx6q"; - aliases { - i2c0 = &i2c1; - i2c1 = &i2c3; - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_keys>; - - wakeup { - label = "Wake-Up"; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - - leds { - compatible = "gpio-leds"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - - led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; - }; - led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; - }; - - led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - - led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; - }; }; +/delete-node/ &eeprom; +/delete-node/ ®_3v3_vmmc; +/delete-node/ ®_can1_supply; +/delete-node/ ®_can2_supply; + &can1 { - status = "okay"; + /delete-property/ xceiver-supply; }; &can2 { - status = "okay"; -}; - -/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ -&i2c1 { - status = "okay"; - - /* M41T0M6 real time clock on carrier board */ - rtc_i2c: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; -}; - -/* - * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier - * board) - */ -&i2c3 { - status = "okay"; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reset_moci>; - /* active-high meaning opposite of regular PERST# active-low polarity */ - reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&pwm4 { - status = "okay"; -}; - -®_usb_otg_vbus { - status = "okay"; -}; - -®_usb_host_vbus { - status = "okay"; -}; - -&sata { - status = "okay"; -}; - -&sound_spdif { - status = "okay"; -}; - -&spdif { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart4 { - status = "okay"; -}; - -&uart5 { - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_usb_host_vbus>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - status = "okay"; + /delete-property/ xceiver-supply; }; /* MMC1 */ &usdhc1 { + /delete-property/ cap-power-off-card; + /delete-property/ pinctrl-1; + /delete-property/ vmmc-supply; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; - bus-width = <4>; - status = "okay"; -}; - -&iomuxc { - pinctrl_leds_ixora: ledsixoragrp { - fsl,pins = < - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 - MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts new file mode 100644 index 000000000000..f9f7d99bd4db --- /dev/null +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2014-2022 Toradex + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + */ + +/dts-v1/; + +#include +#include +#include +#include "imx6q.dtsi" +#include "imx6qdl-apalis.dtsi" + +/ { + model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2"; + compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q", + "fsl,imx6q"; + + aliases { + i2c0 = &i2c1; + i2c1 = &i2c3; + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + led4-green { + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + label = "LED_4_GREEN"; + }; + + led4-red { + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + label = "LED_4_RED"; + }; + + led5-green { + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + label = "LED_5_GREEN"; + }; + + led5-red { + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + label = "LED_5_RED"; + }; + }; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + startup-delay-us = <100>; + }; + + reg_can1_supply: regulator-can1-supply { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + regulator-name = "can1_supply"; + }; + + reg_can2_supply: regulator-can2-supply { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can2_power>; + regulator-name = "can2_supply"; + }; +}; + +&can1 { + xceiver-supply = <®_can1_supply>; + status = "okay"; +}; + +&can2 { + xceiver-supply = <®_can2_supply>; + status = "okay"; +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart24_forceoff>; + + /* + * uart-2-4-on-x21-enable-hog enables the UART transceiver for Apalis + * UART2 and UART3. If one wants to disable the transceiver force + * the GPIO to output-low, if one wants to control the transceiver + * from user space delete the hog node. + */ + uart-2-4-on-x21-enable-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; /* MXM3 180 */ + output-high; + }; +}; + +/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ +&i2c1 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; + + eeprom: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +/* + * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier + * board) + */ +&i2c3 { + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reset_moci>; + /* active-high meaning opposite of regular PERST# active-low polarity */ + reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; + reset-gpio-active-high; + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +®_usb_host_vbus { + status = "okay"; +}; + +®_usb_otg_vbus { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&sound_spdif { + status = "okay"; +}; + +&spdif { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_usb_host_vbus>; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + status = "okay"; +}; + +/* MMC1 */ +&usdhc1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; + pinctrl-1 = <&pinctrl_usdhc1_4bit_sleep &pinctrl_mmc_cd_sleep>; + bus-width = <4>; + cap-power-off-card; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; + +&iomuxc { + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 + >; + }; + + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins = < + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + >; + }; + + pinctrl_enable_can2_power: enablecan2powergrp { + fsl,pins = < + MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0 + >; + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 + >; + }; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = < + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; + + pinctrl_mmc_cd_sleep: mmccdslpgrp { + fsl,pins = < + /* MMC1 CD */ + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0 + >; + }; + + pinctrl_usdhc1_4bit_sleep: usdhc1-4bitslpgrp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000 + >; + }; +}; -- cgit v1.2.3 From e366f7f7fcf6c98298644f45c7fe6660c3e30ffc Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:50:04 +0200 Subject: ARM: dts: imx6q-apalis: backlight pwm: Simplify inverted backlight Set #pwm-cells to the default 3 to gain access to the parameter which allows inverting the PWM signal. This is useful to specify a backlight which has its highest brightness at 0. With the change to use the PWM with inverted polarity the PWM signal is inverted to how it was before this patch. This changes the meaning of the values in the brightness-levels property. I.e. the duty-cycle changes from x/255 to (255-x)/255. Keeping the brightness-levels will then have a big brightness jump from 0 to 127 duty cycle, the other 6 steps will then be barely noticeable. Change the brightness-levels to provide the same brightness-levels as before. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 4ff46ffd2300..c134e71f2a09 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -6,6 +6,7 @@ */ #include +#include / { model = "Toradex Apalis iMX6Q/D Module"; @@ -19,13 +20,13 @@ backlight: backlight { compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; - brightness-levels = <0 127 191 223 239 247 251 255>; - default-brightness-level = <1>; - enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; power-supply = <®_module_3v3>; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 PWM_POLARITY_INVERTED>; status = "disabled"; }; @@ -776,7 +777,6 @@ }; &pwm4 { - #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "disabled"; -- cgit v1.2.3 From 8e4724c93c76c46872e47ca32f0225ad6b0c5ce3 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:50:05 +0200 Subject: ARM: dts: imx6q-apalis: backlight pwm: Adapt brightness steps Adapt the brightness steps as the backlight doesn't light up for very low duty cycles. Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index c134e71f2a09..1144e4d106f0 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -20,8 +20,8 @@ backlight: backlight { compatible = "pwm-backlight"; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; -- cgit v1.2.3 From ea0fb37ba036924f175046ce3e544c613cd32ee5 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 15 Jun 2022 13:50:06 +0200 Subject: ARM: dts: imx6q-apalis: Cleanup - Sort nodes and properties alphabetical - End all pinctrl node names in grp and avoid using dashes - Change the pmic's node name to pmic@8 per binding requirement - Add sound-dai-cells to the codec node per binding requirement Signed-off-by: Max Krummenacher Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-apalis-eval.dts | 20 +-- arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 +-- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 217 ++++++++++++++++--------------- 3 files changed, 126 insertions(+), 126 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts index 19aaffd71f3d..fa160a389870 100644 --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts @@ -32,21 +32,21 @@ reg_pcie_switch: regulator-pcie-switch { compatible = "regulator-fixed"; - regulator-name = "pcie_switch"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + enable-active-high; gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "pcie_switch"; startup-delay-us = <100000>; - enable-active-high; status = "okay"; }; reg_3v3_sw: regulator-3v3-sw { compatible = "regulator-fixed"; - regulator-name = "3.3V_SW"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V_SW"; }; }; @@ -110,11 +110,11 @@ status = "okay"; }; -®_usb_otg_vbus { +®_usb_host_vbus { status = "okay"; }; -®_usb_host_vbus { +®_usb_otg_vbus { status = "okay"; }; @@ -163,8 +163,8 @@ /* SD1 */ &usdhc2 { + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts index a9daf1bb970f..ce39c6a3f640 100644 --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts @@ -32,28 +32,27 @@ leds { compatible = "gpio-leds"; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_leds_ixora>; led4-green { - label = "LED_4_GREEN"; gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + label = "LED_4_GREEN"; }; led4-red { - label = "LED_4_RED"; gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + label = "LED_4_RED"; }; led5-green { - label = "LED_5_GREEN"; gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + label = "LED_5_GREEN"; }; led5-red { - label = "LED_5_RED"; gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + label = "LED_5_RED"; }; }; }; @@ -115,11 +114,11 @@ status = "okay"; }; -®_usb_otg_vbus { +®_usb_host_vbus { status = "okay"; }; -®_usb_host_vbus { +®_usb_otg_vbus { status = "okay"; }; @@ -163,9 +162,9 @@ /* SD1 */ &usdhc2 { + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi index 1144e4d106f0..7c17b91f0965 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi @@ -103,18 +103,18 @@ reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; - regulator-name = "+V3.3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3"; }; reg_module_3v3_audio: regulator-module-3v3-audio { compatible = "regulator-fixed"; - regulator-name = "+V3.3_AUDIO"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_AUDIO"; }; reg_ov5640_1v8_d_o_vdd: regulator-ov5640-1v8-d-o-vdd { @@ -139,63 +139,63 @@ reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_otg_vbus"; status = "disabled"; }; /* on module USB hub */ reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub { compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>; - regulator-name = "usb_host_vbus_hub"; - regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_host_vbus_hub"; startup-delay-us = <2000>; - enable-active-high; status = "okay"; }; reg_usb_host_vbus: regulator-usb-host-vbus { compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; - regulator-name = "usb_host_vbus"; - regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; - enable-active-high; + regulator-min-microvolt = <5000000>; + regulator-name = "usb_host_vbus"; vin-supply = <®_usb_host_vbus_hub>; status = "disabled"; }; sound { compatible = "fsl,imx-audio-sgtl5000"; - model = "imx6q-apalis-sgtl5000"; - ssi-controller = <&ssi1>; audio-codec = <&codec>; audio-routing = "LINE_IN", "Line In Jack", "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; + model = "imx6q-apalis-sgtl5000"; mux-ext-port = <4>; + mux-int-port = <1>; + ssi-controller = <&ssi1>; }; sound_spdif: sound-spdif { compatible = "fsl,imx-audio-spdif"; - model = "imx-spdif"; spdif-controller = <&spdif>; spdif-in; spdif-out; + model = "imx-spdif"; status = "disabled"; }; }; @@ -509,104 +509,105 @@ sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; - pmic: pfuze100@8 { + pmic: pmic@8 { compatible = "fsl,pfuze100"; fsl,pmic-stby-poweroff; reg = <0x08>; regulators { sw1a_reg: sw1ab { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1875000>; + regulator-min-microvolt = <300000>; regulator-ramp-delay = <6250>; }; sw1c_reg: sw1c { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1875000>; + regulator-min-microvolt = <300000>; regulator-ramp-delay = <6250>; }; sw3a_reg: sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1975000>; + regulator-min-microvolt = <400000>; }; swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5150000>; + regulator-min-microvolt = <5000000>; }; snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3000000>; + regulator-min-microvolt = <1000000>; }; vref_reg: vrefddr { - regulator-boot-on; regulator-always-on; + regulator-boot-on; }; vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1550000>; + regulator-min-microvolt = <800000>; }; vgen2_reg: vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1550000>; + regulator-min-microvolt = <800000>; }; vgen3_reg: vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; vgen4_reg: vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; }; vgen5_reg: vgen5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; }; }; codec: sgtl5000@a { compatible = "fsl,sgtl5000"; - reg = <0x0a>; + #sound-dai-cells = <0>; + clocks = <&clks IMX6QDL_CLK_CKO>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>; - clocks = <&clks IMX6QDL_CLK_CKO>; + reg = <0x0a>; VDDA-supply = <®_module_3v3_audio>; VDDIO-supply = <®_module_3v3>; VDDD-supply = <&vgen4_reg>; @@ -615,15 +616,15 @@ /* STMPE811 touch screen controller */ stmpe811@41 { compatible = "st,stmpe811"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_touch_int>; - reg = <0x41>; + blocks = <0x5>; + id = <0>; interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - interrupt-parent = <&gpio4>; interrupt-controller; - id = <0>; - blocks = <0x5>; + interrupt-parent = <&gpio4>; irq-trigger = <0x1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_touch_int>; + reg = <0x41>; /* 3.25 MHz ADC clock speed */ st,adc-freq = <1>; /* 12-bit ADC */ @@ -653,9 +654,9 @@ stmpe_adc: stmpe_adc { compatible = "st,stmpe-adc"; + #io-channel-cells = <1>; /* forbid to use ADC channels 3-0 (touch) */ st,norequest-mask = <0x0F>; - #io-channel-cells = <1>; }; }; }; @@ -793,73 +794,73 @@ }; &uart1 { + fsl,dte-mode; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; - fsl,dte-mode; uart-has-rtscts; status = "disabled"; }; &uart2 { + fsl,dte-mode; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2_dte>; - fsl,dte-mode; uart-has-rtscts; status = "disabled"; }; &uart4 { + fsl,dte-mode; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4_dte>; - fsl,dte-mode; status = "disabled"; }; &uart5 { + fsl,dte-mode; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5_dte>; - fsl,dte-mode; status = "disabled"; }; &usbotg { + disable-over-current; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; - disable-over-current; status = "disabled"; }; /* MMC1 */ &usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; - cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; - vqmmc-supply = <®_module_3v3>; bus-width = <8>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; disable-wp; no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; + vqmmc-supply = <®_module_3v3>; status = "disabled"; }; /* SD1 */ &usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; - vqmmc-supply = <®_module_3v3>; bus-width = <4>; disable-wp; no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + vqmmc-supply = <®_module_3v3>; status = "disabled"; }; /* eMMC */ &usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - vqmmc-supply = <®_module_3v3>; bus-width = <8>; no-1-8-v; non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + vqmmc-supply = <®_module_3v3>; status = "okay"; }; @@ -876,49 +877,49 @@ &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 >; - pinctrl_apalis_gpio1: gpio2io04grp { + pinctrl_apalis_gpio1: apalisgpio1grp { fsl,pins = < MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 >; }; - pinctrl_apalis_gpio2: gpio2io05grp { + pinctrl_apalis_gpio2: apalisgpio2grp { fsl,pins = < MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0 >; }; - pinctrl_apalis_gpio3: gpio2io06grp { + pinctrl_apalis_gpio3: apalisgpio3grp { fsl,pins = < MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0 >; }; - pinctrl_apalis_gpio4: gpio2io07grp { + pinctrl_apalis_gpio4: apalisgpio4grp { fsl,pins = < MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0 >; }; - pinctrl_apalis_gpio5: gpio6io10grp { + pinctrl_apalis_gpio5: apalisgpio5grp { fsl,pins = < MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0 >; }; - pinctrl_apalis_gpio6: gpio6io09grp { + pinctrl_apalis_gpio6: apalisgpio6grp { fsl,pins = < MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0 >; }; - pinctrl_apalis_gpio7: gpio1io02grp { + pinctrl_apalis_gpio7: apalisgpio7grp { fsl,pins = < MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0 >; }; - pinctrl_apalis_gpio8: gpio1io06grp { + pinctrl_apalis_gpio8: apalisgpio8grp { fsl,pins = < MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0 >; @@ -1011,7 +1012,7 @@ >; }; - pinctrl_gpio_bl_on: gpioblon { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins = < MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 >; @@ -1156,7 +1157,7 @@ >; }; - pinctrl_mmc_cd: gpiommccdgrp { + pinctrl_mmc_cd: mmccdgrp { fsl,pins = < /* MMC1 CD */ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0 @@ -1187,35 +1188,35 @@ >; }; - pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { + pinctrl_regulator_usbh_pwr: regusbhpwrgrp { fsl,pins = < /* USBH_EN */ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058 >; }; - pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp { + pinctrl_regulator_usbhub_pwr: regusbhubpwrgrp { fsl,pins = < /* USBH_HUB_EN */ MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058 >; }; - pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp { + pinctrl_regulator_usbotg_pwr: regusbotgpwrgrp { fsl,pins = < /* USBO1 power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058 >; }; - pinctrl_reset_moci: gpioresetmocigrp { + pinctrl_reset_moci: resetmocigrp { fsl,pins = < /* RESET_MOCI control */ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058 >; }; - pinctrl_sd_cd: gpiosdcdgrp { + pinctrl_sd_cd: sdcdgrp { fsl,pins = < /* SD1 CD */ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0 @@ -1235,13 +1236,22 @@ >; }; - pinctrl_touch_int: gpiotouchintgrp { + pinctrl_touch_int: touchintgrp { fsl,pins = < /* STMPE811 interrupt */ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 >; }; + /* Additional DTR, DSR, DCD */ + pinctrl_uart1_ctrl: uart1ctrlgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 + MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 + MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 + >; + }; + pinctrl_uart1_dce: uart1dcegrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 @@ -1259,15 +1269,6 @@ >; }; - /* Additional DTR, DSR, DCD */ - pinctrl_uart1_ctrl: uart1ctrlgrp { - fsl,pins = < - MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 - MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 - MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 - >; - }; - pinctrl_uart2_dce: uart2dcegrp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 @@ -1321,7 +1322,7 @@ >; }; - pinctrl_usdhc1_4bit: usdhc1grp_4bit { + pinctrl_usdhc1_4bit: usdhc1-4bitgrp { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 @@ -1332,7 +1333,7 @@ >; }; - pinctrl_usdhc1_8bit: usdhc1grp_8bit { + pinctrl_usdhc1_8bit: usdhc1-8bitgrp { fsl,pins = < MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071 -- cgit v1.2.3 From 523b53bb750d91148222297c3857bbde7c7483a8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:27 -0700 Subject: ARM: dts: animeo: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-34-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/animeo_ip.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts index 7da718abbd85..3fa3db2d9d02 100644 --- a/arch/arm/boot/dts/animeo_ip.dts +++ b/arch/arm/boot/dts/animeo_ip.dts @@ -168,26 +168,26 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - keyswitch_in { + key-switch-in { label = "keyswitch_in"; gpios = <&pioB 1 GPIO_ACTIVE_HIGH>; linux,code = <28>; wakeup-source; }; - error_in { + key-error-in { label = "error_in"; gpios = <&pioB 2 GPIO_ACTIVE_HIGH>; linux,code = <29>; wakeup-source; }; - btn { + key-s { label = "btn"; gpios = <&pioC 23 GPIO_ACTIVE_HIGH>; linux,code = <31>; -- cgit v1.2.3 From 91503e5a3b5aee6ac7240d1f03abe69253c14de9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:28 -0700 Subject: ARM: dts: animeo: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-35-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/animeo_ip.dts | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts index 3fa3db2d9d02..29936bfbeeb7 100644 --- a/arch/arm/boot/dts/animeo_ip.dts +++ b/arch/arm/boot/dts/animeo_ip.dts @@ -170,8 +170,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; key-switch-in { label = "keyswitch_in"; -- cgit v1.2.3 From 935327a73553001f8d81375c76985d05f604507f Mon Sep 17 00:00:00 2001 From: Christian Lamparter Date: Sat, 18 Jun 2022 00:00:29 +0200 Subject: ARM: dts: BCM5301X: Add DT for Meraki MR26 Meraki MR26 is an EOL wireless access point featuring a PoE ethernet port and two dual-band 3x3 MIMO 802.11n radios and 1x1 dual-band WIFI dedicated to scanning. Thank you Amir for the unit and PSU. Hardware info: SOC : Broadcom BCM53015A1KFEBG (dual-core Cortex-A9 CPU at 800 MHz) RAM : SK Hynix Inc. H5TQ1G63EFR, 1 GBit DDR3 SDRAM = 128 MiB NAND : Spansion S34ML01G100TF100, 1 GBit SLC NAND Flash = 128 MiB ETH : 1 GBit Ethernet Port - PoE (TPS23754 PoE Interface) WIFI0 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) WIFI1 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) WIFI2 : Broadcom BCM43428 "Air Marshal" 802.11 abgn (1x1:1) BUTTON: One reset key behind a small hole next to the Ethernet Port LEDS : One amber (fault), one white (indicator) LED, separate RGB-LED MISC : Atmel AT24C64 8KiB EEPROM i2c : Ti INA219 26V, 12-bit, i2c output current/voltage/power monitor SERIAL: WARNING: The serial port needs a TTL/RS-232 3V3 level converter! The Serial setting is 115200-8-N-1. The board has a populated right angle 1x4 0.1" pinheader. The pinout is: VCC (next to J3, has the pin 1 indicator), RX, TX, GND. Odd stuff: - uboot does not support lzma compression, but gzip'd uImage/DTB work. - uboot claims to support FIT, but fails to pass the DTB to the kernel. Appending the dtb after the kernel image works. - RGB-controller is supported through an external userspace program. - The ubi partition contains a "board-config" volume. It stores the MAC Address (0x66 in binary) and Serial No. (0x7c alpha-numerical). - SoC's temperature sensor always reports that it is on fire. This causes the system to immediately shutdown! Looking at reported "418 degree Celsius" suggests that this sensor is not working. WIFI: b43 is able to initialize all three WIFIs @ 802.11bg. | b43-phy0: Broadcom 43431 WLAN found (core revision 29) | bcma-pci-bridge 0000:01:00.0: bus1: Switched to core: 0x812 | b43-phy0: Found PHY: Analog 9, Type 7 (HT), Revision 1 | b43-phy0: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 | b43-phy0 warning: 5 GHz band is unsupported on this PHY | b43-phy1: Broadcom 43431 WLAN found (core revision 29) | bcma-pci-bridge 0001:01:00.0: bus2: Switched to core: 0x812 | b43-phy1: Found PHY: Analog 9, Type 7 (HT), Revision 1 | b43-phy1: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 | b43-phy1 warning: 5 GHz band is unsupported on this PHY | b43-phy2: Broadcom 43228 WLAN found (core revision 30) | bcma-pci-bridge 0002:01:00.0: bus3: Switched to core: 0x812 | b43-phy2: Found PHY: Analog 9, Type 4 (N), Revision 16 | b43-phy2: Found Radio: Manuf 0x17F, ID 0x2057, Revision 9, Version 1 | Broadcom 43xx driver loaded [ Features: NL ] Signed-off-by: Christian Lamparter Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 166 +++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+) create mode 100644 arch/arm/boot/dts/bcm53015-meraki-mr26.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c8bdba38a488..5406ee68f75d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -135,6 +135,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm47094-luxul-xwr-3150-v1.dtb \ bcm47094-netgear-r8500.dtb \ bcm47094-phicomm-k3.dtb \ + bcm53015-meraki-mr26.dtb \ bcm53016-meraki-mr32.dtb \ bcm94708.dtb \ bcm94709.dtb \ diff --git a/arch/arm/boot/dts/bcm53015-meraki-mr26.dts b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts new file mode 100644 index 000000000000..14f58033efeb --- /dev/null +++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for Meraki MR26 / Codename: Venom + * + * Copyright (C) 2022 Christian Lamparter + */ + +/dts-v1/; + +#include "bcm4708.dtsi" +#include "bcm5301x-nand-cs0-bch8.dtsi" +#include + +/ { + compatible = "meraki,mr26", "brcm,bcm53015", "brcm,bcm4708"; + model = "Meraki MR26"; + + memory@0 { + reg = <0x00000000 0x08000000>; + device_type = "memory"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_FAULT; + color = ; + gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + led-1 { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + key-restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + clock-frequency = <50000000>; + /delete-property/ clocks; +}; + +&uart1 { + status = "disabled"; +}; + +&gmac0 { + status = "okay"; +}; + +&gmac1 { + status = "disabled"; +}; +&gmac2 { + status = "disabled"; +}; +&gmac3 { + status = "disabled"; +}; + +&nandcs { + nand-ecc-algo = "hw"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <0x1>; + #size-cells = <0x1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x200000>; + read-only; + }; + + partition@200000 { + label = "u-boot-env"; + reg = <0x200000 0x200000>; + /* empty */ + }; + + partition@400000 { + label = "u-boot-backup"; + reg = <0x400000 0x200000>; + /* empty */ + }; + + partition@600000 { + label = "u-boot-env-backup"; + reg = <0x600000 0x200000>; + /* empty */ + }; + + partition@800000 { + label = "ubi"; + reg = <0x800000 0x7780000>; + }; + }; +}; + +&srab { + status = "okay"; + + ports { + port@0 { + reg = <0>; + label = "poe"; + }; + + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <&gmac0>; + + fixed-link { + speed = <1000>; + duplex-full; + }; + }; + }; +}; + +&i2c0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_i2c>; + + clock-frequency = <100000>; + + ina219@40 { + compatible = "ti,ina219"; /* PoE power */ + reg = <0x40>; + shunt-resistor = <60000>; /* = 60 mOhms */ + }; + + eeprom@56 { + compatible = "atmel,24c64"; + reg = <0x56>; + pagesize = <32>; + read-only; + #address-cells = <1>; + #size-cells = <1>; + + /* it's empty */ + }; +}; + +&thermal { + status = "disabled"; + /* does not work, reads 418 degree Celsius */ +}; -- cgit v1.2.3 From 30b276fca5c0644f3cb17bceb1bd6a626c670184 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 29 May 2022 12:49:25 +0200 Subject: ARM: dts: ast2500-evb: fix board compatible The AST2500 EVB board should have dedicated compatible. Fixes: 02440622656d ("arm/dst: Add Aspeed ast2500 device tree") Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220529104928.79636-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-ast2500-evb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts index 1d24b394ea4c..a497dd135491 100644 --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts @@ -5,7 +5,7 @@ / { model = "AST2500 EVB"; - compatible = "aspeed,ast2500"; + compatible = "aspeed,ast2500-evb", "aspeed,ast2500"; aliases { serial4 = &uart5; -- cgit v1.2.3 From aa5e06208500a0db41473caebdee5a2e81d5a277 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 29 May 2022 12:49:26 +0200 Subject: ARM: dts: ast2600-evb: fix board compatible The AST2600 EVB board should have dedicated compatible. Fixes: 2ca5646b5c2f ("ARM: dts: aspeed: Add AST2600 and EVB") Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220529104928.79636-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-ast2600-evb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts index 5a6063bd4508..c698e6538269 100644 --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts @@ -8,7 +8,7 @@ / { model = "AST2600 EVB"; - compatible = "aspeed,ast2600"; + compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600"; aliases { serial4 = &uart5; -- cgit v1.2.3 From 33c39140cc298e0d4e36083cb9a665a837773a60 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 29 May 2022 12:49:27 +0200 Subject: ARM: dts: ast2600-evb-a1: fix board compatible The AST2600 EVB A1 board should have dedicated compatible. Fixes: a72955180372 ("ARM: dts: aspeed: ast2600evb: Add dts file for A1 and A0") Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220529104928.79636-6-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts b/arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts index dd7148060c4a..d0a5c2ff0fec 100644 --- a/arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts +++ b/arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts @@ -5,6 +5,7 @@ / { model = "AST2600 A1 EVB"; + compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600"; /delete-node/regulator-vcc-sdhci0; /delete-node/regulator-vcc-sdhci1; -- cgit v1.2.3 From efbf2c262c89f78f99fd781c77b7305fac23c3c7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:50:32 +0200 Subject: ARM: dts: exynos: align aat1290 flash LED node with bindings in Galaxy S3 The bindings expect aat1290 flash LED child node to be named "led". Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175033.130468-3-krzysztof.kozlowski@linaro.org Acked-by: Jacek Anaszewski --- arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi index aa7de6de8e19..46640b490a8c 100644 --- a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi +++ b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi @@ -25,7 +25,7 @@ pinctrl-1 = <&camera_flash_host>; pinctrl-2 = <&camera_flash_isp>; - flash-led { + led { label = "flash"; led-max-microamp = <520833>; flash-max-microamp = <1012500>; -- cgit v1.2.3 From ebadc8a63645f7923dc63154ad8d290313f03101 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:50:33 +0200 Subject: ARM: dts: exynos: add function and color to aat1290 flash LED node in Galaxy S3 Add common LED properties - the function and color - to aat1290 flash LED node in Galaxy S3, so we can drop deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175033.130468-4-krzysztof.kozlowski@linaro.org Acked-by: Jacek Anaszewski --- arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi index 46640b490a8c..94122e9c6625 100644 --- a/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi +++ b/arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi @@ -7,6 +7,7 @@ */ /dts-v1/; +#include #include "exynos4412-midas.dtsi" / { @@ -26,7 +27,8 @@ pinctrl-2 = <&camera_flash_isp>; led { - label = "flash"; + function = LED_FUNCTION_FLASH; + color = ; led-max-microamp = <520833>; flash-max-microamp = <1012500>; flash-max-timeout-us = <1940000>; -- cgit v1.2.3 From f64bbfca314663886575b6fde16a5ba9afcda0fb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:09 +0200 Subject: ARM: dts: exynos: add function to LED node in Origen 4210 Add common LED property - the function - to LED node in Origen 4210. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4210-origen.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index bfdc21854914..5f37b751f700 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -15,6 +15,7 @@ #include "exynos4210.dtsi" #include #include +#include #include "exynos-mfc-reserved-memory.dtsi" / { @@ -86,6 +87,7 @@ compatible = "gpio-leds"; status { gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; + function = LED_FUNCTION_HEARTBEAT; linux,default-trigger = "heartbeat"; }; }; -- cgit v1.2.3 From ff4275fa0737f2312880d6fb0a4f582a73342465 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:10 +0200 Subject: ARM: dts: exynos: add function to LED nodes in Tiny4412 Add common LED property - the function - to LED nodes in Tiny4412. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4412-tiny4412.dts | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts index 017b26108bb0..04388c575efe 100644 --- a/arch/arm/boot/dts/exynos4412-tiny4412.dts +++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "exynos4412.dtsi" #include +#include / { model = "FriendlyARM TINY4412 board based on Exynos4412"; @@ -30,6 +31,7 @@ led1 { label = "led1"; + function = LED_FUNCTION_HEARTBEAT; gpios = <&gpm4 0 GPIO_ACTIVE_LOW>; default-state = "off"; linux,default-trigger = "heartbeat"; @@ -49,6 +51,7 @@ led4 { label = "led4"; + function = LED_FUNCTION_DISK_ACTIVITY; gpios = <&gpm4 3 GPIO_ACTIVE_LOW>; default-state = "off"; linux,default-trigger = "mmc0"; -- cgit v1.2.3 From a149eb5f1b118afe27a5b08d71c0abd2572be0a0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:11 +0200 Subject: ARM: dts: exynos: add function and color to LED nodes in Itop Elite Add common LED properties - the function and color - to LED nodes in Exynos4412 Itop Elite, so we can drop in some places deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4412-itop-elite.dts | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts index 05db9eb9b24c..202ab0fee3b7 100644 --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts @@ -11,6 +11,7 @@ */ /dts-v1/; +#include #include #include #include "exynos4412-itop-scp-core.dtsi" @@ -28,7 +29,8 @@ compatible = "gpio-leds"; led2 { - label = "red:system"; + function = LED_FUNCTION_HEARTBEAT; + color = ; gpios = <&gpx1 0 GPIO_ACTIVE_HIGH>; default-state = "off"; linux,default-trigger = "heartbeat"; @@ -36,6 +38,7 @@ led3 { label = "red:user"; + color = ; gpios = <&gpk1 1 GPIO_ACTIVE_HIGH>; default-state = "off"; }; -- cgit v1.2.3 From 3e8368fdcee3c9072a41946f4a92517b5bfacb03 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:12 +0200 Subject: ARM: dts: exynos: add function and color to LED node in Odroid U3 Add common LED properties - the function and color - to LED node in Exynos4412 Odroid U3, so we can drop deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4412-odroidu3.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 36c369c42b77..a5ad88b897ff 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -9,6 +9,7 @@ */ /dts-v1/; +#include #include "exynos4412-odroid-common.dtsi" #include "exynos4412-prime.dtsi" @@ -37,7 +38,8 @@ leds { compatible = "gpio-leds"; led1 { - label = "led1:heart"; + function = LED_FUNCTION_HEARTBEAT; + color = ; gpios = <&gpc1 0 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "heartbeat"; -- cgit v1.2.3 From bcad13fca717a56cddb334eb131edba92c6b5494 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:13 +0200 Subject: ARM: dts: exynos: add function and color to LED nodes in Odroid X/X2 Add common LED properties - the function and color - to LED nodes in Exynos4412 Odroid X/X2, so we can drop in some places deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-6-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4412-odroidx.dts | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 1f17cc30ed14..68d589e081bc 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -9,6 +9,7 @@ */ /dts-v1/; +#include #include "exynos4412-odroid-common.dtsi" / { @@ -27,13 +28,15 @@ leds { compatible = "gpio-leds"; led1 { - label = "led1:heart"; + function = LED_FUNCTION_HEARTBEAT; + color = ; gpios = <&gpc1 0 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "heartbeat"; }; led2 { label = "led2:mmc0"; + function = LED_FUNCTION_DISK_ACTIVITY; gpios = <&gpc1 2 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "mmc0"; -- cgit v1.2.3 From f0945faa4a1a23d288ca8b92abab10d5145f33a1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:14 +0200 Subject: ARM: dts: exynos: add function and color to LED node in Odroid HC1 Add common LED properties - the function and color - to LED node in Exynos5422 Odroid HC1, so we can drop deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-7-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos5422-odroidhc1.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts index d91f7fa2cf80..3de7019572a2 100644 --- a/arch/arm/boot/dts/exynos5422-odroidhc1.dts +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts @@ -8,6 +8,7 @@ */ /dts-v1/; +#include #include "exynos5422-odroid-core.dtsi" / { @@ -19,7 +20,8 @@ compatible = "pwm-leds"; led-1 { - label = "blue:heartbeat"; + function = LED_FUNCTION_HEARTBEAT; + color = ; pwms = <&pwm 2 2000000 0>; pwm-names = "pwm2"; max-brightness = <255>; -- cgit v1.2.3 From 99f6b77f74c88ac1bc4c81e089dd0cbbf882aea6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:15 +0200 Subject: ARM: dts: exynos: add function and color to LED node in Odroid XU4 Add common LED properties - the function and color - to LED node in Exynos5422 Odroid XU4, so we can drop deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-8-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos5422-odroidxu4.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts index 1c24f9b35973..f5fb617f46bd 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts @@ -9,6 +9,7 @@ */ /dts-v1/; +#include #include #include "exynos5422-odroidxu3-common.dtsi" @@ -21,7 +22,8 @@ compatible = "pwm-leds"; led-1 { - label = "blue:heartbeat"; + function = LED_FUNCTION_HEARTBEAT; + color = ; pwms = <&pwm 2 2000000 0>; pwm-names = "pwm2"; max-brightness = <255>; -- cgit v1.2.3 From 82cd16902a51773cfc0ee05bbd1ab470db5181ab Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Jun 2022 19:57:16 +0200 Subject: ARM: dts: exynos: add function and color to LED nodes in Odroid XU/XU3 Add common LED properties - the function and color - to LED nodes in Exynos5422 Odroid XU/XU3/XU3-Lite, so we can drop in some places deprecated label property. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220620175716.132143-9-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi b/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi index 982752e1df24..8c0e1716c0b3 100644 --- a/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi +++ b/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi @@ -9,6 +9,7 @@ */ #include +#include / { led-controller-1 { @@ -16,6 +17,8 @@ led-1 { label = "green:mmc0"; + function = LED_FUNCTION_DISK_ACTIVITY; + color = ; pwms = <&pwm 1 2000000 0>; pwm-names = "pwm1"; /* @@ -27,7 +30,8 @@ }; led-2 { - label = "blue:heartbeat"; + function = LED_FUNCTION_HEARTBEAT; + color = ; pwms = <&pwm 2 2000000 0>; pwm-names = "pwm2"; max-brightness = <255>; @@ -40,6 +44,8 @@ led-3 { label = "red:microSD"; + function = LED_FUNCTION_DISK_ACTIVITY; + color = ; gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; default-state = "off"; linux,default-trigger = "mmc1"; -- cgit v1.2.3 From 271e2c92285075a890c58cba9ad5979a8959f6ff Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:20 -0700 Subject: ARM: dts: rockchip: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-27-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 4 ++-- arch/arm/boot/dts/rk3066a-rayeager.dts | 2 +- arch/arm/boot/dts/rk3188-bqedison2qc.dts | 4 ++-- arch/arm/boot/dts/rk3188-px3-evb.dts | 2 +- arch/arm/boot/dts/rk3188-radxarock.dts | 2 +- arch/arm/boot/dts/rk3229-evb.dts | 2 +- arch/arm/boot/dts/rk3288-evb.dtsi | 2 +- arch/arm/boot/dts/rk3288-firefly-reload.dts | 2 +- arch/arm/boot/dts/rk3288-firefly.dtsi | 2 +- arch/arm/boot/dts/rk3288-phycore-rdk.dts | 4 ++-- arch/arm/boot/dts/rk3288-popmetal.dts | 2 +- arch/arm/boot/dts/rk3288-r89.dts | 2 +- arch/arm/boot/dts/rk3288-rock2-square.dts | 2 +- arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 2 +- arch/arm/boot/dts/rk3288-veyron-minnie.dts | 4 ++-- arch/arm/boot/dts/rk3288-veyron-pinky.dts | 2 +- arch/arm/boot/dts/rk3288-veyron.dtsi | 2 +- 17 files changed, 21 insertions(+), 21 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts index 390aa33cd55a..962b4d1291db 100644 --- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts +++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts @@ -48,7 +48,7 @@ compatible = "gpio-keys"; autorepeat; - power { + key-power { gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */ linux,code = ; label = "GPIO Key Power"; @@ -56,7 +56,7 @@ wakeup-source; debounce-interval = <100>; }; - volume-down { + key-volume-down { gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */ linux,code = ; label = "GPIO Key Vol-"; diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts index 12b2e59aebc4..dbbc5170094e 100644 --- a/arch/arm/boot/dts/rk3066a-rayeager.dts +++ b/arch/arm/boot/dts/rk3066a-rayeager.dts @@ -32,7 +32,7 @@ keys: gpio-keys { compatible = "gpio-keys"; - power { + key-power { wakeup-source; gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>; label = "GPIO Power"; diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts index 35b7a5798eee..9312be362a7a 100644 --- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -37,7 +37,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pwr_key &usb_int>; - power { + key-power { gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; @@ -46,7 +46,7 @@ wakeup-source; }; - wake_on_usb: wake-on-usb { + wake_on_usb: key-wake-on-usb { label = "Wake-on-USB"; gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts index fc478ac4e781..0a1ae689b162 100644 --- a/arch/arm/boot/dts/rk3188-px3-evb.dts +++ b/arch/arm/boot/dts/rk3188-px3-evb.dts @@ -29,7 +29,7 @@ compatible = "gpio-keys"; autorepeat; - power { + key-power { gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 36c0945f43b2..a9ed3cd2c2da 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -24,7 +24,7 @@ compatible = "gpio-keys"; autorepeat; - power { + key-power { gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts index 797476e8bef1..5c3d08e3eea3 100644 --- a/arch/arm/boot/dts/rk3229-evb.dts +++ b/arch/arm/boot/dts/rk3229-evb.dts @@ -107,7 +107,7 @@ regulator-boot-on; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; autorepeat; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index c4ca73b40d4a..399d6b9c5fd4 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -118,7 +118,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pwrbtn>; - power { + key-power { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts index 9a4a9749c405..a5a0826341e6 100644 --- a/arch/arm/boot/dts/rk3288-firefly-reload.dts +++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts @@ -27,7 +27,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { wakeup-source; gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; label = "GPIO Power"; diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi index 7fb582302b32..052afe5543e2 100644 --- a/arch/arm/boot/dts/rk3288-firefly.dtsi +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -49,7 +49,7 @@ keys: gpio-keys { compatible = "gpio-keys"; - power { + key-power { wakeup-source; gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; label = "GPIO Power"; diff --git a/arch/arm/boot/dts/rk3288-phycore-rdk.dts b/arch/arm/boot/dts/rk3288-phycore-rdk.dts index 1e33859de484..1a5156951492 100644 --- a/arch/arm/boot/dts/rk3288-phycore-rdk.dts +++ b/arch/arm/boot/dts/rk3288-phycore-rdk.dts @@ -20,14 +20,14 @@ pinctrl-names = "default"; pinctrl-0 = <&user_button_pins>; - button@0 { + button-0 { label = "home"; linux,code = ; gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>; wakeup-source; }; - button@1 { + button-1 { label = "menu"; linux,code = ; gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts index 8c7376d64bc4..fd90f3b8fc32 100644 --- a/arch/arm/boot/dts/rk3288-popmetal.dts +++ b/arch/arm/boot/dts/rk3288-popmetal.dts @@ -30,7 +30,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pwrbtn>; - power { + key-power { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts index 55467bc30fa6..633e5a032463 100644 --- a/arch/arm/boot/dts/rk3288-r89.dts +++ b/arch/arm/boot/dts/rk3288-r89.dts @@ -31,7 +31,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pwrbtn>; - power { + key-power { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts index c4d1d142d8c6..80e0f07c8e87 100644 --- a/arch/arm/boot/dts/rk3288-rock2-square.dts +++ b/arch/arm/boot/dts/rk3288-rock2-square.dts @@ -28,7 +28,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; label = "GPIO Power"; linux,code = ; diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi index 05112c25176d..700bb548d6b2 100644 --- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi @@ -32,7 +32,7 @@ pinctrl-names = "default"; pinctrl-0 = <&ap_lid_int_l>; - lid { + switch-lid { label = "Lid"; gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; wakeup-source; diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts index 82fc6fba9999..dcdcc55c4098 100644 --- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts +++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts @@ -21,14 +21,14 @@ pinctrl-names = "default"; pinctrl-0 = <&volum_down_l &volum_up_l>; - volum_down { + key-volum-down { label = "Volum_down"; gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>; linux,code = ; debounce-interval = <100>; }; - volum_up { + key-volum-up { label = "Volum_up"; gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts index 4e9fdb0f722d..e2a4e6232eb5 100644 --- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts +++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts @@ -45,7 +45,7 @@ &lid_switch { pinctrl-0 = <&pwr_key_h &ap_lid_int_l>; - power { + key-power { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 54a6838d73f5..e406c8c7c7e5 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -29,7 +29,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pwr_key_l>; - power { + key-power { label = "Power"; gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From e5a3cbe8b45b0a436a39cc969b7bcc8353248018 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:21 -0700 Subject: ARM: dts: rockchip: correct gpio-keys properties on rk3288-tinker gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-28-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-tinker.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi index 9c1e38c54eae..09618bb7d872 100644 --- a/arch/arm/boot/dts/rk3288-tinker.dtsi +++ b/arch/arm/boot/dts/rk3288-tinker.dtsi @@ -26,14 +26,12 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; pinctrl-names = "default"; pinctrl-0 = <&pwrbtn>; - button@0 { + button { gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; linux,code = ; label = "GPIO Key Power"; -- cgit v1.2.3 From c8b35008b4f1104b7d1296ee9508d45f9079e312 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:24 -0700 Subject: ARM: dts: xilinx: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-zc702.dts | 4 ++-- arch/arm/boot/dts/zynq-zturn-common.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index cf70aff26c66..d23201ba8cd7 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -30,14 +30,14 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - sw14 { + switch-14 { label = "sw14"; gpios = <&gpio0 12 0>; linux,code = <108>; /* down */ wakeup-source; autorepeat; }; - sw13 { + switch-13 { label = "sw13"; gpios = <&gpio0 14 0>; linux,code = <103>; /* up */ diff --git a/arch/arm/boot/dts/zynq-zturn-common.dtsi b/arch/arm/boot/dts/zynq-zturn-common.dtsi index bf5d1c4568b0..dfb1fbafe3aa 100644 --- a/arch/arm/boot/dts/zynq-zturn-common.dtsi +++ b/arch/arm/boot/dts/zynq-zturn-common.dtsi @@ -49,7 +49,7 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - K1 { + key { label = "K1"; gpios = <&gpio0 0x32 0x1>; linux,code = <0x66>; -- cgit v1.2.3 From 013fda41c03e6bcb3dc416669187b609e9e5fdbc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 9 Jun 2022 10:35:16 +0200 Subject: ARM: dts: ux500: Fix Janice accelerometer mounting matrix This was fixed wrong so fix it again. Now verified by using iio-sensor-proxy monitor-sensor test program. Link: https://lore.kernel.org/r/20220609083516.329281-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-ux500-samsung-janice.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts index e6d4fd0eb5f4..ed5c79c3d04b 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts @@ -633,8 +633,8 @@ accelerometer@8 { compatible = "bosch,bma222"; reg = <0x08>; - mount-matrix = "0", "1", "0", - "-1", "0", "0", + mount-matrix = "0", "-1", "0", + "1", "0", "0", "0", "0", "1"; vddio-supply = <&ab8500_ldo_aux2_reg>; // 1.8V vdd-supply = <&ab8500_ldo_aux1_reg>; // 3V -- cgit v1.2.3 From 0b2152e428ab91533a02888ff24e52e788dc4637 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 11 Jun 2022 22:42:49 +0200 Subject: ARM: dts: ux500: Fix Codina accelerometer mounting matrix This was fixed wrong so fix it again. Now verified by using iio-sensor-proxy monitor-sensor test program. Link: https://lore.kernel.org/r/20220611204249.472250-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-ux500-samsung-codina.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ste-ux500-samsung-codina.dts b/arch/arm/boot/dts/ste-ux500-samsung-codina.dts index b6746ac167bc..5f41256d7f4b 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-codina.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-codina.dts @@ -598,8 +598,8 @@ reg = <0x19>; vdd-supply = <&ab8500_ldo_aux1_reg>; // 3V vddio-supply = <&ab8500_ldo_aux2_reg>; // 1.8V - mount-matrix = "0", "-1", "0", - "1", "0", "0", + mount-matrix = "0", "1", "0", + "-1", "0", "0", "0", "0", "1"; }; }; -- cgit v1.2.3 From e24c75f02a81d6ddac0072cbd7a03e799c19d558 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 11 Jun 2022 22:51:38 +0200 Subject: ARM: dts: ux500: Fix Gavini accelerometer mounting matrix This was fixed wrong so fix it. Now verified by using iio-sensor-proxy monitor-sensor test program. Link: https://lore.kernel.org/r/20220611205138.491513-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-ux500-samsung-gavini.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ste-ux500-samsung-gavini.dts b/arch/arm/boot/dts/ste-ux500-samsung-gavini.dts index 53062d50e455..806da3fc33cd 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-gavini.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-gavini.dts @@ -527,8 +527,8 @@ accelerometer@18 { compatible = "bosch,bma222e"; reg = <0x18>; - mount-matrix = "0", "1", "0", - "-1", "0", "0", + mount-matrix = "0", "-1", "0", + "1", "0", "0", "0", "0", "1"; vddio-supply = <&ab8500_ldo_aux2_reg>; // 1.8V vdd-supply = <&ab8500_ldo_aux1_reg>; // 3V -- cgit v1.2.3 From 799270e9b8be0846d418ed6c3f61408aef8059a1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:13 -0700 Subject: ARM: tegra: Align gpio-keys node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra114-asus-tf701t.dts | 8 ++++---- arch/arm/boot/dts/tegra114-dalmore.dts | 8 ++++---- arch/arm/boot/dts/tegra114-roth.dts | 6 +++--- arch/arm/boot/dts/tegra114-tn7.dts | 6 +++--- arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 2 +- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- arch/arm/boot/dts/tegra124-nyan.dtsi | 4 ++-- arch/arm/boot/dts/tegra124-venice2.dts | 2 +- arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 8 ++++---- arch/arm/boot/dts/tegra20-asus-tf101.dts | 8 ++++---- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 +- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 4 ++-- arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +- arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi | 8 ++++---- arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi | 10 +++++----- arch/arm/boot/dts/tegra30-cardhu.dtsi | 6 +++--- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/tegra30-ouya.dts | 2 +- arch/arm/boot/dts/tegra30-pegatron-chagall.dts | 10 +++++----- 26 files changed, 57 insertions(+), 57 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/tegra114-asus-tf701t.dts index b791ce97424b..284209b0bd96 100644 --- a/arch/arm/boot/dts/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/tegra114-asus-tf701t.dts @@ -684,7 +684,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_default>; - power { + button-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -692,14 +692,14 @@ wakeup-source; }; - volume-up { + button-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; linux,code = ; debounce-interval = <10>; }; - volume-down { + button-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; linux,code = ; @@ -715,7 +715,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_hall_sensor_default>; - hall-sensor { + switch-hall-sensor { label = "Hall Effect Sensor"; gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>; linux,input-type = ; diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 658edfb8d7fa..fffd62bcea6a 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -1161,26 +1161,26 @@ gpio-keys { compatible = "gpio-keys"; - home { + key-home { label = "Home"; gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - volume_down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; linux,code = ; }; - volume_up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts index 2498cf18fd39..b9d00009d1f4 100644 --- a/arch/arm/boot/dts/tegra114-roth.dts +++ b/arch/arm/boot/dts/tegra114-roth.dts @@ -1025,19 +1025,19 @@ gpio-keys { compatible = "gpio-keys"; - back { + key-back { label = "Back"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - home { + key-home { label = "Home"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; linux,code = ; }; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts index ef8f722dd9cb..f02d8c79eee7 100644 --- a/arch/arm/boot/dts/tegra114-tn7.dts +++ b/arch/arm/boot/dts/tegra114-tn7.dts @@ -282,20 +282,20 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - volume_down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - volume_up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts index 3209554ec7e6..bce12b3411fc 100644 --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts @@ -191,7 +191,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "WAKE1_MICO"; gpios = <&gpio TEGRA_GPIO(DD, 3) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts index 814257c79bf1..800283ad6bdc 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts @@ -193,7 +193,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "WAKE1_MICO"; gpios = <&gpio TEGRA_GPIO(DD, 3) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 28b889e4e33b..f41dd4039c07 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -1886,7 +1886,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi index a93cfb492ba1..13061ab5247b 100644 --- a/arch/arm/boot/dts/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi @@ -603,7 +603,7 @@ gpio-keys { compatible = "gpio-keys"; - lid { + switch-lid { label = "Lid"; gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; linux,input-type = <5>; @@ -612,7 +612,7 @@ wakeup-source; }; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 6a9592ceb5f2..8f40fcfc11b0 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -1078,7 +1078,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts index bf1126d26aff..dac6d02a1b15 100644 --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts @@ -905,7 +905,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>; linux,code = ; @@ -914,7 +914,7 @@ wakeup-source; }; - rotation-lock { + key-rotation-lock { label = "Rotate-lock"; gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>; linux,code = ; @@ -922,7 +922,7 @@ debounce-interval = <10>; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; linux,code = ; @@ -931,7 +931,7 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-asus-tf101.dts b/arch/arm/boot/dts/tegra20-asus-tf101.dts index f3b0166f7a9c..bf797a1f27ea 100644 --- a/arch/arm/boot/dts/tegra20-asus-tf101.dts +++ b/arch/arm/boot/dts/tegra20-asus-tf101.dts @@ -980,7 +980,7 @@ gpio-keys { compatible = "gpio-keys"; - dock-hall-sensor { + switch-dock-hall-sensor { label = "Lid"; gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -990,7 +990,7 @@ wakeup-source; }; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; linux,code = ; @@ -999,7 +999,7 @@ wakeup-source; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>; linux,code = ; @@ -1008,7 +1008,7 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts index d2a3bf9d28bd..cb1190b77db3 100644 --- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts @@ -209,7 +209,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "SODIMM pin 45 wakeup"; gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index 00ecbbd5e9e1..53487cc21513 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -191,7 +191,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "SODIMM pin 45 wakeup"; gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 79b6b79fab65..11f21aeba8e9 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -648,7 +648,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 0fb4b1f5bc1c..48fe628c6d87 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -596,7 +596,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "Wakeup"; gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index c4a6a6a94559..5b4c5ef30996 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -800,14 +800,14 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; linux,code = ; wakeup-source; }; - lid { + switch-lid { label = "Lid"; gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; linux,input-type = <5>; /* EV_SW */ diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 9d0c86711de2..dc51835423a9 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -388,7 +388,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index b0a00970b61c..caa17e876e41 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -628,7 +628,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 93b83b3c5655..ad968ff968d7 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -181,7 +181,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "WAKE1_MICO"; gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts index fbfa75e53f32..c172fdb5e1ae 100644 --- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts @@ -182,7 +182,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "WAKE1_MICO"; gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi index 55e6171a411d..ee683c5a9c62 100644 --- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi @@ -1124,7 +1124,7 @@ gpio-keys { compatible = "gpio-keys"; - hall-sensor { + switch-hall-sensor { label = "Lid"; gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -1134,7 +1134,7 @@ wakeup-source; }; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -1143,7 +1143,7 @@ wakeup-source; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; linux,code = ; @@ -1152,7 +1152,7 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi index c662ab261ed5..c27e70d8bf2b 100644 --- a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi @@ -1511,7 +1511,7 @@ compatible = "gpio-keys"; interrupt-parent = <&gpio>; - dock-hall-sensor { + switch-dock-hall-sensor { label = "Lid sensor"; gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -1521,7 +1521,7 @@ wakeup-source; }; - lineout-detect { + switch-lineout-detect { label = "Audio dock line-out detect"; gpios = <&gpio TEGRA_GPIO(X, 3) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -1544,7 +1544,7 @@ compatible = "gpio-keys"; interrupt-parent = <&gpio>; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -1553,7 +1553,7 @@ wakeup-source; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; linux,code = ; @@ -1562,7 +1562,7 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index ba257ed36d9c..540530c983ff 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -685,7 +685,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "Power"; interrupt-parent = <&pmic>; interrupts = <2 0>; @@ -694,14 +694,14 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>; linux,code = ; debounce-interval = <10>; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 7d4a6ca4936a..8dbc15f9a9e4 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -145,7 +145,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "SODIMM pin 45 wakeup"; gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-ouya.dts b/arch/arm/boot/dts/tegra30-ouya.dts index e58dda4f9d2c..b7acea39b942 100644 --- a/arch/arm/boot/dts/tegra30-ouya.dts +++ b/arch/arm/boot/dts/tegra30-ouya.dts @@ -4764,7 +4764,7 @@ gpio-keys { compatible = "gpio-keys"; - power { + key-power { gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; debounce-interval = <10>; linux,code = ; diff --git a/arch/arm/boot/dts/tegra30-pegatron-chagall.dts b/arch/arm/boot/dts/tegra30-pegatron-chagall.dts index 8ce61035290b..7c81f0205549 100644 --- a/arch/arm/boot/dts/tegra30-pegatron-chagall.dts +++ b/arch/arm/boot/dts/tegra30-pegatron-chagall.dts @@ -2655,7 +2655,7 @@ compatible = "gpio-keys"; interrupt-parent = <&gpio>; - dock-insert { + switch-dock-insert { label = "Chagall Dock"; gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -2665,7 +2665,7 @@ wakeup-source; }; - lineout-detect { + switch-lineout-detect { label = "Audio dock line-out detect"; gpios = <&gpio TEGRA_GPIO(S, 3) GPIO_ACTIVE_LOW>; linux,input-type = ; @@ -2688,7 +2688,7 @@ compatible = "gpio-keys"; interrupt-parent = <&gpio>; - power { + key-power { label = "Power"; gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -2697,7 +2697,7 @@ wakeup-source; }; - volume-up { + key-volume-up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -2706,7 +2706,7 @@ wakeup-source; }; - volume-down { + key-volume-down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From 986fd5fe55cb369c34a1dc65b1469aac536a6d50 Mon Sep 17 00:00:00 2001 From: Serge Semin Date: Fri, 24 Jun 2022 17:16:18 +0300 Subject: ARM: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin Acked-by: Vladimir Zapolskiy Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220624141622.7149-3-Sergey.Semin@baikalelectronics.ru Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/lpc18xx.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index c6f8942f8d3d..1bb686a7b3ec 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -121,7 +121,7 @@ status = "disabled"; }; - usb0: ehci@40006100 { + usb0: usb@40006100 { compatible = "nxp,lpc1850-ehci", "generic-ehci"; reg = <0x40006100 0x100>; interrupts = <8>; @@ -133,7 +133,7 @@ status = "disabled"; }; - usb1: ehci@40007100 { + usb1: usb@40007100 { compatible = "nxp,lpc1850-ehci", "generic-ehci"; reg = <0x40007100 0x100>; interrupts = <9>; -- cgit v1.2.3 From 4cf461f2bf4ecf32b6cf4a7cb19b002d58ec9618 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2022 09:45:14 -0300 Subject: ARM: dts: imx7d-smegw01: Replace 'enable-sdio-wakeup' As explained in Documentation/devicetree/bindings/mmc/mmc-controller.yaml, the 'enable-sdio-wakeup' property is considered deprecated. Replace it with the 'wakeup-source' property instead. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7d-smegw01.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx7d-smegw01.dts b/arch/arm/boot/dts/imx7d-smegw01.dts index c6b32064a009..b196f40f1f5a 100644 --- a/arch/arm/boot/dts/imx7d-smegw01.dts +++ b/arch/arm/boot/dts/imx7d-smegw01.dts @@ -207,7 +207,7 @@ pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; no-1-8-v; - enable-sdio-wakeup; + wakeup-source; keep-power-in-suspend; status = "okay"; }; @@ -221,7 +221,7 @@ sd-uhs-ddr50; mmc-ddr-1_8v; vmmc-supply = <®_wifi>; - enable-sdio-wakeup; + wakeup-source; status = "okay"; }; -- cgit v1.2.3 From 01f8d921f72286dd9145181ede121f4b393fc810 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2022 09:45:15 -0300 Subject: ARM: dts: imx6q-bosch-acc: Replace 'enable-sdio-wakeup' As explained in Documentation/devicetree/bindings/mmc/mmc-controller.yaml, the 'enable-sdio-wakeup' property is considered deprecated. Replace it with the 'wakeup-source' property instead. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-bosch-acc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q-bosch-acc.dts b/arch/arm/boot/dts/imx6q-bosch-acc.dts index 731fbc7b317c..8263bfef9bf8 100644 --- a/arch/arm/boot/dts/imx6q-bosch-acc.dts +++ b/arch/arm/boot/dts/imx6q-bosch-acc.dts @@ -570,7 +570,7 @@ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; no-1-8-v; keep-power-in-suspend; - enable-sdio-wakeup; + wakeup-source; voltage-ranges = <3300 3300>; vmmc-supply = <®_sw4>; fsl,wp-controller; -- cgit v1.2.3 From 4e0ce6e703c24d2d7a2acf027f4b712368a35eb9 Mon Sep 17 00:00:00 2001 From: Robin van der Gracht Date: Tue, 21 Jun 2022 16:03:34 +0200 Subject: ARM: dts: imx6qdl-prti6q.dtsi: Add applicable properties to usdhc3 The usdhc3 interface is connected to a soldered eMMC chip on all boards that import this dtsi. Adding these properties speeds up the device probe during boot. Signed-off-by: Robin van der Gracht Reviewed-by: Ahmad Fatoum Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-prti6q.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6qdl-prti6q.dtsi b/arch/arm/boot/dts/imx6qdl-prti6q.dtsi index 19578f660b09..f0db0d4471f4 100644 --- a/arch/arm/boot/dts/imx6qdl-prti6q.dtsi +++ b/arch/arm/boot/dts/imx6qdl-prti6q.dtsi @@ -94,6 +94,9 @@ pinctrl-0 = <&pinctrl_usdhc3>; bus-width = <8>; non-removable; + no-1-8-v; + no-sd; + no-sdio; status = "okay"; }; -- cgit v1.2.3 From 3120910a099bcd8411ba92b7397fa9f4409278bd Mon Sep 17 00:00:00 2001 From: Serge Semin Date: Fri, 24 Jun 2022 17:16:20 +0300 Subject: ARM: dts: stih407-family: Harmonize DWC USB3 DT nodes name In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin Acked-by: Krzysztof Kozlowski Reviewed-by: Patrice Chotard Link: https://lore.kernel.org/r/20220624141622.7149-5-Sergey.Semin@baikalelectronics.ru Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/stih407-family.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 33cf54cb46cc..5ebb77947fd9 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -725,7 +725,7 @@ status = "disabled"; - dwc3: dwc3@9900000 { + dwc3: usb@9900000 { compatible = "snps,dwc3"; reg = <0x09900000 0x100000>; interrupts = ; -- cgit v1.2.3 From ae25b445914a754a74133021d39fc51261493ac8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:41:37 +0200 Subject: ARM: dts: ti: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204139.831895-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/am335x-boneblack-wireless.dts | 2 +- arch/arm/boot/dts/am335x-boneblue.dts | 2 +- arch/arm/boot/dts/am335x-bonegreen-wireless.dts | 2 +- arch/arm/boot/dts/am335x-cm-t335.dts | 4 ++-- .../arm/boot/dts/am335x-sancloud-bbe-extended-wifi.dts | 2 +- arch/arm/boot/dts/am3517-evm-ui.dtsi | 6 +++--- arch/arm/boot/dts/am3874-iceboard.dts | 4 ++-- arch/arm/boot/dts/am437x-l4.dtsi | 2 +- arch/arm/boot/dts/da850-evm.dts | 18 +++++++++--------- arch/arm/boot/dts/da850.dtsi | 12 ++++++------ arch/arm/boot/dts/dm8148-evm.dts | 2 +- arch/arm/boot/dts/dm8168-evm.dts | 2 +- arch/arm/boot/dts/dra62x-j5eco-evm.dts | 2 +- arch/arm/boot/dts/dra76x.dtsi | 6 +++--- 14 files changed, 33 insertions(+), 33 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts index c72b09ab8da0..207d2b63e0eb 100644 --- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts +++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts @@ -19,7 +19,7 @@ regulator-name = "wlan-en-regulator"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - startup-delay-us= <70000>; + startup-delay-us = <70000>; /* WL_EN */ gpio = <&gpio3 9 0>; diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts index 147c00de3795..34579e98636e 100644 --- a/arch/arm/boot/dts/am335x-boneblue.dts +++ b/arch/arm/boot/dts/am335x-boneblue.dts @@ -106,7 +106,7 @@ regulator-name = "wlan-en-regulator"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - startup-delay-us= <70000>; + startup-delay-us = <70000>; /* WL_EN */ gpio = <&gpio3 9 0>; diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts index 215f279e476b..d388cffa1a4d 100644 --- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts +++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts @@ -18,7 +18,7 @@ regulator-name = "wlan-en-regulator"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - startup-delay-us= <70000>; + startup-delay-us = <70000>; /* WL_EN */ gpio = <&gpio0 26 0>; diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts index d9f003d886bf..993b13420699 100644 --- a/arch/arm/boot/dts/am335x-cm-t335.dts +++ b/arch/arm/boot/dts/am335x-cm-t335.dts @@ -325,7 +325,7 @@ status = "okay"; tlv320aic23: codec@1a { compatible = "ti,tlv320aic23"; reg = <0x1a>; - #sound-dai-cells= <0>; + #sound-dai-cells = <0>; status = "okay"; }; }; @@ -491,7 +491,7 @@ status = "okay"; tx-num-evt = <1>; rx-num-evt = <1>; - #sound-dai-cells= <0>; + #sound-dai-cells = <0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-extended-wifi.dts b/arch/arm/boot/dts/am335x-sancloud-bbe-extended-wifi.dts index 246a1a9b3e44..a2676d10c24a 100644 --- a/arch/arm/boot/dts/am335x-sancloud-bbe-extended-wifi.dts +++ b/arch/arm/boot/dts/am335x-sancloud-bbe-extended-wifi.dts @@ -23,7 +23,7 @@ regulator-name = "wlan-en-regulator"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - startup-delay-us= <100000>; + startup-delay-us = <100000>; }; }; diff --git a/arch/arm/boot/dts/am3517-evm-ui.dtsi b/arch/arm/boot/dts/am3517-evm-ui.dtsi index 7d8f32bf70db..5b7b291fc477 100644 --- a/arch/arm/boot/dts/am3517-evm-ui.dtsi +++ b/arch/arm/boot/dts/am3517-evm-ui.dtsi @@ -137,14 +137,14 @@ tlv320aic23_1: codec@1a { compatible = "ti,tlv320aic23"; reg = <0x1a>; - #sound-dai-cells= <0>; + #sound-dai-cells = <0>; status = "okay"; }; tlv320aic23_2: codec@1b { compatible = "ti,tlv320aic23"; reg = <0x1b>; - #sound-dai-cells= <0>; + #sound-dai-cells = <0>; status = "okay"; }; }; @@ -154,7 +154,7 @@ tlv320aic23_3: codec@1a { compatible = "ti,tlv320aic23"; reg = <0x1a>; - #sound-dai-cells= <0>; + #sound-dai-cells = <0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/am3874-iceboard.dts b/arch/arm/boot/dts/am3874-iceboard.dts index c9323d1df303..d039af879367 100644 --- a/arch/arm/boot/dts/am3874-iceboard.dts +++ b/arch/arm/boot/dts/am3874-iceboard.dts @@ -213,7 +213,7 @@ u48: pca9575@22 { compatible = "nxp,pca9575"; - reg=<0x22>; + reg = <0x22>; gpio-controller; #gpio-cells = <2>; @@ -232,7 +232,7 @@ u59: pca9575@23 { compatible = "nxp,pca9575"; - reg=<0x23>; + reg = <0x23>; gpio-controller; #gpio-cells = <2>; gpio-line-names = diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi index 8f2268c02778..415210b034ef 100644 --- a/arch/arm/boot/dts/am437x-l4.dtsi +++ b/arch/arm/boot/dts/am437x-l4.dtsi @@ -2407,7 +2407,7 @@ adc { #io-channel-cells = <1>; - compatible ="ti,am4372-adc"; + compatible = "ti,am4372-adc"; }; }; }; diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts index e9aecac4f5b5..1fdd9a249165 100644 --- a/arch/arm/boot/dts/da850-evm.dts +++ b/arch/arm/boot/dts/da850-evm.dts @@ -52,15 +52,15 @@ enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */ panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <16>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; + ac-bias = <255>; + ac-bias-intrpt = <0>; + dma-burst-sz = <16>; + bpp = <16>; + fdd = <0x80>; + sync-edge = <0>; + sync-ctrl = <1>; + raster-order = <0>; + fifo-th = <0>; }; display-timings { diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 0386376fa486..e46e4d22db39 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -419,7 +419,7 @@ edma0: edma@0 { compatible = "ti,edma3-tpcc"; /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */ - reg = <0x0 0x8000>; + reg = <0x0 0x8000>; reg-names = "edma3_cc"; interrupts = <11 12>; interrupt-names = "edma3_ccint", "edma3_ccerrint"; @@ -430,14 +430,14 @@ }; edma0_tptc0: tptc@8000 { compatible = "ti,edma3-tptc"; - reg = <0x8000 0x400>; + reg = <0x8000 0x400>; interrupts = <13>; interrupt-names = "edm3_tcerrint"; power-domains = <&psc0 1>; }; edma0_tptc1: tptc@8400 { compatible = "ti,edma3-tptc"; - reg = <0x8400 0x400>; + reg = <0x8400 0x400>; interrupts = <32>; interrupt-names = "edm3_tcerrint"; power-domains = <&psc0 2>; @@ -445,7 +445,7 @@ edma1: edma@230000 { compatible = "ti,edma3-tpcc"; /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */ - reg = <0x230000 0x8000>; + reg = <0x230000 0x8000>; reg-names = "edma3_cc"; interrupts = <93 94>; interrupt-names = "edma3_ccint", "edma3_ccerrint"; @@ -456,7 +456,7 @@ }; edma1_tptc0: tptc@238000 { compatible = "ti,edma3-tptc"; - reg = <0x238000 0x400>; + reg = <0x238000 0x400>; interrupts = <95>; interrupt-names = "edm3_tcerrint"; power-domains = <&psc1 21>; @@ -672,7 +672,7 @@ cppi41dma: dma-controller@201000 { compatible = "ti,da830-cppi41"; - reg = <0x201000 0x1000 + reg = <0x201000 0x1000 0x202000 0x1000 0x204000 0x4000>; reg-names = "controller", diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts index 8ef48c00f98d..fe3f9a970b18 100644 --- a/arch/arm/boot/dts/dm8148-evm.dts +++ b/arch/arm/boot/dts/dm8148-evm.dts @@ -51,7 +51,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,mt29f2g16aadwp"; + linux,mtd-name = "micron,mt29f2g16aadwp"; #address-cells = <1>; #size-cells = <1>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts index 778796c10af8..244a957f9ba3 100644 --- a/arch/arm/boot/dts/dm8168-evm.dts +++ b/arch/arm/boot/dts/dm8168-evm.dts @@ -119,7 +119,7 @@ nand@0,0 { compatible = "ti,omap2-nand"; - linux,mtd-name= "micron,mt29f2g16aadwp"; + linux,mtd-name = "micron,mt29f2g16aadwp"; reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ diff --git a/arch/arm/boot/dts/dra62x-j5eco-evm.dts b/arch/arm/boot/dts/dra62x-j5eco-evm.dts index c16e183822be..577114c4c20a 100644 --- a/arch/arm/boot/dts/dra62x-j5eco-evm.dts +++ b/arch/arm/boot/dts/dra62x-j5eco-evm.dts @@ -51,7 +51,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,mt29f2g16aadwp"; + linux,mtd-name = "micron,mt29f2g16aadwp"; #address-cells = <1>; #size-cells = <1>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index bc4ae91cba16..931db7932c11 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -90,8 +90,8 @@ clocks = <&dpll_gmac_x2_ck>; ti,max-div = <63>; reg = <0x03fc>; - ti,bit-shift=<20>; - ti,latch-bit=<26>; + ti,bit-shift = <20>; + ti,latch-bit = <26>; assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>; assigned-clock-rates = <80000000>; }; @@ -102,7 +102,7 @@ clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>; reg = <0x3fc>; ti,bit-shift = <29>; - ti,latch-bit=<26>; + ti,latch-bit = <26>; assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>; }; -- cgit v1.2.3 From eef3af89b6b66ad61df636464ce92f5deabbc4a4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:40:44 +0200 Subject: ARM: dts: omap: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220526204044.831656-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/omap2420-h4.dts | 2 +- arch/arm/boot/dts/omap3-evm-37xx.dts | 2 +- arch/arm/boot/dts/omap3-evm.dts | 2 +- arch/arm/boot/dts/omap3-gta04.dtsi | 2 +- arch/arm/boot/dts/omap3-igep.dtsi | 2 +- arch/arm/boot/dts/omap3-ldp.dts | 6 +++--- arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 2 +- arch/arm/boot/dts/omap3-n900.dts | 4 ++-- arch/arm/boot/dts/omap3-n950-n9.dtsi | 4 ++-- arch/arm/boot/dts/omap3-overo-base.dtsi | 2 +- arch/arm/boot/dts/omap3-pandora-common.dtsi | 2 +- arch/arm/boot/dts/omap3430-sdp.dts | 6 +++--- arch/arm/boot/dts/omap5-l4.dtsi | 2 +- 13 files changed, 19 insertions(+), 19 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index af964f139abf..5acf5dd87c59 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -21,7 +21,7 @@ nor@0,0 { compatible = "cfi-flash"; - linux,mtd-name= "intel,ge28f256l18b85"; + linux,mtd-name = "intel,ge28f256l18b85"; #address-cells = <1>; #size-cells = <1>; reg = <0 0 0x04000000>; diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts index c9332195d096..abd403c228c7 100644 --- a/arch/arm/boot/dts/omap3-evm-37xx.dts +++ b/arch/arm/boot/dts/omap3-evm-37xx.dts @@ -60,7 +60,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "hynix,h8kds0un0mer-4em"; + linux,mtd-name = "hynix,h8kds0un0mer-4em"; nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index 5cc0cf7cd16c..f95eea63b355 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -60,7 +60,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,mt29f2g16abdhc"; + linux,mtd-name = "micron,mt29f2g16abdhc"; nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 0365f06165e9..28a6a9345be5 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -127,7 +127,7 @@ spi-cpol; spi-cpha; - backlight= <&backlight>; + backlight = <&backlight>; label = "lcd"; port { lcd_in: endpoint { diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 99f5585097a1..219202610463 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -111,7 +111,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,mt29c4g96maz"; + linux,mtd-name = "micron,mt29c4g96maz"; nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts index 9c6a92724590..36fc8805e0c1 100644 --- a/arch/arm/boot/dts/omap3-ldp.dts +++ b/arch/arm/boot/dts/omap3-ldp.dts @@ -103,7 +103,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,nand"; + linux,mtd-name = "micron,nand"; nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; @@ -215,11 +215,11 @@ }; &mmc2 { - status="disabled"; + status = "disabled"; }; &mmc3 { - status="disabled"; + status = "disabled"; }; &omap3_pmx_core { diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi index 73d477898ec2..c595afe4181d 100644 --- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi +++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi @@ -372,7 +372,7 @@ gpmc,device-width = <2>; gpmc,wait-pin = <0>; gpmc,wait-monitoring-ns = <0>; - gpmc,burst-length= <4>; + gpmc,burst-length = <4>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <100>; gpmc,cs-wr-off-ns = <100>; diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index d40c3d2c4914..dd7971556449 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -568,8 +568,8 @@ }; &twl_gpio { - ti,pullups = <0x0>; - ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ + ti,pullups = <0x0>; + ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ }; &i2c2 { diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi index 7dde9fbb06d3..f68da828b050 100644 --- a/arch/arm/boot/dts/omap3-n950-n9.dtsi +++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi @@ -162,8 +162,8 @@ }; &twl_gpio { - ti,pullups = <0x000001>; /* BIT(0) */ - ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */ + ti,pullups = <0x000001>; /* BIT(0) */ + ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */ }; &vdac { diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi index 006a6d97231c..adc714c39825 100644 --- a/arch/arm/boot/dts/omap3-overo-base.dtsi +++ b/arch/arm/boot/dts/omap3-overo-base.dtsi @@ -222,7 +222,7 @@ nand@0,0 { compatible = "ti,omap2-nand"; - linux,mtd-name= "micron,mt29c4g96maz"; + linux,mtd-name = "micron,mt29c4g96maz"; reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi index 37608af6c07f..559853764487 100644 --- a/arch/arm/boot/dts/omap3-pandora-common.dtsi +++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi @@ -666,7 +666,7 @@ lcd: lcd@1 { reg = <1>; /* CS1 */ - compatible = "tpo,td043mtea1"; + compatible = "tpo,td043mtea1"; spi-max-frequency = <100000>; spi-cpol; spi-cpha; diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index 7d530ae3483b..258ecd9e4519 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -53,7 +53,7 @@ nor@0,0 { compatible = "cfi-flash"; - linux,mtd-name= "intel,pf48f6000m0y1be"; + linux,mtd-name = "intel,pf48f6000m0y1be"; #address-cells = <1>; #size-cells = <1>; reg = <0 0 0x08000000>; @@ -105,7 +105,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ - linux,mtd-name= "micron,mt29f1g08abb"; + linux,mtd-name = "micron,mt29f1g08abb"; #address-cells = <1>; #size-cells = <1>; ti,nand-ecc-opt = "sw"; @@ -148,7 +148,7 @@ }; onenand@2,0 { - linux,mtd-name= "samsung,kfm2g16q2m-deb8"; + linux,mtd-name = "samsung,kfm2g16q2m-deb8"; #address-cells = <1>; #size-cells = <1>; compatible = "ti,omap2-onenand"; diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi index 06cc3a19ddaa..3b505fe415ed 100644 --- a/arch/arm/boot/dts/omap5-l4.dtsi +++ b/arch/arm/boot/dts/omap5-l4.dtsi @@ -482,7 +482,7 @@ clocks = <&usb_phy_cm_clk32k>, <&sys_clkin>, <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>; - clock-names = "wkupclk", + clock-names = "wkupclk", "sysclk", "refclk"; #phy-cells = <0>; -- cgit v1.2.3 From 41340053cc72180e9095ca02418a5ab80794983c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:06 -0700 Subject: ARM: dts: marvell: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-13-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/armada-370-c200-v2.dts | 8 ++++---- arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi | 6 +++--- arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi | 6 +++--- arch/arm/boot/dts/armada-381-netgear-gs110emx.dts | 2 +- arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi | 4 ++-- arch/arm/boot/dts/armada-385-linksys.dtsi | 4 ++-- arch/arm/boot/dts/armada-388-clearfog-base.dts | 2 +- arch/arm/boot/dts/armada-388-clearfog.dts | 2 +- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 4 ++-- arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 6 +++--- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 4 ++-- 11 files changed, 24 insertions(+), 24 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/armada-370-c200-v2.dts b/arch/arm/boot/dts/armada-370-c200-v2.dts index 1a4a09bdde63..84d40e1d70ef 100644 --- a/arch/arm/boot/dts/armada-370-c200-v2.dts +++ b/arch/arm/boot/dts/armada-370-c200-v2.dts @@ -75,25 +75,25 @@ pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; - usb1 { + button-usb1 { label = "USB1 Button"; linux,code = ; gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; }; - usb2 { + button-usb2 { label = "USB2 Button"; linux,code = ; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi index b52634ecf1d9..cf7bffdd1c21 100644 --- a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi +++ b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi @@ -111,19 +111,19 @@ #address-cells = <1>; #size-cells = <0>; - power { + button-power { label = "Power button"; linux,code = ; gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; debounce-interval = <100>; }; - backup { + button-backup { label = "Backup button"; linux,code = ; gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; debounce-interval = <100>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi index 0abac5ffe45a..6c33e3ba4ffb 100644 --- a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi +++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi @@ -86,19 +86,19 @@ #address-cells = <1>; #size-cells = <0>; - power { + button-power { label = "Power button"; linux,code = ; gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; debounce-interval = <100>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; debounce-interval = <100>; }; - button { + button-usb { label = "USB VBUS error"; linux,code = ; gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/armada-381-netgear-gs110emx.dts index 396172067f6a..095df5567c93 100644 --- a/arch/arm/boot/dts/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/armada-381-netgear-gs110emx.dts @@ -24,7 +24,7 @@ pinctrl-0 = <&front_button_pins>; pinctrl-names = "default"; - factory_default { + key-factory-default { label = "Factory Default"; gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi index 10ad46f29393..d1452a04e904 100644 --- a/arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi @@ -256,14 +256,14 @@ pinctrl-0 = <&cf_gtr_rear_button_pins &cf_gtr_front_button_pins>; pinctrl-names = "default"; - button_0 { + button-0 { label = "Rear Button"; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; linux,can-disable; linux,code = ; }; - button_1 { + button-1 { label = "Front Button"; gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; linux,can-disable; diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi index fb9c8a0b241c..116aca5e688f 100644 --- a/arch/arm/boot/dts/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi @@ -53,13 +53,13 @@ pinctrl-0 = <&gpio_keys_pins>; pinctrl-names = "default"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Factory Reset Button"; linux,code = ; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-388-clearfog-base.dts b/arch/arm/boot/dts/armada-388-clearfog-base.dts index 53b4bd35522a..f7daa3bc707e 100644 --- a/arch/arm/boot/dts/armada-388-clearfog-base.dts +++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts @@ -19,7 +19,7 @@ pinctrl-0 = <&rear_button_pins>; pinctrl-names = "default"; - button_0 { + button-0 { /* The rear SW3 button */ label = "Rear Button"; gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts index 4140a5303b48..95299167dcf5 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts @@ -35,7 +35,7 @@ pinctrl-0 = <&rear_button_pins>; pinctrl-names = "default"; - button_0 { + button-0 { /* The rear SW3 button */ label = "Rear Button"; gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index 3e77b4337802..86a0ad9bd5cc 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -69,14 +69,14 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&keys_pin>; pinctrl-names = "default"; - reset { + button-reset { label = "Factory Reset Button"; linux,code = ; gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts index 36932e3b781a..51b2eb8bb4fd 100644 --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts @@ -172,20 +172,20 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&keys_pin>; pinctrl-names = "default"; - wps { + button-wps { label = "WPS"; linux,code = ; gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Factory Reset Button"; linux,code = ; gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 0efcc166dabf..ff698d6ebb87 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -97,12 +97,12 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - init { + button-init { label = "Init Button"; linux,code = ; gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From 8b0848f57769ae9ee4b8104a5ba7c7ee98d1fd35 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:07 -0700 Subject: ARM: dts: marvell: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-14-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/armada-370-rd.dts | 2 -- arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi | 2 -- arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi | 2 -- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 2 -- arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 2 -- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 2 -- 6 files changed, 12 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index c910d157a686..6ba7699b69ed 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -84,8 +84,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button { label = "Software Button"; linux,code = ; diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi index cf7bffdd1c21..866b8630d407 100644 --- a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi +++ b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi @@ -108,8 +108,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-power { label = "Power button"; diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi index 6c33e3ba4ffb..702a85af2078 100644 --- a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi +++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi @@ -83,8 +83,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-power { label = "Power button"; diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index 86a0ad9bd5cc..5a74197be0ad 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -71,8 +71,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&keys_pin>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts index 51b2eb8bb4fd..622ac40dd164 100644 --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts @@ -174,8 +174,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&keys_pin>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index ff698d6ebb87..1ecf72a61bca 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -99,8 +99,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-init { label = "Init Button"; -- cgit v1.2.3 From b1c9af5fec442b164849dc6802ec3bdb4b0c4768 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:25 -0700 Subject: ARM: dts: omap: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-32-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/am335x-evm.dts | 6 +++--- arch/arm/boot/dts/am335x-shc.dts | 6 +++--- arch/arm/boot/dts/am3517-evm-ui.dtsi | 20 ++++++++++---------- arch/arm/boot/dts/am3517-evm.dts | 18 +++++++++--------- arch/arm/boot/dts/am437x-idk-evm.dts | 2 +- 5 files changed, 26 insertions(+), 26 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index b9745a2f0e4d..730898310641 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -92,20 +92,20 @@ 0x0201006c>; /* DOWN */ }; - gpio_keys: volume_keys0 { + gpio_keys: volume-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; autorepeat; - switch9 { + switch-9 { label = "volume-up"; linux,code = <115>; gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; wakeup-source; }; - switch10 { + switch-10 { label = "volume-down"; linux,code = <114>; gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts index 6b9877560741..c497200f9cb0 100644 --- a/arch/arm/boot/dts/am335x-shc.dts +++ b/arch/arm/boot/dts/am335x-shc.dts @@ -36,10 +36,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - back_button { + back-button { label = "Back Button"; gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; linux,code = ; @@ -47,7 +47,7 @@ wakeup-source; }; - front_button { + front-button { label = "Front Button"; gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/am3517-evm-ui.dtsi b/arch/arm/boot/dts/am3517-evm-ui.dtsi index 5b7b291fc477..75ad42179aee 100644 --- a/arch/arm/boot/dts/am3517-evm-ui.dtsi +++ b/arch/arm/boot/dts/am3517-evm-ui.dtsi @@ -70,61 +70,61 @@ compatible = "gpio-keys-polled"; poll-interval = <100>; - record { + key-record { label = "Record"; /* linux,code = ; */ gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>; }; - play { + key-play { label = "Play"; linux,code = ; gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>; }; - Stop { + key-stop { label = "Stop"; linux,code = ; gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>; }; - fwd { + key-fwd { label = "FWD"; linux,code = ; gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>; }; - rwd { + key-rwd { label = "RWD"; linux,code = ; gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>; }; - shift { + key-shift { label = "Shift"; linux,code = ; gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>; }; - Mode { + key-mode { label = "Mode"; linux,code = ; gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>; }; - Menu { + key-menu { label = "Menu"; linux,code = ; gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>; }; - Up { + key-up { label = "Up"; linux,code = ; gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>; }; - Down { + key-down { label = "Down"; linux,code = ; gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts index c8b80f156ec9..35b653014f2b 100644 --- a/arch/arm/boot/dts/am3517-evm.dts +++ b/arch/arm/boot/dts/am3517-evm.dts @@ -37,55 +37,55 @@ compatible = "gpio-keys-polled"; poll-interval = <100>; - user_pb { + button-user { label = "User Push Button"; linux,code = ; gpios = <&tca6416 5 GPIO_ACTIVE_LOW>; }; - user_sw_1 { + switch-1 { label = "User Switch 1"; linux,code = ; gpios = <&tca6416 8 GPIO_ACTIVE_LOW>; }; - user_sw_2 { + switch-2 { label = "User Switch 2"; linux,code = ; gpios = <&tca6416 9 GPIO_ACTIVE_LOW>; }; - user_sw_3 { + switch-3 { label = "User Switch 3"; linux,code = ; gpios = <&tca6416 10 GPIO_ACTIVE_LOW>; }; - user_sw_4 { + switch-4 { label = "User Switch 4"; linux,code = ; gpios = <&tca6416 11 GPIO_ACTIVE_LOW>; }; - user_sw_5 { + switch-5 { label = "User Switch 5"; linux,code = ; gpios = <&tca6416 12 GPIO_ACTIVE_LOW>; }; - user_sw_6 { + switch-6 { label = "User Switch 6"; linux,code = ; gpios = <&tca6416 13 GPIO_ACTIVE_LOW>; }; - user_sw_7 { + switch-7 { label = "User Switch 7"; linux,code = ; gpios = <&tca6416 14 GPIO_ACTIVE_LOW>; }; - user_sw_8 { + switch-8 { label = "User Switch 8"; linux,code = ; gpios = <&tca6416 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index 5a74b83145cf..d46cd721f27e 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -98,7 +98,7 @@ vin-supply = <&v1_5dreg>; }; - gpio_keys: gpio_keys { + gpio_keys: gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pins_default>; -- cgit v1.2.3 From 54ab5f367142577b8280f5b03eeb36616980cd68 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:26 -0700 Subject: ARM: dts: omap: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-33-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/am335x-evm.dts | 2 -- arch/arm/boot/dts/am335x-guardian.dts | 2 -- arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi | 4 +--- arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi | 4 +--- arch/arm/boot/dts/am335x-pcm-953.dtsi | 4 ++-- arch/arm/boot/dts/am335x-pepper.dts | 8 +++----- arch/arm/boot/dts/am437x-idk-evm.dts | 4 +--- 7 files changed, 8 insertions(+), 20 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 730898310641..25c6ac9913d2 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -94,8 +94,6 @@ gpio_keys: volume-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; switch-9 { diff --git a/arch/arm/boot/dts/am335x-guardian.dts b/arch/arm/boot/dts/am335x-guardian.dts index 1a7e187b1953..f6356266564c 100644 --- a/arch/arm/boot/dts/am335x-guardian.dts +++ b/arch/arm/boot/dts/am335x-guardian.dts @@ -33,8 +33,6 @@ pinctrl-names = "default"; pinctrl-0 = <&guardian_button_pins>; compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; select-button { label = "guardian-select-button"; diff --git a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi index 92a0e98ec231..7b40ca9483ca 100644 --- a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi +++ b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi @@ -166,10 +166,8 @@ &buttons { pinctrl-names = "default"; pinctrl-0 = <&push_button_pins>; - #address-cells = <1>; - #size-cells = <0>; - button@0 { + button-0 { label = "push_button"; linux,code = <0x100>; gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi b/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi index e7e439a0630a..e0364adb8393 100644 --- a/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi +++ b/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi @@ -378,10 +378,8 @@ &buttons { pinctrl-names = "default"; pinctrl-0 = <&push_button_pins>; - #address-cells = <1>; - #size-cells = <0>; - button@0 { + button-0 { label = "push_button"; linux,code = <0x100>; gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am335x-pcm-953.dtsi b/arch/arm/boot/dts/am335x-pcm-953.dtsi index 124026fa0d09..dae448040a97 100644 --- a/arch/arm/boot/dts/am335x-pcm-953.dtsi +++ b/arch/arm/boot/dts/am335x-pcm-953.dtsi @@ -54,14 +54,14 @@ pinctrl-names = "default"; pinctrl-0 = <&user_buttons_pins>; - button@0 { + button-0 { label = "home"; linux,code = ; gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; wakeup-source; }; - button@1 { + button-1 { label = "menu"; linux,code = ; gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts index b5e88e627bc1..8691eec33b61 100644 --- a/arch/arm/boot/dts/am335x-pepper.dts +++ b/arch/arm/boot/dts/am335x-pepper.dts @@ -596,24 +596,22 @@ &buttons { pinctrl-names = "default"; pinctrl-0 = <&user_buttons_pins>; - #address-cells = <1>; - #size-cells = <0>; - button0 { + button-0 { label = "home"; linux,code = ; gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; wakeup-source; }; - button1 { + button-1 { label = "menu"; linux,code = ; gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; wakeup-source; }; - buttons2 { + button-2 { label = "power"; linux,code = ; gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index d46cd721f27e..123a95f87554 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -102,10 +102,8 @@ compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pins_default>; - #address-cells = <1>; - #size-cells = <0>; - switch0 { + switch-0 { label = "power-button"; linux,code = ; gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; -- cgit v1.2.3 From 17413b15ed9398e5d7f01f0da0da6043bb8392c7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:31 -0700 Subject: ARM: dts: at91: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220616005333.18491-38-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/at91-foxg20.dts | 4 ++-- arch/arm/boot/dts/at91-gatwick.dts | 2 +- arch/arm/boot/dts/at91-kizbox.dts | 6 +++--- arch/arm/boot/dts/at91-kizbox2-common.dtsi | 8 ++++---- arch/arm/boot/dts/at91-kizbox3-hs.dts | 12 ++++++------ arch/arm/boot/dts/at91-kizboxmini-common.dtsi | 4 ++-- arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 2 +- arch/arm/boot/dts/at91-qil_a9260.dts | 2 +- arch/arm/boot/dts/at91-sam9x60ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d2_icp.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d4_xplained.dts | 4 ++-- arch/arm/boot/dts/at91-sama5d4ek.dts | 4 ++-- arch/arm/boot/dts/at91-sama7g5ek.dts | 4 ++-- arch/arm/boot/dts/at91-wb45n.dts | 2 +- arch/arm/boot/dts/at91-wb50n.dts | 2 +- arch/arm/boot/dts/at91sam9260ek.dts | 6 +++--- arch/arm/boot/dts/at91sam9261ek.dts | 10 +++++----- arch/arm/boot/dts/at91sam9263ek.dts | 6 +++--- arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 6 +++--- arch/arm/boot/dts/at91sam9g25-gardena-smart-gateway.dts | 2 +- arch/arm/boot/dts/at91sam9m10g45ek.dts | 16 ++++++++-------- arch/arm/boot/dts/at91sam9n12ek.dts | 4 ++-- arch/arm/boot/dts/at91sam9rlek.dts | 6 +++--- 28 files changed, 70 insertions(+), 70 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91-foxg20.dts b/arch/arm/boot/dts/at91-foxg20.dts index 7edf057047f8..9dfd5de808d1 100644 --- a/arch/arm/boot/dts/at91-foxg20.dts +++ b/arch/arm/boot/dts/at91-foxg20.dts @@ -155,10 +155,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - btn { + button { label = "Button"; gpios = <&pioC 4 GPIO_ACTIVE_LOW>; linux,code = <0x103>; diff --git a/arch/arm/boot/dts/at91-gatwick.dts b/arch/arm/boot/dts/at91-gatwick.dts index 5a81cab5fc3a..2c718cf84d7b 100644 --- a/arch/arm/boot/dts/at91-gatwick.dts +++ b/arch/arm/boot/dts/at91-gatwick.dts @@ -13,7 +13,7 @@ model = "Laird Workgroup Bridge 50N - Project Gatwick"; compatible = "laird,gatwick", "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; autorepeat; diff --git a/arch/arm/boot/dts/at91-kizbox.dts b/arch/arm/boot/dts/at91-kizbox.dts index 3b8812fcd854..87e972eb2ba6 100644 --- a/arch/arm/boot/dts/at91-kizbox.dts +++ b/arch/arm/boot/dts/at91-kizbox.dts @@ -28,19 +28,19 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - reset { + button-reset { label = "PB_RST"; gpios = <&pioB 30 GPIO_ACTIVE_HIGH>; linux,code = <0x100>; wakeup-source; }; - user { + button-user { label = "PB_USER"; gpios = <&pioB 31 GPIO_ACTIVE_HIGH>; linux,code = <0x101>; diff --git a/arch/arm/boot/dts/at91-kizbox2-common.dtsi b/arch/arm/boot/dts/at91-kizbox2-common.dtsi index c08834ddf07b..ed7146e23147 100644 --- a/arch/arm/boot/dts/at91-kizbox2-common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox2-common.dtsi @@ -31,26 +31,26 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - prog { + button-prog { label = "PB_PROG"; gpios = <&pioE 27 GPIO_ACTIVE_LOW>; linux,code = <0x102>; wakeup-source; }; - reset { + button-reset { label = "PB_RST"; gpios = <&pioE 29 GPIO_ACTIVE_LOW>; linux,code = <0x100>; wakeup-source; }; - user { + button-user { label = "PB_USER"; gpios = <&pioE 31 GPIO_ACTIVE_HIGH>; linux,code = <0x101>; diff --git a/arch/arm/boot/dts/at91-kizbox3-hs.dts b/arch/arm/boot/dts/at91-kizbox3-hs.dts index 224f4d5ac4df..7075df6549e9 100644 --- a/arch/arm/boot/dts/at91-kizbox3-hs.dts +++ b/arch/arm/boot/dts/at91-kizbox3-hs.dts @@ -55,7 +55,7 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default" , "default", "default", "default", "default" ; @@ -68,35 +68,35 @@ &pinctrl_pio_zbe_rst>; pinctrl-4 = <&pinctrl_pio_input>; - SW1 { + switch-1 { label = "SW1"; gpios = <&pioA PIN_PA29 GPIO_ACTIVE_LOW>; linux,code = <0x101>; wakeup-source; }; - SW2 { + switch-2 { label = "SW2"; gpios = <&pioA PIN_PA18 GPIO_ACTIVE_LOW>; linux,code = <0x102>; wakeup-source; }; - SW3 { + switch-3 { label = "SW3"; gpios = <&pioA PIN_PA22 GPIO_ACTIVE_LOW>; linux,code = <0x103>; wakeup-source; }; - SW7 { + switch-7 { label = "SW7"; gpios = <&pioA PIN_PA26 GPIO_ACTIVE_LOW>; linux,code = <0x107>; wakeup-source; }; - SW8 { + switch-8 { label = "SW8"; gpios = <&pioA PIN_PA24 GPIO_ACTIVE_LOW>; linux,code = <0x108>; diff --git a/arch/arm/boot/dts/at91-kizboxmini-common.dtsi b/arch/arm/boot/dts/at91-kizboxmini-common.dtsi index 9c622892c692..8fb08e6fad7a 100644 --- a/arch/arm/boot/dts/at91-kizboxmini-common.dtsi +++ b/arch/arm/boot/dts/at91-kizboxmini-common.dtsi @@ -39,14 +39,14 @@ #address-cells = <1>; #size-cells = <0>; - prog { + key-prog { label = "PB_PROG"; gpios = <&pioC 17 GPIO_ACTIVE_LOW>; linux,code = <0x102>; wakeup-source; }; - reset { + key-reset { label = "PB_RST"; gpios = <&pioC 16 GPIO_ACTIVE_LOW>; linux,code = <0x100>; diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts index 4f123477e631..f71377c9b757 100644 --- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts +++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts @@ -18,7 +18,7 @@ gpio-keys { compatible = "gpio-keys"; - wakeup { + key-wakeup { label = "Wakeup"; linux,code = <10>; wakeup-source; diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts b/arch/arm/boot/dts/at91-qil_a9260.dts index 969d990767fc..d09b3d15a828 100644 --- a/arch/arm/boot/dts/at91-qil_a9260.dts +++ b/arch/arm/boot/dts/at91-qil_a9260.dts @@ -201,7 +201,7 @@ #address-cells = <1>; #size-cells = <0>; - user_pb { + button-user { label = "user_pb"; gpios = <&pioB 10 GPIO_ACTIVE_LOW>; linux,code = <28>; diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 886bc855daa4..70e26df473c1 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -76,13 +76,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; status = "okay"; - sw1 { + button-1 { label = "SW1"; gpios = <&pioD 18 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index b1c390ae5f98..0dc6ca377b0c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -478,13 +478,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - pb4 { + button { label = "USER"; gpios = <&pioA PIN_PA29 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index 48e85fc3d998..9219a51f1155 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -26,14 +26,14 @@ stdout-path = "serial0:115200n8"; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; status = "okay"; - sw4 { + button-1 { label = "USER BUTTON"; gpios = <&pioA PIN_PB2 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 5ff692ea8a20..4fab0b13baa5 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -42,14 +42,14 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; status = "okay"; - sw4 { + button-1 { label = "USER_PB1"; gpios = <&pioA PIN_PD0 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 64c3e63de179..d8b3cc20f17e 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -394,13 +394,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - bp1 { + button-1 { label = "PB_USER"; gpios = <&pioA PIN_PA10 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 5959bf0c2fa3..aec70fc49583 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -703,13 +703,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - bp1 { + button { label = "PB_USER"; gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index a49c2966b41e..1f42a6a981bf 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -372,13 +372,13 @@ regulator-always-on; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio>; - bp3 { + button { label = "PB_USER"; gpios = <&pioE 29 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts index e519d2747936..f122f302f8e0 100644 --- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts @@ -242,13 +242,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio>; - pb_user1 { + button { label = "pb_user1"; gpios = <&pioE 8 GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts index 7017f626f362..fce4e93c6bee 100644 --- a/arch/arm/boot/dts/at91-sama5d4ek.dts +++ b/arch/arm/boot/dts/at91-sama5d4ek.dts @@ -269,13 +269,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio>; - pb_user1 { + button { label = "pb_user1"; gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; linux,code = <0x100>; diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 103544620fd7..de44da2e4aae 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -45,13 +45,13 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - bp1 { + button { label = "PB_USER"; gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts index 54d130c92185..3e46b29412d1 100644 --- a/arch/arm/boot/dts/at91-wb45n.dts +++ b/arch/arm/boot/dts/at91-wb45n.dts @@ -12,7 +12,7 @@ model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)"; compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9"; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts index 89f0f717f7ed..e2195bd3e4b4 100644 --- a/arch/arm/boot/dts/at91-wb50n.dts +++ b/arch/arm/boot/dts/at91-wb50n.dts @@ -13,7 +13,7 @@ model = "Laird Workgroup Bridge 50N - Atmel SAMA5D"; compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/at91sam9260ek.dts b/arch/arm/boot/dts/at91sam9260ek.dts index 6381088ba24f..bb72f050a4fe 100644 --- a/arch/arm/boot/dts/at91sam9260ek.dts +++ b/arch/arm/boot/dts/at91sam9260ek.dts @@ -144,17 +144,17 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - btn3 { + button-3 { label = "Button 3"; gpios = <&pioA 30 GPIO_ACTIVE_LOW>; linux,code = <0x103>; wakeup-source; }; - btn4 { + button-4 { label = "Button 4"; gpios = <&pioA 31 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts index 6fb4fe49cf1c..88869ca874d1 100644 --- a/arch/arm/boot/dts/at91sam9261ek.dts +++ b/arch/arm/boot/dts/at91sam9261ek.dts @@ -211,31 +211,31 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - button_0 { + button-0 { label = "button_0"; gpios = <&pioA 27 GPIO_ACTIVE_LOW>; linux,code = <256>; wakeup-source; }; - button_1 { + button-1 { label = "button_1"; gpios = <&pioA 26 GPIO_ACTIVE_LOW>; linux,code = <257>; wakeup-source; }; - button_2 { + button-2 { label = "button_2"; gpios = <&pioA 25 GPIO_ACTIVE_LOW>; linux,code = <258>; wakeup-source; }; - button_3 { + button-3 { label = "button_3"; gpios = <&pioA 24 GPIO_ACTIVE_LOW>; linux,code = <259>; diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts index e732565913a4..ce8baff6a9f4 100644 --- a/arch/arm/boot/dts/at91sam9263ek.dts +++ b/arch/arm/boot/dts/at91sam9263ek.dts @@ -232,17 +232,17 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - left_click { + button-left-click { label = "left_click"; gpios = <&pioC 5 GPIO_ACTIVE_LOW>; linux,code = <272>; wakeup-source; }; - right_click { + button-right-click { label = "right_click"; gpios = <&pioC 4 GPIO_ACTIVE_LOW>; linux,code = <273>; diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index 85c17dd1c8d5..60d61291f344 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi @@ -234,17 +234,17 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - btn3 { + button-3 { label = "Button 3"; gpios = <&pioA 30 GPIO_ACTIVE_LOW>; linux,code = <0x103>; wakeup-source; }; - btn4 { + button-4 { label = "Button 4"; gpios = <&pioA 31 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91sam9g25-gardena-smart-gateway.dts b/arch/arm/boot/dts/at91sam9g25-gardena-smart-gateway.dts index 7da70aeeb528..92f2c05c873f 100644 --- a/arch/arm/boot/dts/at91sam9g25-gardena-smart-gateway.dts +++ b/arch/arm/boot/dts/at91sam9g25-gardena-smart-gateway.dts @@ -23,7 +23,7 @@ gpio-keys { compatible = "gpio-keys"; - user_btn1 { + button { label = "USER_BTN1"; gpios = <&pioA 24 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index e5db198a87a8..7f45e81ca165 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts @@ -343,48 +343,48 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - left_click { + button-left-click { label = "left_click"; gpios = <&pioB 6 GPIO_ACTIVE_LOW>; linux,code = <272>; wakeup-source; }; - right_click { + button-right-click { label = "right_click"; gpios = <&pioB 7 GPIO_ACTIVE_LOW>; linux,code = <273>; wakeup-source; }; - left { + button-left { label = "Joystick Left"; gpios = <&pioB 14 GPIO_ACTIVE_LOW>; linux,code = <105>; }; - right { + button-right { label = "Joystick Right"; gpios = <&pioB 15 GPIO_ACTIVE_LOW>; linux,code = <106>; }; - up { + button-up { label = "Joystick Up"; gpios = <&pioB 16 GPIO_ACTIVE_LOW>; linux,code = <103>; }; - down { + button-down { label = "Joystick Down"; gpios = <&pioB 17 GPIO_ACTIVE_LOW>; linux,code = <108>; }; - enter { + button-enter { label = "Joystick Press"; gpios = <&pioB 18 GPIO_ACTIVE_LOW>; linux,code = <28>; diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index c905d7bfc771..4c644d4c6be7 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -226,10 +226,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - enter { + button-enter { label = "Enter"; gpios = <&pioB 3 GPIO_ACTIVE_LOW>; linux,code = <28>; diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts index ddaadfec6751..a57351270551 100644 --- a/arch/arm/boot/dts/at91sam9rlek.dts +++ b/arch/arm/boot/dts/at91sam9rlek.dts @@ -248,17 +248,17 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - right_click { + button-right-click { label = "right_click"; gpios = <&pioB 0 GPIO_ACTIVE_LOW>; linux,code = <273>; wakeup-source; }; - left_click { + button-left-click { label = "left_click"; gpios = <&pioB 1 GPIO_ACTIVE_LOW>; linux,code = <272>; -- cgit v1.2.3 From fa8cc83a3bffaa868b789a424d5573b7901edd7c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:32 -0700 Subject: ARM: dts: at91: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220616005333.18491-39-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/at91-kizbox.dts | 2 -- arch/arm/boot/dts/at91-kizbox2-common.dtsi | 2 -- arch/arm/boot/dts/at91-kizboxmini-common.dtsi | 2 -- arch/arm/boot/dts/at91-qil_a9260.dts | 2 -- arch/arm/boot/dts/at91-wb45n.dts | 5 +---- arch/arm/boot/dts/at91-wb50n.dts | 8 ++------ 6 files changed, 3 insertions(+), 18 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91-kizbox.dts b/arch/arm/boot/dts/at91-kizbox.dts index 87e972eb2ba6..307663b4eec2 100644 --- a/arch/arm/boot/dts/at91-kizbox.dts +++ b/arch/arm/boot/dts/at91-kizbox.dts @@ -30,8 +30,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-reset { label = "PB_RST"; diff --git a/arch/arm/boot/dts/at91-kizbox2-common.dtsi b/arch/arm/boot/dts/at91-kizbox2-common.dtsi index ed7146e23147..e5e21dff882f 100644 --- a/arch/arm/boot/dts/at91-kizbox2-common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox2-common.dtsi @@ -33,8 +33,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-prog { label = "PB_PROG"; diff --git a/arch/arm/boot/dts/at91-kizboxmini-common.dtsi b/arch/arm/boot/dts/at91-kizboxmini-common.dtsi index 8fb08e6fad7a..42640fe6b6d0 100644 --- a/arch/arm/boot/dts/at91-kizboxmini-common.dtsi +++ b/arch/arm/boot/dts/at91-kizboxmini-common.dtsi @@ -36,8 +36,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; key-prog { label = "PB_PROG"; diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts b/arch/arm/boot/dts/at91-qil_a9260.dts index d09b3d15a828..9d26f9996348 100644 --- a/arch/arm/boot/dts/at91-qil_a9260.dts +++ b/arch/arm/boot/dts/at91-qil_a9260.dts @@ -198,8 +198,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-user { label = "user_pb"; diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts index 3e46b29412d1..ef73f727f7bd 100644 --- a/arch/arm/boot/dts/at91-wb45n.dts +++ b/arch/arm/boot/dts/at91-wb45n.dts @@ -14,11 +14,8 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - irqbtn@18 { - reg = <18>; + button { label = "IRQBTN"; linux,code = <99>; gpios = <&pioB 18 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts index e2195bd3e4b4..ec2becf6133b 100644 --- a/arch/arm/boot/dts/at91-wb50n.dts +++ b/arch/arm/boot/dts/at91-wb50n.dts @@ -15,19 +15,15 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - btn0@10 { - reg = <10>; + button-0 { label = "BTNESC"; linux,code = <1>; /* ESC button */ gpios = <&pioA 10 GPIO_ACTIVE_LOW>; wakeup-source; }; - irqbtn@31 { - reg = <31>; + button-1 { label = "IRQBTN"; linux,code = <99>; /* SysReq button */ gpios = <&pioE 31 GPIO_ACTIVE_LOW>; -- cgit v1.2.3 From 592feeea113553be142680a25a9c0850daae3567 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:33 -0700 Subject: ARM: dts: at91: drop unneeded status from gpio-keys Nodes do not need explicit status=okay. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220616005333.18491-40-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/at91-sam9x60ek.dts | 1 - arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 1 - arch/arm/boot/dts/at91-sama5d2_icp.dts | 1 - 3 files changed, 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 70e26df473c1..3b5cbc9723cc 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -80,7 +80,6 @@ compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - status = "okay"; button-1 { label = "SW1"; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index 9219a51f1155..b665ddc6b0de 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -31,7 +31,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - status = "okay"; button-1 { label = "USER BUTTON"; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 4fab0b13baa5..48b5a3d6b339 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -47,7 +47,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_key_gpio_default>; - status = "okay"; button-1 { label = "USER_PB1"; -- cgit v1.2.3 From c805b77caba9e49d43321112f272508d2b1acd25 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 26 Jun 2022 14:03:38 +0200 Subject: ARM: dts: exynos: align SDHCI node name with dtschema The node names should be generic and DT schema expects "mmc". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220626120342.38851-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/exynos4.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 6f0ca3354e39..5c4ecda27a47 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -316,7 +316,7 @@ status = "disabled"; }; - sdhci_0: sdhci@12510000 { + sdhci_0: mmc@12510000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12510000 0x100>; interrupts = ; @@ -325,7 +325,7 @@ status = "disabled"; }; - sdhci_1: sdhci@12520000 { + sdhci_1: mmc@12520000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12520000 0x100>; interrupts = ; @@ -334,7 +334,7 @@ status = "disabled"; }; - sdhci_2: sdhci@12530000 { + sdhci_2: mmc@12530000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12530000 0x100>; interrupts = ; @@ -343,7 +343,7 @@ status = "disabled"; }; - sdhci_3: sdhci@12540000 { + sdhci_3: mmc@12540000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12540000 0x100>; interrupts = ; -- cgit v1.2.3 From 1923e58045471c7226eeab34762e2f821c2c31b7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 26 Jun 2022 14:03:39 +0200 Subject: ARM: dts: s3c24xx: align SDHCI node name with dtschema The node names should be generic and DT schema expects "mmc". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220626120342.38851-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s3c2416.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi index 4f084f4fe44f..4660751cb207 100644 --- a/arch/arm/boot/dts/s3c2416.dtsi +++ b/arch/arm/boot/dts/s3c2416.dtsi @@ -45,7 +45,7 @@ status = "disabled"; }; - sdhci_1: sdhci@4ac00000 { + sdhci_1: mmc@4ac00000 { compatible = "samsung,s3c6410-sdhci"; reg = <0x4AC00000 0x100>; interrupts = <0 0 21 3>; @@ -56,7 +56,7 @@ status = "disabled"; }; - sdhci_0: sdhci@4a800000 { + sdhci_0: mmc@4a800000 { compatible = "samsung,s3c6410-sdhci"; reg = <0x4A800000 0x100>; interrupts = <0 0 20 3>; -- cgit v1.2.3 From 1b90ddb9d942bc75d468758fd2ad632137e733cf Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 26 Jun 2022 14:03:40 +0200 Subject: ARM: dts: s3c64xx: align SDHCI node name with dtschema The node names should be generic and DT schema expects "mmc". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220626120342.38851-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s3c64xx.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s3c64xx.dtsi b/arch/arm/boot/dts/s3c64xx.dtsi index 67a7a66e11d5..c03df6355500 100644 --- a/arch/arm/boot/dts/s3c64xx.dtsi +++ b/arch/arm/boot/dts/s3c64xx.dtsi @@ -59,7 +59,7 @@ #interrupt-cells = <1>; }; - sdhci0: sdhci@7c200000 { + sdhci0: mmc@7c200000 { compatible = "samsung,s3c6410-sdhci"; reg = <0x7c200000 0x100>; interrupt-parent = <&vic1>; @@ -70,7 +70,7 @@ status = "disabled"; }; - sdhci1: sdhci@7c300000 { + sdhci1: mmc@7c300000 { compatible = "samsung,s3c6410-sdhci"; reg = <0x7c300000 0x100>; interrupt-parent = <&vic1>; @@ -81,7 +81,7 @@ status = "disabled"; }; - sdhci2: sdhci@7c400000 { + sdhci2: mmc@7c400000 { compatible = "samsung,s3c6410-sdhci"; reg = <0x7c400000 0x100>; interrupt-parent = <&vic1>; -- cgit v1.2.3 From 6a82ef85c4a4de42214e0c5a79242d54436541c3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 26 Jun 2022 14:03:41 +0200 Subject: ARM: dts: s5pv210: align SDHCI node name with dtschema The node names should be generic and DT schema expects "mmc". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20220626120342.38851-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/s5pv210.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi index f1b85aae8842..12e90a1cc6a1 100644 --- a/arch/arm/boot/dts/s5pv210.dtsi +++ b/arch/arm/boot/dts/s5pv210.dtsi @@ -357,7 +357,7 @@ status = "disabled"; }; - sdhci0: sdhci@eb000000 { + sdhci0: mmc@eb000000 { compatible = "samsung,s3c6410-sdhci"; reg = <0xeb000000 0x100000>; interrupt-parent = <&vic1>; @@ -368,7 +368,7 @@ status = "disabled"; }; - sdhci1: sdhci@eb100000 { + sdhci1: mmc@eb100000 { compatible = "samsung,s3c6410-sdhci"; reg = <0xeb100000 0x100000>; interrupt-parent = <&vic1>; @@ -379,7 +379,7 @@ status = "disabled"; }; - sdhci2: sdhci@eb200000 { + sdhci2: mmc@eb200000 { compatible = "samsung,s3c6410-sdhci"; reg = <0xeb200000 0x100000>; interrupt-parent = <&vic1>; @@ -390,7 +390,7 @@ status = "disabled"; }; - sdhci3: sdhci@eb300000 { + sdhci3: mmc@eb300000 { compatible = "samsung,s3c6410-sdhci"; reg = <0xeb300000 0x100000>; interrupt-parent = <&vic3>; -- cgit v1.2.3 From 6db372de959ac68b261cdbc2dd3c315f256c6d74 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 20 Jun 2022 16:21:50 +0100 Subject: ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black The identification EEPROM on the BeagleBone Black baseboard is supplied by VDD_3V3A which is supplied by LDO4 on the PMIC. Map this as per the DT binding for the EEPROM. Since this supply is always-on this has no practical impact but it does silence a warning at boot due to using a dummy regulator. Signed-off-by: Mark Brown Message-Id: <20220620152150.708664-1-broonie@kernel.org> Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am335x-boneblack.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 9312197316f0..b956e2f60fe0 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -168,3 +168,7 @@ "NC", "NC"; }; + +&baseboard_eeprom { + vcc-supply = <&ldo4_reg>; +}; -- cgit v1.2.3 From b722443fa72b266f4ea823dcb2f09c2e90f8635b Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Sat, 25 Jun 2022 13:36:12 +0200 Subject: ARM: dts: bcm2835/bcm2711: Introduce reg-names in watchdog node bcm2835-pm's bindings now support explicitly setting 'reg-names,' so use them. Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Stefan Wahren Reviewed-by: Peter Robinson Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2711.dtsi | 1 + arch/arm/boot/dts/bcm2835-common.dtsi | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 20e6771e8b1f..93c7c662fd37 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -113,6 +113,7 @@ reg = <0x7e100000 0x114>, <0x7e00a000 0x24>, <0x7ec11000 0x20>; + reg-names = "pm", "asb", "rpivid_asb"; clocks = <&clocks BCM2835_CLOCK_V3D>, <&clocks BCM2835_CLOCK_PERI_IMAGE>, <&clocks BCM2835_CLOCK_H264>, diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi index c25e797b9060..a037d2bc5b11 100644 --- a/arch/arm/boot/dts/bcm2835-common.dtsi +++ b/arch/arm/boot/dts/bcm2835-common.dtsi @@ -62,6 +62,7 @@ #reset-cells = <1>; reg = <0x7e100000 0x114>, <0x7e00a000 0x24>; + reg-names = "pm", "asb"; clocks = <&clocks BCM2835_CLOCK_V3D>, <&clocks BCM2835_CLOCK_PERI_IMAGE>, <&clocks BCM2835_CLOCK_H264>, -- cgit v1.2.3 From b334c1afad17132a3c2360de64c1cfff90908739 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Sat, 25 Jun 2022 13:36:13 +0200 Subject: ARM: dts: bcm2711: Use proper compatible in PM/Watchdog node A new compatible string was introduced specifically for BCM2711, so make use of it. Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Stefan Wahren Reviewed-by: Peter Robinson Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2711.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 93c7c662fd37..941c4d16791b 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -107,7 +107,7 @@ }; pm: watchdog@7e100000 { - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; + compatible = "brcm,bcm2711-pm", "brcm,bcm2835-pm-wdt"; #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x7e100000 0x114>, -- cgit v1.2.3 From e378b965330d99e8622eb369021d0dac01591046 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Mon, 2 May 2022 14:07:45 +0530 Subject: ARM: dts: qcom: sdx65: Add Shared memory manager support Add smem node to support shared memory manager on SDX65 platform. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651480665-14978-5-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index df6f9d6288fe..610e6b90b6cb 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -87,8 +87,10 @@ }; smem_mem: memory@8fe20000 { - no-map; + compatible = "qcom,smem"; reg = <0x8fe20000 0xc0000>; + hwlocks = <&tcsr_mutex 3>; + no-map; }; cmd_db: reserved-memory@8fee0000 { -- cgit v1.2.3 From b456b5e7d1df276a4e1050680eec86ccb99d8a82 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Mon, 2 May 2022 14:36:32 +0530 Subject: ARM: dts: qcom: sdx65: Add interconnect nodes Add interconnect devicetree nodes in SDX65 platform. Signed-off-by: Rohit Agarwal Acked-by: Krzysztof Kozlowski [bjorn: Sorted nodes] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651482395-29443-2-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 610e6b90b6cb..93ac4c740d96 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -51,6 +51,12 @@ }; }; + mc_virt: interconnect-mc-virt { + compatible = "qcom,sdx65-mc-virt"; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -139,6 +145,13 @@ status = "disabled"; }; + system_noc: interconnect@1620000 { + compatible = "qcom,sdx65-system-noc"; + reg = <0x01620000 0x31200>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x01f40000 0x40000>; @@ -158,6 +171,13 @@ status = "disabled"; }; + mem_noc: interconnect@9680000 { + compatible = "qcom,sdx65-mem-noc"; + reg = <0x09680000 0x27200>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0xd00>, @@ -401,6 +421,11 @@ }; }; }; + + apps_bcm_voter: bcm-voter { + compatible = "qcom,bcm-voter"; + }; + }; }; -- cgit v1.2.3 From fbb6447deba87dc409e274d9d6d90d9c79851fb7 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Mon, 2 May 2022 14:36:34 +0530 Subject: ARM: dts: qcom: sdx65: Add USB3 and PHY support Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on SDX65. Signed-off-by: Rohit Agarwal Reviewed-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651482395-29443-4-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 83 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 93ac4c740d96..9af5e3d3822a 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -132,6 +132,7 @@ reg = <0x00100000 0x001f7400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; + #power-domain-cells = <1>; #clock-cells = <1>; #reset-cells = <1>; }; @@ -145,6 +146,45 @@ status = "disabled"; }; + usb_hsphy: phy@ff4000 { + compatible = "qcom,usb-snps-hs-7nm-phy"; + reg = <0xff4000 0x120>; + #phy-cells = <0>; + status = "disabled"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + resets = <&gcc GCC_QUSB2PHY_BCR>; + }; + + usb_qmpphy: phy@ff6000 { + compatible = "qcom,sdx65-qmp-usb3-uni-phy"; + reg = <0x00ff6000 0x1c8>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_EN>; + clock-names = "aux", "cfg_ahb", "ref"; + + resets = <&gcc GCC_USB3PHY_PHY_BCR>, + <&gcc GCC_USB3_PHY_BCR>; + reset-names = "phy", "common"; + + usb_ssphy: phy@ff6200 { + reg = <0x00ff6e00 0x160>, + <0x00ff7000 0x1ec>, + <0x00ff6200 0x1e00>; + #phy-cells = <0>; + #clock-cells = <0>; + clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + system_noc: interconnect@1620000 { compatible = "qcom,sdx65-system-noc"; reg = <0x01620000 0x31200>; @@ -178,6 +218,49 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + usb: usb@a6f8800 { + compatible = "qcom,sdx65-dwc3", "qcom,dwc3"; + reg = <0x0a6f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_USB30_SLV_AHB_CLK>, + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_USB30_MSTR_AXI_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep"; + + assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>, + <&pdc 76 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 18 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", + "ss_phy_irq", "dm_hs_phy_irq"; + + power-domains = <&gcc USB30_GDSC>; + + resets = <&gcc GCC_USB30_BCR>; + + usb_dwc3: usb@a600000 { + compatible = "snps,dwc3"; + reg = <0x0a600000 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x1a0 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_hsphy>, <&usb_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0xd00>, -- cgit v1.2.3 From eeaec4f2b926ffcb35a9c1c4af549ac9f7a6ce56 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Mon, 2 May 2022 14:36:35 +0530 Subject: ARM: dts: qcom: sdx65-mtp: Enable USB3 and PHY support Enable the support for USB3 controller, QMP PHY and HS PHY on SDX65 MTP. Signed-off-by: Rohit Agarwal Reviewed-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651482395-29443-5-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65-mtp.dts | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index 79dc31aa7cd1..6920524ad65a 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -123,7 +123,7 @@ regulator-max-microvolt = <1300000>; }; - ldo1 { + vreg_l1b_1p2: ldo1 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-initial-mode = ; @@ -141,13 +141,13 @@ regulator-initial-mode = ; }; - ldo4 { + vreg_l4b_0p88: ldo4 { regulator-min-microvolt = <880000>; regulator-max-microvolt = <912000>; regulator-initial-mode = ; }; - ldo5 { + vreg_l5b_1p8: ldo5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = ; @@ -177,7 +177,7 @@ regulator-initial-mode = ; }; - ldo10 { + vreg_l10b_3p08: ldo10 { regulator-min-microvolt = <3088000>; regulator-max-microvolt = <3088000>; regulator-initial-mode = ; @@ -244,3 +244,24 @@ }; }; }; + +&usb { + status = "okay"; +}; + +&usb_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_hsphy { + status = "okay"; + vdda-pll-supply = <&vreg_l4b_0p88>; + vdda33-supply = <&vreg_l10b_3p08>; + vdda18-supply = <&vreg_l5b_1p8>; +}; + +&usb_qmpphy { + status = "okay"; + vdda-phy-supply = <&vreg_l4b_0p88>; + vdda-pll-supply = <&vreg_l1b_1p2>; +}; -- cgit v1.2.3 From ab11b74d87ddadb1e6e6d8dc36f3145a26158ef2 Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Mon, 2 May 2022 10:08:03 -0700 Subject: ARM: dts: qcom: sdx65: Add QPIC BAM support Add devicetree node to enable support for QPIC BAM DMA controller on Qualcomm SDX65 platform. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kaushal Kumar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651511286-18690-2-git-send-email-quic_kaushalk@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 9af5e3d3822a..91c9dc18fe3a 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -192,6 +192,18 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + qpic_bam: dma-controller@1b04000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x01b04000 0x1c000>; + interrupts = ; + clocks = <&rpmhcc RPMH_QPIC_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + status = "disabled"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x01f40000 0x40000>; -- cgit v1.2.3 From 0ec15b6f7621c2e5ded3d3d1a67361da1895c26b Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Mon, 2 May 2022 10:08:04 -0700 Subject: ARM: dts: qcom: sdx65: Add QPIC NAND support Add devicetree node to enable support for QPIC NAND controller on Qualcomm SDX65 platform. Since there is no "aon" clock in SDX65, a dummy clock is provided. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kaushal Kumar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651511286-18690-3-git-send-email-quic_kaushalk@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 91c9dc18fe3a..7fd75c441289 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -37,6 +37,12 @@ clock-output-names = "sleep_clk"; #clock-cells = <0>; }; + + nand_clk_dummy: nand-clk-dummy { + compatible = "fixed-clock"; + clock-frequency = <32764>; + #clock-cells = <0>; + }; }; cpus { @@ -204,6 +210,22 @@ status = "disabled"; }; + qpic_nand: nand-controller@1b30000 { + compatible = "qcom,sdx55-nand"; + reg = <0x01b30000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rpmhcc RPMH_QPIC_CLK>, + <&nand_clk_dummy>; + clock-names = "core", "aon"; + + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + status = "disabled"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x01f40000 0x40000>; -- cgit v1.2.3 From eae61fddd64861fc496a7786b02449abe8188145 Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Mon, 2 May 2022 10:08:05 -0700 Subject: ARM: dts: qcom: sdx65-mtp: Enable QPIC BAM support Enable QPIC BAM devicetree node for Qualcomm SDX65-MTP board. While at it, sort the blsp1_uart3 node in alphabetical order and set it's status as "okay". Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kaushal Kumar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651511286-18690-4-git-send-email-quic_kaushalk@quicinc.com --- arch/arm/boot/dts/qcom-sdx65-mtp.dts | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index 6920524ad65a..e9c8df9da9c3 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -64,10 +64,6 @@ }; }; -&blsp1_uart3 { - status = "ok"; -}; - &apps_rsc { pmx65-rpmh-regulators { compatible = "qcom,pmx65-rpmh-regulators"; @@ -245,6 +241,14 @@ }; }; +&blsp1_uart3 { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + &usb { status = "okay"; }; -- cgit v1.2.3 From 59e73f67e14b95eddbbff2f009c98a55cef47f8a Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Mon, 2 May 2022 10:08:06 -0700 Subject: ARM: dts: qcom: sdx65-mtp: Enable QPIC NAND support Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kaushal Kumar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1651511286-18690-5-git-send-email-quic_kaushalk@quicinc.com --- arch/arm/boot/dts/qcom-sdx65-mtp.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index e9c8df9da9c3..e747ec0ccbf6 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -249,6 +249,21 @@ status = "okay"; }; +&qpic_nand { + status = "okay"; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + /* ico and efs2 partitions are secured */ + secure-regions = /bits/ 64 <0x500000 0x500000 + 0xa00000 0xb00000>; + }; +}; + &usb { status = "okay"; }; -- cgit v1.2.3 From b427679adcddf9d56b28175d435fc7ec4d4c99ef Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:02 +0530 Subject: ARM: dts: qcom: sdx65: Add CPUFreq support Add CPUFreq support to SDX65 platform using the cpufreq-dt driver. There is no dedicated hardware block available on this platform to carry on the CPUFreq duties. Hence, it is accomplished using the CPU clock and regulators tied together by the operating points table. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-2-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 7fd75c441289..aea361df47be 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -54,6 +54,35 @@ compatible = "arm,cortex-a7"; reg = <0x0>; enable-method = "psci"; + clocks = <&apcs>; + power-domains = <&rpmhpd SDX65_CX_AO>; + power-domain-names = "rpmhpd"; + operating-points-v2 = <&cpu_opp_table>; + }; + }; + + cpu_opp_table: cpu-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-345600000 { + opp-hz = /bits/ 64 <345600000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-1094400000 { + opp-hz = /bits/ 64 <1094400000>; + required-opps = <&rpmhpd_opp_nom>; + }; + + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + required-opps = <&rpmhpd_opp_turbo>; }; }; -- cgit v1.2.3 From 7f928c735880ed20e4d7670416aa7877b47a47d1 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:03 +0530 Subject: ARM: dts: qcom: sdx65: Add modem SMP2P node Add SMP2P nodes for the SDX65 platform to communicate with the modem. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-3-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index aea361df47be..217ae4f4b44e 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -156,6 +156,37 @@ }; }; + smp2p-mpss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + interrupts = ; + mboxes = <&apcs 14>; + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + modem_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + modem_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + ipa_smp2p_out: ipa-ap-to-modem { + qcom,entry-name = "ipa"; + #qcom,smem-state-cells = <1>; + }; + + ipa_smp2p_in: ipa-modem-to-ap { + qcom,entry-name = "ipa"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; -- cgit v1.2.3 From 69117a2abfe0b02c6828979e8a6f9b039908b42a Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:04 +0530 Subject: ARM: dts: qcom: sdx65: Add IMEM and PIL info region Add a simple-mfd representing IMEM on SDX65 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-4-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 217ae4f4b44e..34f548a942a5 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -395,6 +395,19 @@ interrupt-controller; }; + imem@1468f000 { + compatible = "simple-mfd"; + reg = <0x1468f000 0x1000>; + ranges = <0x0 0x1468f000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sdx65-smmu-500", "arm,mmu-500"; reg = <0x15000000 0x40000>; -- cgit v1.2.3 From 261e09b4e3fb847b9a1e99538e31fdfdc2d1ee90 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:06 +0530 Subject: ARM: dts: qcom: sdx65: Add SCM node Add SCM node to enable SCM functionality on SDX65 platform. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-6-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 34f548a942a5..8695579a7dc8 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -86,6 +86,12 @@ }; }; + firmware { + scm { + compatible = "qcom,scm-sdx65", "qcom,scm"; + }; + }; + mc_virt: interconnect-mc-virt { compatible = "qcom,sdx65-mc-virt"; #interconnect-cells = <1>; -- cgit v1.2.3 From a3ae01ed96e7efc2525125c36dc8e34186f0d7bc Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:07 +0530 Subject: ARM: dts: qcom: sdx65: Add Modem remoteproc node Add modem support to SDX65 using the PAS remoteproc driver. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-7-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 8695579a7dc8..fd9a6a7126bf 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -298,6 +298,39 @@ #hwlock-cells = <1>; }; + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,sdx55-mpss-pas"; + reg = <0x04080000 0x4040>; + + interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd SDX65_CX>, + <&rpmhpd SDX65_MSS>; + power-domain-names = "cx", "mss"; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + label = "mpss"; + qcom,remote-pid = <1>; + mboxes = <&apcs 15>; + }; + }; + sdhc_1: sdhci@8804000 { compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5"; reg = <0x08804000 0x1000>; -- cgit v1.2.3 From aae0f5314f95df66962acfcce23158e2a047b03c Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:08 +0530 Subject: ARM: dts: qcom: sdx65-mtp: Enable modem Enable modem on SDX65 MTP board. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-8-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index e747ec0ccbf6..85ea02d8362d 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -264,6 +264,11 @@ }; }; +&remoteproc_mpss { + status = "okay"; + memory-region = <&mpss_adsp_mem>; +}; + &usb { status = "okay"; }; -- cgit v1.2.3 From df6d7b86f4885d370886a44339017e32c80556e7 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:12 +0530 Subject: ARM: dts: qcom: sdx65: Add pshold support Add support for pshold block to drive pshold towards the PMIC, which is used to trigger a configurable event such as reboot or poweroff of the SDX65 platform. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-12-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index fd9a6a7126bf..67b8ad23cac8 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -394,6 +394,11 @@ }; }; + restart@c264000 { + compatible = "qcom,pshold"; + reg = <0x0c264000 0x1000>; + }; + spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0xd00>, -- cgit v1.2.3 From 39eebfce4bdb88f53959d570ab9c8956bb9f0988 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Wed, 1 Jun 2022 16:15:11 +0530 Subject: ARM: dts: qcom: sdx65: Add Watchdog support Enable Watchdog support for Application Processor Subsystem (APSS) block on SDX65 platform. Signed-off-by: Rohit Agarwal Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1654080312-5408-11-git-send-email-quic_rohiagar@quicinc.com --- arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 67b8ad23cac8..1881b6d2485b 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -518,6 +518,12 @@ #clock-cells = <0>; }; + watchdog@17817000 { + compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt"; + reg = <0x17817000 0x1000>; + clocks = <&sleep_clk>; + }; + timer@17820000 { #address-cells = <1>; #size-cells = <1>; -- cgit v1.2.3 From 4fcdaf4b0320f93d0ccb4d36b795ed258fb07b27 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 7 May 2022 21:49:11 +0200 Subject: ARM: dts: qcom: align PMIC GPIO pin configuration with DT schema DT schema expects PMIC GPIO pin configuration nodes to be named with '-state' suffix. Optional children should be either 'pinconf' or followed with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220507194913.261121-10-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 20 ++++++++++---------- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 4 ++-- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 8 ++++---- .../boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts | 2 +- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 2 +- .../boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 8 ++++---- .../arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 2 +- arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 14 +++++++------- .../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 10 +++++----- arch/arm/boot/dts/qcom-pm8941.dtsi | 2 +- 11 files changed, 37 insertions(+), 37 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 138d6478ac84..a104acbfee05 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -273,7 +273,7 @@ }; gpio@150 { - dragon_ethernet_gpios: ethernet-gpios { + dragon_ethernet_gpios: ethernet-state { pinconf { pins = "gpio7"; function = "normal"; @@ -282,7 +282,7 @@ power-source = ; }; }; - dragon_bmp085_gpios: bmp085-gpios { + dragon_bmp085_gpios: bmp085-state { pinconf { pins = "gpio16"; function = "normal"; @@ -291,7 +291,7 @@ power-source = ; }; }; - dragon_mpu3050_gpios: mpu3050-gpios { + dragon_mpu3050_gpios: mpu3050-state { pinconf { pins = "gpio17"; function = "normal"; @@ -300,7 +300,7 @@ power-source = ; }; }; - dragon_sdcc3_gpios: sdcc3-gpios { + dragon_sdcc3_gpios: sdcc3-state { pinconf { pins = "gpio22"; function = "normal"; @@ -309,7 +309,7 @@ power-source = ; }; }; - dragon_sdcc5_gpios: sdcc5-gpios { + dragon_sdcc5_gpios: sdcc5-state { pinconf { pins = "gpio26"; function = "normal"; @@ -319,7 +319,7 @@ power-source = ; }; }; - dragon_ak8975_gpios: ak8975-gpios { + dragon_ak8975_gpios: ak8975-state { pinconf { pins = "gpio33"; function = "normal"; @@ -328,9 +328,9 @@ power-source = ; }; }; - dragon_cm3605_gpios: cm3605-gpios { + dragon_cm3605_gpios: cm3605-state { /* Pin 34 connected to the proxy IRQ */ - pinconf_gpio34 { + gpio34-pins { pins = "gpio34"; function = "normal"; input-enable; @@ -338,7 +338,7 @@ power-source = ; }; /* Pin 35 connected to ASET */ - pinconf_gpio35 { + gpio35-pins { pins = "gpio35"; function = "normal"; output-high; @@ -346,7 +346,7 @@ power-source = ; }; }; - dragon_veth_gpios: veth-gpios { + dragon_veth_gpios: veth-state { pinconf { pins = "gpio40"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index e068a8d0adf0..7e57a0750320 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -196,8 +196,8 @@ qcom,ssbi@500000 { pmic@0 { gpio@150 { - wlan_default_gpios: wlan-gpios { - pios { + wlan_default_gpios: wlan-gpios-state { + pinconf { pins = "gpio43"; function = "normal"; bias-disable; diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 2638b380be20..77e841243646 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -291,8 +291,8 @@ qcom,ssbi@500000 { pmic@0 { gpio@150 { - wlan_default_gpios: wlan-gpios { - pios { + wlan_default_gpios: wlan-gpios-state { + pinconf { pins = "gpio43"; function = "normal"; bias-disable; @@ -300,8 +300,8 @@ }; }; - notify_led: nled { - pios { + notify_led: nled-state { + pinconf { pins = "gpio18"; function = "normal"; bias-disable; diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts index 0cee62c7b8b0..3cf79cc5b539 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts @@ -334,7 +334,7 @@ qcom,ssbi@500000 { pmic@0 { gpio@150 { - gpio_keys_pin_a: gpio-keys-pin-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio3", "gpio4", "gpio29", "gpio35"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi index 10ad929759ed..49de1821ac3a 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -114,7 +114,7 @@ }; &pmicgpio { - usb_vbus_5v_pins: usb_vbus_5v_pins { + usb_vbus_5v_pins: usb-vbus-5v-state { pins = "gpio4"; function = "normal"; output-high; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 9493886a5c0d..4d8fc8689d24 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -272,7 +272,7 @@ }; &pm8941_gpios { - gpio_keys_pin_a: gpio-keys-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio3"; function = "normal"; @@ -280,7 +280,7 @@ power-source = ; }; - fuelgauge_pin: fuelgauge-int { + fuelgauge_pin: fuelgauge-int-state { pins = "gpio9"; function = "normal"; @@ -289,7 +289,7 @@ power-source = ; }; - wlan_sleep_clk_pin: wl-sleep-clk { + wlan_sleep_clk_pin: wl-sleep-clk-state { pins = "gpio16"; function = "func2"; @@ -297,7 +297,7 @@ power-source = ; }; - wlan_regulator_pin: wl-reg-active { + wlan_regulator_pin: wl-reg-active-state { pins = "gpio17"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 1d21de46f85c..a4fec2d0d158 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -163,7 +163,7 @@ }; &pm8941_gpios { - gpio_keys_pin_a: gpio-keys-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio3", "gpio4", "gpio5"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 58cb2ce1e4df..1c9f04322672 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -110,7 +110,7 @@ }; &pm8941_gpios { - gpio_keys_pin_a: gpio-keys-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio1", "gpio2", "gpio5"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index d6b2300a8223..90f7a399f40b 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -398,7 +398,7 @@ }; &pma8084_gpios { - gpio_keys_pin_a: gpio-keys-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio3", "gpio5"; function = "normal"; @@ -406,7 +406,7 @@ power-source = ; }; - touchkey_pin: touchkey-int-pin { + touchkey_pin: touchkey-int-state { pins = "gpio6"; function = "normal"; bias-disable; @@ -414,7 +414,7 @@ power-source = ; }; - touch_pin: touchscreen-int-pin { + touch_pin: touchscreen-int-state { pins = "gpio8"; function = "normal"; bias-disable; @@ -422,7 +422,7 @@ power-source = ; }; - panel_en_pin: panel-en-pin { + panel_en_pin: panel-en-state { pins = "gpio14"; function = "normal"; bias-pull-up; @@ -430,7 +430,7 @@ qcom,drive-strength = ; }; - wlan_sleep_clk_pin: wlan-sleep-clk-pin { + wlan_sleep_clk_pin: wlan-sleep-clk-state { pins = "gpio16"; function = "func2"; @@ -439,7 +439,7 @@ qcom,drive-strength = ; }; - panel_rst_pin: panel-rst-pin { + panel_rst_pin: panel-rst-state { pins = "gpio17"; function = "normal"; bias-disable; @@ -447,7 +447,7 @@ qcom,drive-strength = ; }; - fuelgauge_pin: fuelgauge-int-pin { + fuelgauge_pin: fuelgauge-int-state { pins = "gpio21"; function = "normal"; bias-disable; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 9bd8faea61a5..e9bcd3b4ebb3 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -244,7 +244,7 @@ }; &pm8941_gpios { - gpio_keys_pin_a: gpio-keys-active { + gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio5"; function = "normal"; @@ -252,7 +252,7 @@ power-source = ; }; - bt_reg_on_pin: bt-reg-on { + bt_reg_on_pin: bt-reg-on-state { pins = "gpio16"; function = "normal"; @@ -260,7 +260,7 @@ power-source = ; }; - wlan_sleep_clk_pin: wl-sleep-clk { + wlan_sleep_clk_pin: wl-sleep-clk-state { pins = "gpio17"; function = "func2"; @@ -268,7 +268,7 @@ power-source = ; }; - wlan_regulator_pin: wl-reg-active { + wlan_regulator_pin: wl-reg-active-state { pins = "gpio18"; function = "normal"; @@ -276,7 +276,7 @@ power-source = ; }; - lcd_dcdc_en_pin_a: lcd-dcdc-en-active { + lcd_dcdc_en_pin_a: lcd-dcdc-en-active-state { pins = "gpio20"; function = "normal"; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index cdd2bdb77b32..a68634397938 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -68,7 +68,7 @@ interrupt-controller; #interrupt-cells = <2>; - boost_bypass_n_pin: boost-bypass { + boost_bypass_n_pin: boost-bypass-state { pins = "gpio21"; function = "normal"; }; -- cgit v1.2.3 From dc590cdc31f636ea15658f1206c3e380a53fb78e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 7 May 2022 21:49:12 +0200 Subject: ARM: dts: qcom: mdm9615: add missing PMIC GPIO reg 'reg' property is required in SSBI children: qcom-mdm9615-wp8548-mangoh-green.dtb: gpio@150: 'reg' is a required property Fixes: 2c5e596524e7 ("ARM: dts: Add MDM9615 dtsi") Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220507194913.261121-11-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 8f0752ce1c7b..0ce0d04bd994 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -321,6 +321,7 @@ pmicgpio: gpio@150 { compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio"; + reg = <0x150>; interrupt-controller; #interrupt-cells = <2>; gpio-controller; -- cgit v1.2.3 From 255889f4baf51e887c83333d82ac8470a11246e4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 7 May 2022 21:49:13 +0200 Subject: ARM: dts: qcom: pmx65: add fallback compatible to PMIC GPIO The bindings require all PMIC GPIO nodes to have two compatibles - specific followed by SPMI or SSBI fallback. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220507194913.261121-12-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-pmx65.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-pmx65.dtsi b/arch/arm/boot/dts/qcom-pmx65.dtsi index 5411b833d26e..8701396fe1f2 100644 --- a/arch/arm/boot/dts/qcom-pmx65.dtsi +++ b/arch/arm/boot/dts/qcom-pmx65.dtsi @@ -21,7 +21,7 @@ }; pmx65_gpios: pinctrl@8800 { - compatible = "qcom,pmx65-gpio"; + compatible = "qcom,pmx65-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; #gpio-cells = <2>; -- cgit v1.2.3 From eea939a0da869e00f40e41182edbcd911ee11fd4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 8 May 2022 15:59:32 +0200 Subject: ARM: dts: qcom: add missing gpio-ranges in PMIC GPIOs The new Qualcomm PMIC GPIO bindings require gpio-ranges property: qcom-sdx55-telit-fn980-tlb.dtb: gpio@c000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220508135932.132378-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-pmx55.dtsi | 1 + arch/arm/boot/dts/qcom-pmx65.dtsi | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-pmx55.dtsi b/arch/arm/boot/dts/qcom-pmx55.dtsi index 6571b88d018a..9de7578a4c5f 100644 --- a/arch/arm/boot/dts/qcom-pmx55.dtsi +++ b/arch/arm/boot/dts/qcom-pmx55.dtsi @@ -69,6 +69,7 @@ compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; + gpio-ranges = <&pmx55_gpios 0 0 11>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/qcom-pmx65.dtsi b/arch/arm/boot/dts/qcom-pmx65.dtsi index 8701396fe1f2..abf229a8b75a 100644 --- a/arch/arm/boot/dts/qcom-pmx65.dtsi +++ b/arch/arm/boot/dts/qcom-pmx65.dtsi @@ -24,6 +24,7 @@ compatible = "qcom,pmx65-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; + gpio-ranges = <&pmx65_gpios 0 0 16>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; -- cgit v1.2.3 From 826783953013150aa94afd727e324a4987e574cb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 21 Jun 2022 15:33:10 +0200 Subject: ARM: dts: renesas: Fix DA9063 watchdog subnode names make dtbs_check: arch/arm/boot/dts/r8a7791-koelsch-single-memory-node.dtb: pmic@58: 'wdt' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/mfd/dlg,da9063.yaml ... Change the watchdog child node names to match the DA9063 DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/1dafdce285f7d14bec9e2033ac87fb30135895db.1655818230.git.geert+renesas@glider.be --- arch/arm/boot/dts/r8a7790-lager.dts | 2 +- arch/arm/boot/dts/r8a7790-stout.dts | 2 +- arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +- arch/arm/boot/dts/r8a7791-porter.dts | 2 +- arch/arm/boot/dts/r8a7792-blanche.dts | 2 +- arch/arm/boot/dts/r8a7793-gose.dts | 2 +- arch/arm/boot/dts/r8a7794-alt.dts | 2 +- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 57cd2fa72249..5ad5349a50dc 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -442,7 +442,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7790-stout.dts b/arch/arm/boot/dts/r8a7790-stout.dts index c802f9f13c18..fe14727eefe1 100644 --- a/arch/arm/boot/dts/r8a7790-stout.dts +++ b/arch/arm/boot/dts/r8a7790-stout.dts @@ -341,7 +341,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 6e691b6cac05..26a40782cc89 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -805,7 +805,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 38e2ab928707..ec0a20d5130d 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -390,7 +390,7 @@ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts index 62aa9f61321b..c66de9dd12df 100644 --- a/arch/arm/boot/dts/r8a7792-blanche.dts +++ b/arch/arm/boot/dts/r8a7792-blanche.dts @@ -335,7 +335,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index c8978f4f62e9..79b537b24642 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -740,7 +740,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 99d554fe3329..4d93319674c6 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -463,7 +463,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 92a76164432a..b7af1befa126 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -433,7 +433,7 @@ compatible = "dlg,da9063-rtc"; }; - wdt { + watchdog { compatible = "dlg,da9063-watchdog"; }; }; -- cgit v1.2.3 From dc0f67311416c86ed3c6f14a365c8e833ed4b8dd Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Fri, 24 Jun 2022 16:39:57 +0200 Subject: ARM: dts: r9a06g032: Describe MII converter Add the MII converter node which describes the MII converter that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger Reviewed-by: Florian Fainelli Reviewed-by: Vladimir Oltean Link: https://lore.kernel.org/r/20220624144001.95518-13-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index d3665910958b..f6241af33112 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -304,6 +304,45 @@ data-width = <8>; }; + eth_miic: eth-miic@44030000 { + compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x44030000 0x10000>; + clocks = <&sysctrl R9A06G032_CLK_MII_REF>, + <&sysctrl R9A06G032_CLK_RGMII_REF>, + <&sysctrl R9A06G032_CLK_RMII_REF>, + <&sysctrl R9A06G032_HCLK_SWITCH_RG>; + clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk"; + power-domains = <&sysctrl>; + status = "disabled"; + + mii_conv1: mii-conv@1 { + reg = <1>; + status = "disabled"; + }; + + mii_conv2: mii-conv@2 { + reg = <2>; + status = "disabled"; + }; + + mii_conv3: mii-conv@3 { + reg = <3>; + status = "disabled"; + }; + + mii_conv4: mii-conv@4 { + reg = <4>; + status = "disabled"; + }; + + mii_conv5: mii-conv@5 { + reg = <5>; + status = "disabled"; + }; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; -- cgit v1.2.3 From c6f600923600e7af24efab1697a859d1d2389c66 Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Fri, 24 Jun 2022 16:39:58 +0200 Subject: ARM: dts: r9a06g032: Describe GMAC2 The RZ/N1 SoC includes two MACs named GMACx that are compatible with the "snps,dwmac" driver. GMAC1 is connected directly to the MII converter port 1. GMAC2 however can be used as the MAC for the switch CPU management port or can be muxed to be connected directly to the MII converter port 2. This commit adds the description for the GMAC2 which will be used by the switch description. Signed-off-by: Clément Léger Reviewed-by: Florian Fainelli Reviewed-by: Vladimir Oltean Link: https://lore.kernel.org/r/20220624144001.95518-14-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index f6241af33112..42ce02e51e8d 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -304,6 +304,24 @@ data-width = <8>; }; + gmac2: ethernet@44002000 { + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; + reg = <0x44002000 0x2000>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; + clocks = <&sysctrl R9A06G032_HCLK_GMAC1>; + clock-names = "stmmaceth"; + power-domains = <&sysctrl>; + snps,multicast-filter-bins = <256>; + snps,perfect-filter-entries = <128>; + tx-fifo-depth = <2048>; + rx-fifo-depth = <4096>; + status = "disabled"; + }; + eth_miic: eth-miic@44030000 { compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic"; #address-cells = <1>; -- cgit v1.2.3 From cda41c14ab8ae25acec3b8b956336bbb05cedc35 Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Fri, 24 Jun 2022 16:39:59 +0200 Subject: ARM: dts: r9a06g032: Describe switch Add the description of the switch that is present on the RZ/N1 SoC. This description includes ethernet-port descriptions for all the ports that are present on the switch along with their connection to the MII converter ports and to the GMAC for the CPU port. Signed-off-by: Clément Léger Reviewed-by: Vladimir Oltean Reviewed-by: Florian Fainelli Link: https://lore.kernel.org/r/20220624144001.95518-15-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 42ce02e51e8d..5b97fa85474f 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -361,6 +361,57 @@ }; }; + switch: switch@44050000 { + compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw"; + reg = <0x44050000 0x10000>; + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, + <&sysctrl R9A06G032_CLK_SWITCH>; + clock-names = "hclk", "clk"; + power-domains = <&sysctrl>; + status = "disabled"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + switch_port0: port@0 { + reg = <0>; + pcs-handle = <&mii_conv5>; + status = "disabled"; + }; + + switch_port1: port@1 { + reg = <1>; + pcs-handle = <&mii_conv4>; + status = "disabled"; + }; + + switch_port2: port@2 { + reg = <2>; + pcs-handle = <&mii_conv3>; + status = "disabled"; + }; + + switch_port3: port@3 { + reg = <3>; + pcs-handle = <&mii_conv2>; + status = "disabled"; + }; + + switch_port4: port@4 { + reg = <4>; + ethernet = <&gmac2>; + label = "cpu"; + phy-mode = "internal"; + status = "disabled"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; -- cgit v1.2.3 From 5b6d7c3c5861ad4ad43eb7b7b64689221b2fc53f Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Fri, 24 Jun 2022 16:40:00 +0200 Subject: ARM: dts: r9a06g032-rzn1d400-db: Add switch description Add the description for the switch, GMAC2 and MII converter. With these definitions, the switch ports 0 and 1 (MII ports 5 and 4) are working on the RZ/N1D-DB board. Signed-off-by: Clément Léger Reviewed-by: Vladimir Oltean Reviewed-by: Florian Fainelli Link: https://lore.kernel.org/r/20220624144001.95518-16-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 115 ++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts index ca39e1d681c1..4bf813335e21 100644 --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts @@ -8,6 +8,9 @@ /dts-v1/; +#include +#include + #include "r9a06g032.dtsi" / { @@ -23,10 +26,122 @@ }; }; +ð_miic { + status = "okay"; + renesas,miic-switch-portin = ; +}; + +&gmac2 { + status = "okay"; + phy-mode = "gmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&mii_conv4 { + renesas,miic-input = ; + status = "okay"; +}; + +&mii_conv5 { + renesas,miic-input = ; + status = "okay"; +}; + +&pinctrl{ + pins_eth3: pins_eth3 { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength = <6>; + bias-disable; + }; + + pins_eth4: pins_eth4 { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + drive-strength = <6>; + bias-disable; + }; + + pins_mdio1: pins_mdio1 { + pinmux = , + ; + }; +}; + &rtc0 { status = "okay"; }; +&switch { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>; + + dsa,member = <0 0>; + + mdio { + clock-frequency = <2500000>; + + #address-cells = <1>; + #size-cells = <0>; + + switch0phy4: ethernet-phy@4 { + reg = <4>; + micrel,led-mode = <1>; + }; + + switch0phy5: ethernet-phy@5 { + reg = <5>; + micrel,led-mode = <1>; + }; + }; +}; + +&switch_port0 { + label = "lan0"; + phy-mode = "mii"; + phy-handle = <&switch0phy5>; + status = "okay"; +}; + +&switch_port1 { + label = "lan1"; + phy-mode = "mii"; + phy-handle = <&switch0phy4>; + status = "okay"; +}; + +&switch_port4 { + status = "okay"; +}; + &uart0 { status = "okay"; }; -- cgit v1.2.3 From eb9e93937756a05787977875830c0dc482cb57e0 Mon Sep 17 00:00:00 2001 From: Ansuel Smith Date: Sat, 30 Apr 2022 07:51:17 +0200 Subject: ARM: dts: qcom: replace gcc PXO with pxo_board fixed clock Replace gcc PXO phandle to pxo_board fixed clock declared in the dts. gcc driver doesn't provide PXO_SRC as it's a fixed-clock. This cause a kernel panic if any driver actually try to use it. Fixes: 40cf5c884a96 ("ARM: dts: qcom: add L2CC and RPM for IPQ8064") Signed-off-by: Ansuel Smith Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220430055118.1947-2-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 808ea1862283..d09354ca100d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -784,7 +784,7 @@ l2cc: clock-controller@2011000 { compatible = "qcom,kpss-gcc", "syscon"; reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; clock-names = "pll8_vote", "pxo"; clock-output-names = "acpu_l2_aux"; }; -- cgit v1.2.3 From aaed15efce65c20951f573955e10b51c24ca6e4d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 5 May 2022 13:37:58 +0200 Subject: ARM: dts: qcom: use dedicated QFPROM compatibles Use dedicated compatibles for QFPROM on APQ8064, IPQ8064 and MSM9874, which is expected by the bindings. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220505113802.243301-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 34c0ba7fa358..3bf870b7de00 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -796,7 +796,7 @@ }; qfprom: qfprom@700000 { - compatible = "qcom,qfprom"; + compatible = "qcom,apq8064-qfprom", "qcom,qfprom"; reg = <0x00700000 0x1000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index da50a1a0197f..503b4ae9fb1a 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -242,7 +242,7 @@ qfprom: qfprom@fc4bc000 { #address-cells = <1>; #size-cells = <1>; - compatible = "qcom,qfprom"; + compatible = "qcom,apq8084-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; tsens_calib: calib@d0 { reg = <0xd0 0x18>; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index d09354ca100d..4022ed9df988 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -723,7 +723,7 @@ }; qfprom: qfprom@700000 { - compatible = "qcom,qfprom"; + compatible = "qcom,ipq8064-qfprom", "qcom,qfprom"; reg = <0x00700000 0x1000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 814ad0b46232..5d2ab5ceb65c 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1120,7 +1120,7 @@ qfprom: qfprom@fc4bc000 { #address-cells = <1>; #size-cells = <1>; - compatible = "qcom,qfprom"; + compatible = "qcom,msm8974-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; tsens_calib: calib@d0 { reg = <0xd0 0x18>; -- cgit v1.2.3 From 10193ad6d487e0abdc73c704306ebe8d15d4ab74 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 5 May 2022 13:37:59 +0200 Subject: ARM: dts: qcom: cleanup QFPROM nodes Cleanup coding style of QFPROM nodes - put compatible as first property and drop tabs before '=' character. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220505113802.243301-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 6 +++--- arch/arm/boot/dts/qcom-apq8084.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 3bf870b7de00..d3cb099cb691 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -797,9 +797,9 @@ qfprom: qfprom@700000 { compatible = "qcom,apq8064-qfprom", "qcom,qfprom"; - reg = <0x00700000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; ranges; tsens_calib: calib { reg = <0x404 0x10>; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 503b4ae9fb1a..cb01faa23eb7 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -240,10 +240,10 @@ }; qfprom: qfprom@fc4bc000 { - #address-cells = <1>; - #size-cells = <1>; compatible = "qcom,apq8084-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; tsens_calib: calib@d0 { reg = <0xd0 0x18>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5d2ab5ceb65c..df49be66d0b8 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1118,10 +1118,10 @@ }; qfprom: qfprom@fc4bc000 { - #address-cells = <1>; - #size-cells = <1>; compatible = "qcom,msm8974-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; tsens_calib: calib@d0 { reg = <0xd0 0x18>; }; -- cgit v1.2.3 From 7b7e501f7a7293db0f66d27f0f3f191502faaad9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 5 May 2022 13:38:00 +0200 Subject: ARM: dts: qcom: apq8064: add unit addresses to QFPROM regions QFPROM children have 'reg' so they must have unit address. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220505113802.243301-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d3cb099cb691..028d52b5d075 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -801,10 +801,10 @@ #address-cells = <1>; #size-cells = <1>; ranges; - tsens_calib: calib { + tsens_calib: calib@404 { reg = <0x404 0x10>; }; - tsens_backup: backup_calib { + tsens_backup: backup_calib@414 { reg = <0x414 0x10>; }; }; -- cgit v1.2.3 From 7afef282d7453ded3b31f71771a31b34dda51aff Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 21 May 2022 18:45:48 +0200 Subject: ARM: dts: qcom: ipq4019: fix Micron SPI NOR compatible The proper compatible for Micron n25q128a11 SPI NOR flash should include vendor-prefix and use jedec,spi-nor fallback. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220521164550.91115-10-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi index faeaa6bf0def..44a9597d8bfd 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi @@ -93,7 +93,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; - compatible = "n25q128a11"; + compatible = "micron,n25q128a11", "jedec,spi-nor"; spi-max-frequency = <24000000>; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts index d596dd1180ae..c7a6e77da272 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts @@ -56,7 +56,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; - compatible = "n25q128a11"; + compatible = "micron,n25q128a11", "jedec,spi-nor"; spi-max-frequency = <24000000>; }; }; -- cgit v1.2.3 From 31b2edcab4d153145354c4333a6be5209e185598 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:42:48 +0200 Subject: ARM: dts: qcom: adjust whitespace around '=' Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220526204248.832139-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 16 +-- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 10 +- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14 +- arch/arm/boot/dts/qcom-apq8064.dtsi | 142 ++++++++++----------- arch/arm/boot/dts/qcom-ipq8064.dtsi | 32 ++--- arch/arm/boot/dts/qcom-mdm9615.dtsi | 6 +- arch/arm/boot/dts/qcom-msm8660.dtsi | 112 ++++++++-------- arch/arm/boot/dts/qcom-msm8960.dtsi | 54 ++++---- .../arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 6 +- 9 files changed, 196 insertions(+), 196 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index ca9f73528196..beb2058fd116 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -24,9 +24,9 @@ ramoops@88d00000{ compatible = "ramoops"; reg = <0x88d00000 0x100000>; - record-size = <0x00020000>; - console-size = <0x00020000>; - ftrace-size = <0x00020000>; + record-size = <0x00020000>; + console-size = <0x00020000>; + ftrace-size = <0x00020000>; }; }; @@ -98,8 +98,8 @@ * tabla2x-slim-VDDIO_CDC */ s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; qcom,switch-mode-frequency = <3200000>; regulator-always-on; }; @@ -349,9 +349,9 @@ compatible = "syscon-reboot-mode"; offset = <0x65c>; - mode-normal = <0x77665501>; - mode-bootloader = <0x77665500>; - mode-recovery = <0x77665502>; + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; }; }; }; diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 7e57a0750320..e3bf57cd7423 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -82,8 +82,8 @@ }; s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; qcom,switch-mode-frequency = <3200000>; }; @@ -230,9 +230,9 @@ sdcc3: mmc@12180000 { status = "okay"; vmmc-supply = <&v3p3_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&card_detect>; - cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&card_detect>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; }; /* WLAN */ sdcc4: mmc@121c0000 { diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 77e841243646..24eacf5afbf6 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -108,8 +108,8 @@ }; s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; qcom,switch-mode-frequency = <3200000>; }; @@ -240,8 +240,8 @@ }; sata0: sata@29000000 { - status = "okay"; - target-supply = <&pm8921_s4>; + status = "okay"; + target-supply = <&pm8921_s4>; }; /* OTG */ @@ -324,9 +324,9 @@ sdcc3: mmc@12180000 { status = "okay"; vmmc-supply = <&pm8921_l6>; - pinctrl-names = "default"; - pinctrl-0 = <&card_detect>; - cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&card_detect>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; }; /* WLAN */ sdcc4: mmc@121c0000 { diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 028d52b5d075..452afcacd64d 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -430,8 +430,8 @@ }; sps_sic_non_secure: sps-sic-non-secure@12100000 { - compatible = "syscon"; - reg = <0x12100000 0x10000>; + compatible = "syscon"; + reg = <0x12100000 0x10000>; }; gsbi1: gsbi@12440000 { @@ -836,22 +836,22 @@ }; l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc", "syscon"; - reg = <0x2011000 0x1000>; + compatible = "qcom,kpss-gcc", "syscon"; + reg = <0x2011000 0x1000>; }; rpm@108000 { - compatible = "qcom,rpm-apq8064"; - reg = <0x108000 0x1000>; - qcom,ipc = <&l2cc 0x8 2>; + compatible = "qcom,rpm-apq8064"; + reg = <0x108000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; - interrupts = , - , - ; - interrupt-names = "ack", "err", "wakeup"; + interrupts = , + , + ; + interrupt-names = "ack", "err", "wakeup"; rpmcc: clock-controller { - compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc"; + compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc"; #clock-cells = <1>; }; @@ -1004,39 +1004,39 @@ }; sata_phy0: phy@1b400000 { - compatible = "qcom,apq8064-sata-phy"; - status = "disabled"; - reg = <0x1b400000 0x200>; - reg-names = "phy_mem"; - clocks = <&gcc SATA_PHY_CFG_CLK>; - clock-names = "cfg"; - #phy-cells = <0>; + compatible = "qcom,apq8064-sata-phy"; + status = "disabled"; + reg = <0x1b400000 0x200>; + reg-names = "phy_mem"; + clocks = <&gcc SATA_PHY_CFG_CLK>; + clock-names = "cfg"; + #phy-cells = <0>; }; sata0: sata@29000000 { - compatible = "qcom,apq8064-ahci", "generic-ahci"; - status = "disabled"; - reg = <0x29000000 0x180>; - interrupts = ; - - clocks = <&gcc SFAB_SATA_S_H_CLK>, - <&gcc SATA_H_CLK>, - <&gcc SATA_A_CLK>, - <&gcc SATA_RXOOB_CLK>, - <&gcc SATA_PMALIVE_CLK>; - clock-names = "slave_iface", - "iface", - "bus", - "rxoob", - "core_pmalive"; - - assigned-clocks = <&gcc SATA_RXOOB_CLK>, - <&gcc SATA_PMALIVE_CLK>; - assigned-clock-rates = <100000000>, <100000000>; - - phys = <&sata_phy0>; - phy-names = "sata-phy"; - ports-implemented = <0x1>; + compatible = "qcom,apq8064-ahci", "generic-ahci"; + status = "disabled"; + reg = <0x29000000 0x180>; + interrupts = ; + + clocks = <&gcc SFAB_SATA_S_H_CLK>, + <&gcc SATA_H_CLK>, + <&gcc SATA_A_CLK>, + <&gcc SATA_RXOOB_CLK>, + <&gcc SATA_PMALIVE_CLK>; + clock-names = "slave_iface", + "iface", + "bus", + "rxoob", + "core_pmalive"; + + assigned-clocks = <&gcc SATA_RXOOB_CLK>, + <&gcc SATA_PMALIVE_CLK>; + assigned-clock-rates = <100000000>, <100000000>; + + phys = <&sata_phy0>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; }; /* Temporary fixed regulator */ @@ -1076,18 +1076,18 @@ #size-cells = <1>; ranges; sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - pinctrl-names = "default"; - pinctrl-0 = <&sdcc1_pins>; + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + pinctrl-names = "default"; + pinctrl-0 = <&sdcc1_pins>; arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; + reg = <0x12400000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <96000000>; non-removable; cap-sd-highspeed; cap-mmc-highspeed; @@ -1096,36 +1096,36 @@ }; sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; + status = "disabled"; + reg = <0x12180000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <192000000>; + max-frequency = <192000000>; no-1-8-v; dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; dma-names = "tx", "rx"; }; sdcc4: mmc@121c0000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x121c0000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; + status = "disabled"; + reg = <0x121c0000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <48000000>; + max-frequency = <48000000>; dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; dma-names = "tx", "rx"; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 4022ed9df988..4b475d98343c 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1184,16 +1184,16 @@ ranges; sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x2000>; - interrupts = ; + reg = <0x12400000 0x2000>; + interrupts = ; interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <96000000>; non-removable; cap-sd-highspeed; cap-mmc-highspeed; @@ -1204,18 +1204,18 @@ }; sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x2000>; - interrupts = ; + status = "disabled"; + reg = <0x12180000 0x2000>; + interrupts = ; interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <192000000>; + max-frequency = <192000000>; sd-uhs-sdr104; sd-uhs-ddr50; vqmmc-supply = <&vsdcc_fixed>; diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 0ce0d04bd994..b47c86412de2 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -362,7 +362,7 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12180000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; + interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; @@ -382,7 +382,7 @@ status = "disabled"; reg = <0x12140000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; + interrupt-names = "cmd_irq"; clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -412,7 +412,7 @@ interrupts = , , ; - interrupt-names = "ack", "err", "wakeup"; + interrupt-names = "ack", "err", "wakeup"; regulators { compatible = "qcom,rpm-pm8018-regulators"; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 47b97daecef1..b9cded35b1cc 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -392,24 +392,24 @@ }; l2cc: clock-controller@2082000 { - compatible = "qcom,kpss-gcc", "syscon"; - reg = <0x02082000 0x1000>; + compatible = "qcom,kpss-gcc", "syscon"; + reg = <0x02082000 0x1000>; }; rpm: rpm@104000 { - compatible = "qcom,rpm-msm8660"; - reg = <0x00104000 0x1000>; - qcom,ipc = <&l2cc 0x8 2>; - - interrupts = , - , - ; - interrupt-names = "ack", "err", "wakeup"; + compatible = "qcom,rpm-msm8660"; + reg = <0x00104000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; + + interrupts = , + , + ; + interrupt-names = "ack", "err", "wakeup"; clocks = <&gcc RPM_MSG_RAM_H_CLK>; clock-names = "ram"; rpmcc: clock-controller { - compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc"; + compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc"; #clock-cells = <1>; }; @@ -486,80 +486,80 @@ #size-cells = <1>; ranges; sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <48000000>; + reg = <0x12400000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <48000000>; non-removable; cap-sd-highspeed; cap-mmc-highspeed; }; sdcc2: mmc@12140000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - reg = <0x12140000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <48000000>; + reg = <0x12140000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <48000000>; cap-sd-highspeed; cap-mmc-highspeed; }; sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; + status = "disabled"; + reg = <0x12180000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <48000000>; + max-frequency = <48000000>; no-1-8-v; }; sdcc4: mmc@121c0000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x121c0000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - max-frequency = <48000000>; + status = "disabled"; + reg = <0x121c0000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + max-frequency = <48000000>; cap-sd-highspeed; cap-mmc-highspeed; }; sdcc5: mmc@12200000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12200000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; + status = "disabled"; + reg = <0x12200000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <48000000>; + max-frequency = <48000000>; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 4a2d74cf01d2..19554f3b5196 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -148,19 +148,19 @@ }; l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc", "syscon"; - reg = <0x2011000 0x1000>; + compatible = "qcom,kpss-gcc", "syscon"; + reg = <0x2011000 0x1000>; }; rpm@108000 { - compatible = "qcom,rpm-msm8960"; - reg = <0x108000 0x1000>; - qcom,ipc = <&l2cc 0x8 2>; + compatible = "qcom,rpm-msm8960"; + reg = <0x108000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; - interrupts = , - , - ; - interrupt-names = "ack", "err", "wakeup"; + interrupts = , + , + ; + interrupt-names = "ack", "err", "wakeup"; regulators { compatible = "qcom,rpm-pm8921-regulators"; @@ -268,16 +268,16 @@ #size-cells = <1>; ranges; sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; + reg = <0x12400000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <96000000>; non-removable; cap-sd-highspeed; cap-mmc-highspeed; @@ -285,18 +285,18 @@ }; sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; + status = "disabled"; + reg = <0x12180000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <192000000>; + max-frequency = <192000000>; no-1-8-v; vmmc-supply = <&vsdcc_fixed>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 1c9f04322672..21d2c55c0465 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -78,9 +78,9 @@ &imem { reboot-mode { - mode-normal = <0x77665501>; - mode-bootloader = <0x77665500>; - mode-recovery = <0x77665502>; + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; }; }; -- cgit v1.2.3 From 9c17baaa97c89379cbd89e36115b7fb6aba43518 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:18 -0700 Subject: ARM: dts: qcom: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220616005333.18491-25-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 4 ++-- arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts | 8 ++++---- arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 4 ++-- arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi | 6 +++--- arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 ++-- arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi | 8 ++++---- arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 6 +++--- arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 6 +++--- arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 8 ++++---- 10 files changed, 28 insertions(+), 28 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index beb2058fd116..799cd0f8de40 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -44,12 +44,12 @@ gpio-keys { compatible = "gpio-keys"; - volume_up { + key-volume-up { label = "Volume Up"; gpios = <&pm8921_gpio 4 GPIO_ACTIVE_HIGH>; linux,code = ; }; - volume_down { + key-volume-down { label = "Volume Down"; gpios = <&pm8921_gpio 38 GPIO_ACTIVE_HIGH>; linux,code = ; diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts index 3cf79cc5b539..c07c5474750d 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts @@ -23,28 +23,28 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - camera-focus { + key-camera-focus { label = "camera_focus"; gpios = <&pm8921_gpio 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - camera-snapshot { + key-camera-snapshot { label = "camera_snapshot"; gpios = <&pm8921_gpio 4 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pm8921_gpio 29 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pm8921_gpio 35 GPIO_ACTIVE_LOW>; linux,input-type = <1>; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi index 1f3b1ce82108..af9a26fb5d4a 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi @@ -11,7 +11,7 @@ keys { compatible = "gpio-keys"; - reset { + key-reset { label = "reset"; gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 596d129d4a95..760151b52add 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -187,12 +187,12 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-0 = <&buttons_pins>; pinctrl-names = "default"; - button@1 { + button { label = "reset"; linux,code = ; gpios = <&qcom_pinmux 66 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi index 5c802b99e15f..ccebb7d56113 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi @@ -65,19 +65,19 @@ status = "okay"; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; pinctrl-0 = <&buttons_pins>; pinctrl-names = "default"; - button@1 { + button-1 { label = "reset"; linux,code = ; gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; linux,input-type = <1>; debounce-interval = <60>; }; - button@2 { + button-2 { label = "wps"; linux,code = ; gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 4d8fc8689d24..b994474f83e6 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -24,14 +24,14 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index a4fec2d0d158..d42b85bda33a 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -20,28 +20,28 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - camera-snapshot { + key-camera-snapshot { label = "camera_snapshot"; gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - camera-focus { + key-camera-focus { label = "camera_focus"; gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; linux,input-type = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 21d2c55c0465..e1ae99579596 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -25,7 +25,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - camera-snapshot { + key-camera-snapshot { label = "camera_snapshot"; gpios = <&pm8941_gpios 1 GPIO_ACTIVE_LOW>; linux,code = ; @@ -33,7 +33,7 @@ debounce-interval = <15>; }; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; linux,code = ; @@ -41,7 +41,7 @@ debounce-interval = <15>; }; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index 90f7a399f40b..aa609312caf9 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -25,7 +25,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pma8084_gpios 2 GPIO_ACTIVE_LOW>; linux,input-type = <1>; @@ -33,7 +33,7 @@ debounce-interval = <15>; }; - home-key { + key-home { label = "home_key"; gpios = <&pma8084_gpios 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; @@ -42,7 +42,7 @@ debounce-interval = <15>; }; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pma8084_gpios 5 GPIO_ACTIVE_LOW>; linux,input-type = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index e9bcd3b4ebb3..9fc696a7399a 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -24,28 +24,28 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pin_a>; - volume-down { + key-volume-down { label = "volume_down"; gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - camera-snapshot { + key-camera-snapshot { label = "camera_snapshot"; gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - camera-focus { + key-camera-focus { label = "camera_focus"; gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; }; - volume-up { + key-volume-up { label = "volume_up"; gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; linux,input-type = <1>; -- cgit v1.2.3 From 4eb1560259de4fd5f89ec5e7faf5d4c6a83bae9c Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Tue, 17 May 2022 22:34:51 +0200 Subject: ARM: dts: qcom: msm8974: Add BAM DMUX Ethernet/IP device BAM DMUX is used as the network interface to the modem. Signed-off-by: Luca Weiss Reviewed-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220517203450.1155696-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-msm8974.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index df49be66d0b8..3ebcf08499f9 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1146,6 +1146,18 @@ #interrupt-cells = <4>; }; + bam_dmux_dma: dma-controller@fc834000 { + compatible = "qcom,bam-v1.4.0"; + reg = <0xfc834000 0x7000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + + num-channels = <6>; + qcom,num-ees = <1>; + qcom,powered-remotely; + }; + remoteproc_mss: remoteproc@fc880000 { compatible = "qcom,msm8974-mss-pil"; reg = <0xfc880000 0x100>, <0xfc820000 0x020>; @@ -1180,6 +1192,20 @@ memory-region = <&mpss_region>; }; + bam_dmux: bam-dmux { + compatible = "qcom,bam-dmux"; + + interrupt-parent = <&modem_smsm>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "pc", "pc-ack"; + + qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>; + qcom,smem-state-names = "pc", "pc-ack"; + + dmas = <&bam_dmux_dma 4>, <&bam_dmux_dma 5>; + dma-names = "tx", "rx"; + }; + smd-edge { interrupts = ; -- cgit v1.2.3 From ab1489017aa7a9f02e24bee73cf9ec8079cd3909 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 22 May 2022 10:36:18 +0200 Subject: ARM: dts: qcom-msm8974: fix irq type on blsp2_uart1 IRQ_TYPE_NONE is invalid, so use the correct interrupt type. Signed-off-by: Luca Weiss Fixes: b05f82b152c9 ("ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220522083618.17894-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 3ebcf08499f9..96525f383d84 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -578,7 +578,7 @@ blsp2_uart1: serial@f995d000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf995d000 0x1000>; - interrupts = ; + interrupts = ; clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; -- cgit v1.2.3 From ae500b351ab0006d933d804a2b7507fe1e98cecc Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Mon, 30 May 2022 13:38:40 +0530 Subject: ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART The trigger type should be LEVEL_HIGH. So fix it! Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220530080842.37024-2-manivannan.sadhasivam@linaro.org --- arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 1c2b208a5670..ef1da28f567c 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -206,7 +206,7 @@ blsp1_uart3: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x00831000 0x200>; - interrupts = ; + interrupts = ; clocks = <&gcc 30>, <&gcc 9>; clock-names = "core", "iface"; -- cgit v1.2.3 From b8f9cae583c46ef6df0e643ec0022084d39769e7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 12:29:22 +0200 Subject: ARM: dts: qcom: apq8060-dragonboard: add function and color to LED nodes Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607102931.102805-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index a104acbfee05..70a1dd629c7a 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) #include #include +#include #include #include #include "qcom-msm8660.dtsi" @@ -416,6 +417,7 @@ compatible = "qcom,pm8058-led"; reg = <0x131>; label = "pm8058:red"; + color = ; default-state = "off"; }; led@132 { @@ -426,6 +428,7 @@ compatible = "qcom,pm8058-led"; reg = <0x132>; label = "pm8058:yellow"; + color = ; default-state = "off"; linux,default-trigger = "mmc0"; }; @@ -433,6 +436,8 @@ compatible = "qcom,pm8058-led"; reg = <0x133>; label = "pm8058:green"; + function = LED_FUNCTION_HEARTBEAT; + color = ; default-state = "on"; linux,default-trigger = "heartbeat"; }; -- cgit v1.2.3 From 966d7e9c35cf3a759b51a490308ca5d83727569f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 12:29:23 +0200 Subject: ARM: dts: qcom: apq8060-ifc6410: add color to LED node Add common LED property - the color - to LED node. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607102931.102805-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 24eacf5afbf6..dd534e303c8f 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "qcom-apq8064-v2.0.dtsi" #include +#include #include / { @@ -39,6 +40,7 @@ led@1 { label = "apq8064:green:user1"; + color = ; gpios = <&pm8921_gpio 18 GPIO_ACTIVE_HIGH>; default-state = "on"; }; -- cgit v1.2.3 From 47e889d3d9a7da9542fd5d6f76c2b1ab2d22fcaa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 12:29:24 +0200 Subject: ARM: dts: qcom: ipq4018-ap120c-ac: add function and color to LED nodes Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607102931.102805-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts | 6 ++++++ arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts | 7 +++++++ 2 files changed, 13 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts index 028ac8e24797..cf7da1ab177c 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT +#include #include "qcom-ipq4018-ap120c-ac.dtsi" / { @@ -10,17 +11,22 @@ power { label = "ap120c-ac:green:power"; + function = LED_FUNCTION_POWER; + color = ; gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; default-state = "on"; }; wlan { label = "ap120c-ac:green:wlan"; + function = LED_FUNCTION_WLAN; + color = ; gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; }; support { label = "ap120c-ac:green:support"; + color = ; gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; panic-indicator; }; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts index b7916fc26d68..c4f89b712fd9 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT +#include #include "qcom-ipq4018-ap120c-ac.dtsi" / { @@ -8,18 +9,24 @@ status: status { label = "ap120c-ac:blue:status"; + function = LED_FUNCTION_STATUS; + color = ; gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; default-state = "keep"; }; wlan2g { label = "ap120c-ac:green:wlan2g"; + function = LED_FUNCTION_WLAN; + color = ; gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; linux,default-trigger = "phy0tpt"; }; wlan5g { label = "ap120c-ac:red:wlan5g"; + function = LED_FUNCTION_WLAN; + color = ; gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "phy1tpt"; }; -- cgit v1.2.3 From 445c44e25342564326384640453d26d1655ebc44 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 12:29:25 +0200 Subject: ARM: dts: qcom: ipq8064-rb3011: add color to LED node Add common LED property - the color - to LED node. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607102931.102805-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 760151b52add..9034f00f2bd8 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "qcom-ipq8064.dtsi" #include +#include / { model = "MikroTik RB3011UiAS-RM"; @@ -208,6 +209,7 @@ led@7 { label = "rb3011:green:user"; + color = ; gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>; default-state = "off"; }; -- cgit v1.2.3 From 69b1142baeab4e1603a94b5e8c1676ecc911c9b5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 12:29:26 +0200 Subject: ARM: dts: qcom: ipq8064: add function to LED nodes Add common LED property - the function - to LED nodes. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607102931.102805-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi index ccebb7d56113..411c8d63c38e 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "qcom-ipq8064.dtsi" #include +#include / { model = "Qualcomm Technologies, Inc. IPQ8064-v1.0"; @@ -107,6 +108,7 @@ led@9 { label = "status_led_fail"; + function = LED_FUNCTION_STATUS; gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; default-state = "off"; }; @@ -119,6 +121,7 @@ led@53 { label = "status_led_pass"; + function = LED_FUNCTION_STATUS; gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; default-state = "off"; }; -- cgit v1.2.3 From 230b5edaa34b81d0f1de675ff17d8777f9f2d02b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 19:18:37 +0200 Subject: ARM: dts: qcom: use generic sram as name for imem and ocmem nodes According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski Reviewed-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607171848.535128-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 2 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++-- arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index 799cd0f8de40..f3618826f530 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -341,7 +341,7 @@ }; }; - imem@2a03f000 { + sram@2a03f000 { compatible = "syscon", "simple-mfd"; reg = <0x2a03f000 0x1000>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 96525f383d84..b834401fbae0 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1629,7 +1629,7 @@ }; }; - ocmem@fdd00000 { + sram@fdd00000 { compatible = "qcom,msm8974-ocmem"; reg = <0xfdd00000 0x2000>, <0xfec00000 0x180000>; @@ -1676,7 +1676,7 @@ }; }; - imem: imem@fe805000 { + imem: sram@fe805000 { compatible = "syscon", "simple-mfd"; reg = <0xfe805000 0x1000>; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index ef1da28f567c..a6c50ca29bf7 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -561,7 +561,7 @@ #interrupt-cells = <2>; }; - imem@1468f000 { + sram@1468f000 { compatible = "simple-mfd"; reg = <0x1468f000 0x1000>; -- cgit v1.2.3 From 626a60292a8eb345df71b40ecaea54395ca8e618 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 19:18:38 +0200 Subject: ARM: dts: qcom: apq8064-asus-nexus7: add dedicated IMEM compatible syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607171848.535128-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index f3618826f530..fee278e32cb6 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -342,7 +342,7 @@ }; sram@2a03f000 { - compatible = "syscon", "simple-mfd"; + compatible = "qcom,apq8064-imem", "syscon", "simple-mfd"; reg = <0x2a03f000 0x1000>; reboot-mode { -- cgit v1.2.3 From f19be941efd19b6c68eef87a2d4a1942e4ebd493 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 19:18:39 +0200 Subject: ARM: dts: qcom: msm8974: add dedicated IMEM compatible syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607171848.535128-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index b834401fbae0..ce8a5207579b 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1677,7 +1677,7 @@ }; imem: sram@fe805000 { - compatible = "syscon", "simple-mfd"; + compatible = "qcom,msm8974-imem", "syscon", "simple-mfd"; reg = <0xfe805000 0x1000>; reboot-mode { -- cgit v1.2.3 From def2565bc66da3e9643f71b2be5f8e707cbdebd0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 19:18:40 +0200 Subject: ARM: dts: qcom: sdx55: add dedicated IMEM and syscon compatibles Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607171848.535128-6-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index a6c50ca29bf7..f37091143ac5 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -562,7 +562,7 @@ }; sram@1468f000 { - compatible = "simple-mfd"; + compatible = "qcom,sdx55-imem", "syscon", "simple-mfd"; reg = <0x1468f000 0x1000>; #address-cells = <1>; -- cgit v1.2.3 From 7a16ea7f3a5ec0f30b146b058c273b7a9c8ceadf Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jun 2022 19:18:41 +0200 Subject: ARM: dts: qcom: msm8974: add required ranges to OCMEM The OCMEM bindings require ranges property. Fixes: a2cc991ed634 ("ARM: dts: qcom: msm8974: add ocmem node") Signed-off-by: Krzysztof Kozlowski Reviewed-by: Luca Weiss Tested-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220607171848.535128-7-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index ce8a5207579b..5e3ad97c579e 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1634,6 +1634,7 @@ reg = <0xfdd00000 0x2000>, <0xfec00000 0x180000>; reg-names = "ctrl", "mem"; + ranges = <0 0xfec00000 0x180000>; clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, <&mmcc OCMEMCX_OCMEMNOC_CLK>; clock-names = "core", "iface"; -- cgit v1.2.3 From e2759fa0676c9a32bbddb9aff955b54bb35066ad Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Jun 2022 13:27:02 +0200 Subject: ARM: dts: qcom: pm8841: add required thermal-sensor-cells The PM8841 temperature sensor has to define thermal-sensor-cells. Fixes: dab8134ca072 ("ARM: dts: qcom: Add PM8841 functions device nodes") Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220608112702.80873-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-pm8841.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi index 2caf71eacb52..b5cdde034d18 100644 --- a/arch/arm/boot/dts/qcom-pm8841.dtsi +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi @@ -24,6 +24,7 @@ compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <0>; }; }; -- cgit v1.2.3 From 6ac2799c3096dc2fe6d65026efa8a6cf212976bd Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Thu, 9 Jun 2022 15:23:40 +0300 Subject: ARM: dts: qcom: apq8064-ifc6410: drop hdmi-mux-supply The HDMI circuitry on the IFC6410 is not powered by the 3v3. Drop the hdmi-mux-supply property. Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220609122350.3157529-5-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index dd534e303c8f..0322cb88d448 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -343,7 +343,6 @@ status = "okay"; core-vdda-supply = <&pm8921_hdmi_switch>; - hdmi-mux-supply = <&ext_3p3v>; hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>; -- cgit v1.2.3 From fe5651cc8e33b5fcdc351e36cd0cd4bff2f6192f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Thu, 9 Jun 2022 15:23:49 +0300 Subject: ARM: dts: qcom: apq8064: drop phy-names from HDMI device node The HDMI driver doesn't use the phy-names to identify the PHY. Different Qualcomm platforms have used different names for the PHY. So, we are deprecating phy-names propertty of the HDMI device and dropping them from existing DTs. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220609122350.3157529-14-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 452afcacd64d..91adcbd54b17 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1420,7 +1420,6 @@ "slave_iface"; phys = <&hdmi_phy>; - phy-names = "hdmi-phy"; ports { #address-cells = <1>; -- cgit v1.2.3 From 2477d81901a23ad80045798edbeb7f91b5ff6143 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Sun, 15 May 2022 03:24:19 +0530 Subject: ARM: dts: qcom: Fix sdhci node names - use 'mmc@' Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson Cc: Rob Herring Signed-off-by: Bhupesh Sharma [bjorn: Extracted from combined arm64 patch] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org --- arch/arm/boot/dts/qcom-apq8084.dtsi | 4 ++-- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8226.dtsi | 6 +++--- arch/arm/boot/dts/qcom-msm8974.dtsi | 6 +++--- arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +- arch/arm/boot/dts/qcom-sdx65.dtsi | 2 +- 6 files changed, 11 insertions(+), 11 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index cb01faa23eb7..3e8bded2b5c8 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -419,7 +419,7 @@ status = "disabled"; }; - sdhci@f9824900 { + mmc@f9824900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -432,7 +432,7 @@ status = "disabled"; }; - sdhci@f98a4900 { + mmc@f98a4900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index c5da723f7674..a2632349cec4 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -221,7 +221,7 @@ status = "disabled"; }; - sdhci: sdhci@7824900 { + sdhci: mmc@7824900 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7824900 0x11c>, <0x7824000 0x800>; interrupts = , ; diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 28eca15b5712..0b5effdb269a 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -134,7 +134,7 @@ reg = <0xf9011000 0x1000>; }; - sdhc_1: sdhci@f9824900 { + sdhc_1: mmc@f9824900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -150,7 +150,7 @@ status = "disabled"; }; - sdhc_2: sdhci@f98a4900 { + sdhc_2: mmc@f98a4900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -166,7 +166,7 @@ status = "disabled"; }; - sdhc_3: sdhci@f9864900 { + sdhc_3: mmc@f9864900 { compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5e3ad97c579e..8131d3e222cb 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -436,7 +436,7 @@ reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>; }; - sdhc_1: sdhci@f9824900 { + sdhc_1: mmc@f9824900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -453,7 +453,7 @@ status = "disabled"; }; - sdhc_3: sdhci@f9864900 { + sdhc_3: mmc@f9864900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -472,7 +472,7 @@ status = "disabled"; }; - sdhc_2: sdhci@f98a4900 { + sdhc_2: mmc@f98a4900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc_mem", "core_mem"; diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index f37091143ac5..c72540223fa9 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -388,7 +388,7 @@ reg = <0x01fc0000 0x1000>; }; - sdhc_1: sdhci@8804000 { + sdhc_1: mmc@8804000 { compatible = "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5"; reg = <0x08804000 0x1000>; interrupts = , diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 1881b6d2485b..7a193678b4f5 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -331,7 +331,7 @@ }; }; - sdhc_1: sdhci@8804000 { + sdhc_1: mmc@8804000 { compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5"; reg = <0x08804000 0x1000>; reg-names = "hc_mem"; -- cgit v1.2.3 From 005627ea13c9c64e1a880d18f2d2b7a0c89bd4a5 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 15 Jun 2022 11:06:32 +0300 Subject: ARM: dts: at91: sama5d2: fix compilation warning Fix the following compilation warning: Warning (simple_bus_reg): /ahb/apb/resistive-touch: missing or empty reg/ranges property Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220615080633.1881196-1-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama5d2.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 89c71d419f82..b147db8b973f 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -99,6 +99,16 @@ ranges = <0 0x00200000 0x20000>; }; + resistive_touch: resistive-touch { + compatible = "resistive-adc-touch"; + io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>, + <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>, + <&adc AT91_SAMA5D2_ADC_P_CHANNEL>; + io-channel-names = "x", "y", "pressure"; + touchscreen-min-pressure = <50000>; + status = "disabled"; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -1050,16 +1060,6 @@ status = "disabled"; }; - resistive_touch: resistive-touch { - compatible = "resistive-adc-touch"; - io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>, - <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>, - <&adc AT91_SAMA5D2_ADC_P_CHANNEL>; - io-channel-names = "x", "y", "pressure"; - touchscreen-min-pressure = <50000>; - status = "disabled"; - }; - pioA: pinctrl@fc038000 { compatible = "atmel,sama5d2-pinctrl"; reg = <0xfc038000 0x600>; -- cgit v1.2.3 From b66724d23d1d1b7eb968aff9513e9724c8a3d613 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 15 Jun 2022 11:06:33 +0300 Subject: ARM: dts: at91: sama5d2: fix compilation warning Fix the following compilation warning: arch/arm/boot/dts/sama5d2.dtsi:371.29-382.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/ethernet@f8008000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property also defined at arch/arm/boot/dts/at91-sama5d2_icp.dts:353.8-363.3 Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220615080633.1881196-2-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 2 ++ arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 2 ++ arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 ++ arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 ++ arch/arm/boot/dts/sama5d2.dtsi | 2 -- 5 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi index a4623cc67cc1..c365731b2cce 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi @@ -83,6 +83,8 @@ macb0: ethernet@f8008000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_default>; + #address-cells = <1>; + #size-cells = <0>; phy-mode = "rmii"; ethernet-phy@7 { diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi index ba621783acdb..76b2025c67b4 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -194,6 +194,8 @@ &macb0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_default>; + #address-cells = <1>; + #size-cells = <0>; phy-mode = "rmii"; ethernet-phy@0 { diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 8ed58af01391..88cf125a55ed 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -139,6 +139,8 @@ macb0: ethernet@f8008000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>; + #address-cells = <1>; + #size-cells = <0>; phy-mode = "rmii"; status = "okay"; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index cdfe891f9a9e..bcc3c1bacb25 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -147,6 +147,8 @@ macb0: ethernet@f8008000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>; + #address-cells = <1>; + #size-cells = <0>; phy-mode = "rmii"; status = "okay"; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index b147db8b973f..5b2f2e922d40 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -384,8 +384,6 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 0 */ 66 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 1 */ 67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */ - #address-cells = <1>; - #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "hclk", "pclk"; status = "disabled"; -- cgit v1.2.3 From 979813d2ab70513a4dca68a13cd75fc656579b19 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Fri, 10 Jun 2022 12:24:06 +0300 Subject: ARM: dts: at91: use generic name for reset controller Use generic name for reset controller of AT91 devices to comply with DT specifications. Signed-off-by: Claudiu Beznea Reviewed-by: Philipp Zabel Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com --- arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 2 +- arch/arm/boot/dts/at91sam9g45.dtsi | 2 +- arch/arm/boot/dts/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/sam9x60.dtsi | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 7368347c9357..9d9820db9482 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -123,7 +123,7 @@ clock-names = "slow_xtal", "main_xtal"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index 7adc36ca8a46..259aca565305 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -603,7 +603,7 @@ clock-names = "slow_xtal", "main_xtal"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index fe45d96239c9..c080df8c2312 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -151,7 +151,7 @@ clock-names = "t0_clk", "slow_clk"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&slow_xtal>; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 2ab730fd6472..09794561c7ce 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -137,7 +137,7 @@ clock-names = "slow_clk", "main_xtal"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9g45-rstc"; reg = <0xfffffd00 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 0785389f5507..556f35ce49e3 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -126,7 +126,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; - rstc@fffffe00 { + reset-controller@fffffe00 { compatible = "atmel,at91sam9g45-rstc"; reg = <0xfffffe00 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 730d1182c73e..12c634811820 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -766,7 +766,7 @@ clock-names = "slow_clk", "main_xtal"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 395e883644cd..ea3b11336c79 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -134,7 +134,7 @@ clock-names = "slow_clk", "main_xtal"; }; - reset_controller: rstc@fffffe00 { + reset_controller: reset-controller@fffffe00 { compatible = "atmel,at91sam9g45-rstc"; reg = <0xfffffe00 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index c328b67bea0c..6b1d4492444a 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -667,7 +667,7 @@ clock-names = "td_slck", "md_slck", "main_xtal"; }; - reset_controller: rstc@fffffe00 { + reset_controller: reset-controller@fffffe00 { compatible = "microchip,sam9x60-rstc"; reg = <0xfffffe00 0x10>; clocks = <&clk32k 0>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5b2f2e922d40..0baa18655830 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -668,7 +668,7 @@ ranges = <0 0xf8044000 0x1420>; }; - reset_controller: rstc@f8048000 { + reset_controller: reset-controller@f8048000 { compatible = "atmel,sama5d3-rstc"; reg = <0xf8048000 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 8fa423c52592..2d0935ad2225 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -1003,7 +1003,7 @@ clock-names = "slow_clk", "main_xtal"; }; - reset_controller: rstc@fffffe00 { + reset_controller: reset-controller@fffffe00 { compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; reg = <0xfffffe00 0x10>; clocks = <&clk32k>; diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index 7b9242664875..1e5c01898ccf 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -726,7 +726,7 @@ }; }; - reset_controller: rstc@fc068600 { + reset_controller: reset-controller@fc068600 { compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; reg = <0xfc068600 0x10>; clocks = <&clk32k>; -- cgit v1.2.3 From d657ab84476b1e11146b0c0fa7856d39a8b80da2 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Fri, 10 Jun 2022 12:24:14 +0300 Subject: ARM: dts: at91: sama7g5: add reset-controller node Add reset controller node. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220610092414.1816571-10-claudiu.beznea@microchip.com --- arch/arm/boot/dts/sama7g5.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index a37e3a80392d..bb6d71e6dfeb 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -198,6 +198,13 @@ clock-names = "td_slck", "md_slck", "main_xtal"; }; + reset_controller: reset-controller@e001d000 { + compatible = "microchip,sama7g5-rstc"; + reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + shdwc: shdwc@e001d010 { compatible = "microchip,sama7g5-shdwc", "syscon"; reg = <0xe001d010 0x10>; -- cgit v1.2.3 From 3e6fd02fce7bc415d702490026b41107c2c83763 Mon Sep 17 00:00:00 2001 From: Kavyasree Kotagiri Date: Mon, 27 Jun 2022 16:35:52 +0530 Subject: ARM: dts: lan966x: Add mcan1 node. Add the mcan1 node. By default, keep it disabled. Signed-off-by: Kavyasree Kotagiri Acked-by: Nicolas Ferre Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220627110552.26315-1-kavyasree.kotagiri@microchip.com --- arch/arm/boot/dts/lan966x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 3cb02fffe716..25cfa89dde7b 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -473,6 +473,21 @@ status = "disabled"; }; + can1: can@e0820000 { + compatible = "bosch,m_can"; + reg = <0xe0820000 0xfc>, <0x00100000 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clks GCK_ID_MCAN1>, <&clks GCK_ID_MCAN1>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&clks GCK_ID_MCAN1>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>; + status = "disabled"; + }; + reset: reset-controller@e200400c { compatible = "microchip,lan966x-switch-reset"; reg = <0xe200400c 0x4>; -- cgit v1.2.3 From c6aaccf1c906fd9539b738a59f53dda603c99b2e Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 2 Jul 2022 00:53:39 +0200 Subject: ARM: dts: ux500: Drop unused i2c power domain supply This regulator supply is replaced by the proper power domain. Reported-by: Rob Herring Link: https://lore.kernel.org/r/20220701225339.814962-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index c28b32640254..9afe8301bd47 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -661,7 +661,6 @@ #address-cells = <1>; #size-cells = <0>; - v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>; @@ -679,7 +678,6 @@ #address-cells = <1>; #size-cells = <0>; - v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; @@ -698,7 +696,6 @@ #address-cells = <1>; #size-cells = <0>; - v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; @@ -717,7 +714,6 @@ #address-cells = <1>; #size-cells = <0>; - v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; @@ -736,7 +732,6 @@ #address-cells = <1>; #size-cells = <0>; - v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; -- cgit v1.2.3 From 04069a86bf9650f82ee29715322165bd7739a7c2 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 30 Jun 2022 18:32:06 -0400 Subject: ARM: dts: layerscape: Add SFP node for TA 2.1 devices This adds an appropriate SFP node for Trust Architecture 2.1 devices. Signed-off-by: Sean Anderson Signed-off-by: Shawn Guo --- arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 6c88be2a7e8e..fa761620f073 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -129,6 +129,13 @@ status = "disabled"; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1021a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x1000>; -- cgit v1.2.3 From 43a4ab4cf5683b1d5efd0f5174f687412bfec9c5 Mon Sep 17 00:00:00 2001 From: Kavyasree Kotagiri Date: Mon, 4 Jul 2022 11:58:09 -0200 Subject: ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings. On pcb8291, Flexcom3 usart has only tx and rx pins. Cleaningup usart3 pinctrl settings. Signed-off-by: Kavyasree Kotagiri Acked-by: Nicolas Ferre Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220704135809.6952-1-kavyasree.kotagiri@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index 3c7e3a7d6f14..d56d2054c38d 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -19,19 +19,9 @@ }; &gpio { - fc_shrd7_pins: fc_shrd7-pins { - pins = "GPIO_49"; - function = "fc_shrd7"; - }; - - fc_shrd8_pins: fc_shrd8-pins { - pins = "GPIO_54"; - function = "fc_shrd8"; - }; - - fc3_b_pins: fcb3-spi-pins { - /* SCK, RXD, TXD */ - pins = "GPIO_51", "GPIO_52", "GPIO_53"; + fc3_b_pins: fc3-b-pins { + /* RX, TX */ + pins = "GPIO_52", "GPIO_53"; function = "fc3_b"; }; @@ -53,7 +43,7 @@ status = "okay"; usart3: serial@200 { - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>; + pinctrl-0 = <&fc3_b_pins>; pinctrl-names = "default"; status = "okay"; }; -- cgit v1.2.3 From 7d9802bb0e34f118375937c6caa94818416c865a Mon Sep 17 00:00:00 2001 From: Fabien Dessenne Date: Tue, 3 May 2022 16:56:06 +0200 Subject: ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151 The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so remove the unsupported "wakeup" one. Note that the EXTI interrupt 61 has two roles : it is hierarchically linked to the GIC IPCC "rx" interrupt, and it acts as a wakeup source. Signed-off-by: Fabien Dessenne Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp151.dtsi | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index e04dda5ddd95..742fdeeff4b6 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1117,10 +1117,9 @@ reg = <0x4c001000 0x400>; st,proc-id = <0>; interrupts-extended = - <&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, - <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <&exti 61 1>; - interrupt-names = "rx", "tx", "wakeup"; + <&exti 61 1>, + <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rx", "tx"; clocks = <&rcc IPCC>; wakeup-source; status = "disabled"; -- cgit v1.2.3 From 1748c5c13e1586d3a359334f959626ba0f760fa5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 4 May 2022 14:49:45 +0200 Subject: ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3 in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant which has extra Empirion DCDC converter in front of the 1V8 IO supply, or outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter. The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily high input voltage to the Empirion DCDC converter, so move it into matching DTSI to stop confusing users. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi | 5 +++++ arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi index 75172314d7af..9937b28548c2 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi @@ -18,6 +18,11 @@ }; }; +&vdd { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; +}; + &pwr_regulators { vdd-supply = <&vdd_io>; }; diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi index 6336c3ca0f0e..134a798ad3f2 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi @@ -119,8 +119,8 @@ vdd: buck3 { regulator-name = "vdd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-always-on; regulator-initial-mode = <0>; regulator-over-current-protection; -- cgit v1.2.3 From 95a73a50da9b0590c20010b64479d1736c95532b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 26 May 2022 22:36:32 +0200 Subject: ARM: dts: stm32: adjust whitespace around '=' on MCU boards Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32429i-eval.dts | 8 ++++---- arch/arm/boot/dts/stm32h743.dtsi | 4 ++-- arch/arm/boot/dts/stm32h743i-disco.dts | 8 ++++---- arch/arm/boot/dts/stm32h743i-eval.dts | 8 ++++---- arch/arm/boot/dts/stm32h750i-art-pi.dts | 8 ++++---- 5 files changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts index 0d98aca01736..3de0e9dbe030 100644 --- a/arch/arm/boot/dts/stm32429i-eval.dts +++ b/arch/arm/boot/dts/stm32429i-eval.dts @@ -251,10 +251,10 @@ &mac { status = "okay"; - pinctrl-0 = <ðernet_mii>; - pinctrl-names = "default"; - phy-mode = "mii"; - phy-handle = <&phy1>; + pinctrl-0 = <ðernet_mii>; + pinctrl-names = "default"; + phy-mode = "mii"; + phy-handle = <&phy1>; mdio0 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 91dde07a38ba..2059593da21d 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -375,7 +375,7 @@ arm,primecell-periphid = <0x10153180>; reg = <0x52007000 0x1000>; interrupts = <49>; - interrupt-names = "cmd_irq"; + interrupt-names = "cmd_irq"; clocks = <&rcc SDMMC1_CK>; clock-names = "apb_pclk"; resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>; @@ -389,7 +389,7 @@ arm,primecell-periphid = <0x10153180>; reg = <0x48022400 0x400>; interrupts = <124>; - interrupt-names = "cmd_irq"; + interrupt-names = "cmd_irq"; clocks = <&rcc SDMMC2_CK>; clock-names = "apb_pclk"; resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>; diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts index 59e01ce10318..2b452883a708 100644 --- a/arch/arm/boot/dts/stm32h743i-disco.dts +++ b/arch/arm/boot/dts/stm32h743i-disco.dts @@ -77,10 +77,10 @@ &mac { status = "disabled"; - pinctrl-0 = <ðernet_rmii>; - pinctrl-names = "default"; - phy-mode = "rmii"; - phy-handle = <&phy0>; + pinctrl-0 = <ðernet_rmii>; + pinctrl-names = "default"; + phy-mode = "rmii"; + phy-handle = <&phy0>; mdio0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts index 38cc7faf6884..5c5d8059bdc7 100644 --- a/arch/arm/boot/dts/stm32h743i-eval.dts +++ b/arch/arm/boot/dts/stm32h743i-eval.dts @@ -115,10 +115,10 @@ &mac { status = "disabled"; - pinctrl-0 = <ðernet_rmii>; - pinctrl-names = "default"; - phy-mode = "rmii"; - phy-handle = <&phy0>; + pinctrl-0 = <ðernet_rmii>; + pinctrl-names = "default"; + phy-mode = "rmii"; + phy-handle = <&phy0>; mdio0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/stm32h750i-art-pi.dts b/arch/arm/boot/dts/stm32h750i-art-pi.dts index 9bb73bb61901..f3e70d3b65ac 100644 --- a/arch/arm/boot/dts/stm32h750i-art-pi.dts +++ b/arch/arm/boot/dts/stm32h750i-art-pi.dts @@ -126,10 +126,10 @@ &mac { status = "disabled"; - pinctrl-0 = <ðernet_rmii>; - pinctrl-names = "default"; - phy-mode = "rmii"; - phy-handle = <&phy0>; + pinctrl-0 = <ðernet_rmii>; + pinctrl-names = "default"; + phy-mode = "rmii"; + phy-handle = <&phy0>; mdio0 { #address-cells = <1>; -- cgit v1.2.3 From b2082d28d8c63678b80bf08e79b484c8982793f8 Mon Sep 17 00:00:00 2001 From: Leonard Göhrs Date: Fri, 3 Jun 2022 11:44:20 +0200 Subject: ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1 According to the OSD32MP1 Power System overview[1] ldo3's input is always internally connected to vdd_ddr. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Leonard Göhrs Reviewed-by: Ahmad Fatoum Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15xx-osd32.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi index 6706d8311a66..e997c4953fd1 100644 --- a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi @@ -78,6 +78,7 @@ compatible = "st,stpmic1-regulators"; ldo1-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; ldo6-supply = <&v3v3>; pwr_sw1-supply = <&bst_out>; -- cgit v1.2.3 From ef4ea690c5d75685592d687e1bfe0466808de246 Mon Sep 17 00:00:00 2001 From: Leonard Göhrs Date: Fri, 3 Jun 2022 11:44:21 +0200 Subject: ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32 According to the OSD32MP1 Power System overview[1] the EEPROM is connected to the VDD line and not to some single-purpose fixed regulator. Set the EEPROM supply according to the diagram to eliminate this parent-less regulator. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Leonard Göhrs Acked-by: Ahmad Fatoum Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15xx-osd32.dtsi | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi index e997c4953fd1..935b7084b5a2 100644 --- a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi @@ -50,12 +50,6 @@ no-map; }; }; - - reg_sip_eeprom: regulator_eeprom { - compatible = "regulator-fixed"; - regulator-name = "sip_eeprom"; - regulator-always-on; - }; }; &i2c4 { @@ -204,7 +198,7 @@ sip_eeprom: eeprom@50 { compatible = "atmel,24c32"; - vcc-supply = <®_sip_eeprom>; + vcc-supply = <&vdd>; reg = <0x50>; }; }; -- cgit v1.2.3 From 63058bfbdaf4c59cd5883d982a5a620471b7af52 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 23 Feb 2022 10:16:06 +0100 Subject: ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13 Enable optee and SCMI clocks support. Signed-off-by: Gabriel Fernandez Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index f9ebc47e6421..edbc602d2057 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -27,6 +27,31 @@ interrupt-parent = <&intc>; }; + firmware { + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + }; + + scmi: scmi { + compatible = "linaro,scmi-optee"; + #address-cells = <1>; + #size-cells = <0>; + linaro,optee-channel-id = <0>; + shmem = <&scmi_shm>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + }; + }; + clocks { clk_axi: clk-axi { #clock-cells = <0>; @@ -113,6 +138,19 @@ interrupt-parent = <&intc>; ranges; + scmi_sram: sram@2ffff000 { + compatible = "mmio-sram"; + reg = <0x2ffff000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2ffff000 0x1000>; + + scmi_shm: scmi-sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0 0x80>; + }; + }; + uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; -- cgit v1.2.3 From f95634becdad3fecc01310a45bd54497c64a13c9 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 23 Feb 2022 10:18:19 +0100 Subject: ARM: dts: stm32: add RCC on STM32MP13x SoC family Enables Reset and Clocks Controller on STM32MP13 Signed-off-by: Gabriel Fernandez Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp131.dtsi | 116 +++++++++++++------------------------ arch/arm/boot/dts/stm32mp133.dtsi | 4 +- arch/arm/boot/dts/stm32mp13xc.dtsi | 3 +- arch/arm/boot/dts/stm32mp13xf.dtsi | 3 +- 4 files changed, 47 insertions(+), 79 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index edbc602d2057..3a921db23e9f 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -4,6 +4,8 @@ * Author: Alexandre Torgue for STMicroelectronics. */ #include +#include +#include / { #address-cells = <1>; @@ -52,62 +54,6 @@ }; }; - clocks { - clk_axi: clk-axi { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <266500000>; - }; - - clk_hse: clk-hse { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - }; - - clk_hsi: clk-hsi { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <64000000>; - }; - - clk_lsi: clk-lsi { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32000>; - }; - - clk_pclk3: clk-pclk3 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <104438965>; - }; - - clk_pclk4: clk-pclk4 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <133250000>; - }; - - clk_pll4_p: clk-pll4_p { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - - clk_pll4_r: clk-pll4_r { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <99000000>; - }; - - clk_rtc_k: clk-rtc-k { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - }; - }; - intc: interrupt-controller@a0021000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; @@ -155,7 +101,8 @@ compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; interrupts = ; - clocks = <&clk_hsi>; + clocks = <&rcc UART4_K>; + resets = <&rcc UART4_R>; status = "disabled"; }; @@ -170,7 +117,8 @@ , , ; - clocks = <&clk_pclk4>; + clocks = <&rcc DMA1>; + resets = <&rcc DMA1_R>; #dma-cells = <4>; st,mem2mem; dma-requests = <8>; @@ -187,7 +135,8 @@ , , ; - clocks = <&clk_pclk4>; + clocks = <&rcc DMA2>; + resets = <&rcc DMA2_R>; #dma-cells = <4>; st,mem2mem; dma-requests = <8>; @@ -196,13 +145,27 @@ dmamux1: dma-router@48002000 { compatible = "st,stm32h7-dmamux"; reg = <0x48002000 0x40>; - clocks = <&clk_pclk4>; + clocks = <&rcc DMAMUX1>; + resets = <&rcc DMAMUX1_R>; #dma-cells = <3>; dma-masters = <&dma1 &dma2>; dma-requests = <128>; dma-channels = <16>; }; + rcc: rcc@50000000 { + compatible = "st,stm32mp13-rcc", "syscon"; + reg = <0x50000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + clock-names = "hse", "hsi", "csi", "lse", "lsi"; + clocks = <&scmi_clk CK_SCMI_HSE>, + <&scmi_clk CK_SCMI_HSI>, + <&scmi_clk CK_SCMI_CSI>, + <&scmi_clk CK_SCMI_LSE>, + <&scmi_clk CK_SCMI_LSI>; + }; + exti: interrupt-controller@5000d000 { compatible = "st,stm32mp13-exti", "syscon"; interrupt-controller; @@ -213,14 +176,14 @@ syscfg: syscon@50020000 { compatible = "st,stm32mp157-syscfg", "syscon"; reg = <0x50020000 0x400>; - clocks = <&clk_pclk3>; + clocks = <&rcc SYSCFG>; }; mdma: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; interrupts = ; - clocks = <&clk_pclk4>; + clocks = <&rcc MDMA>; #dma-cells = <5>; dma-channels = <32>; dma-requests = <48>; @@ -232,8 +195,9 @@ reg = <0x58005000 0x1000>, <0x58006000 0x1000>; interrupts = ; interrupt-names = "cmd_irq"; - clocks = <&clk_pll4_p>; + clocks = <&rcc SDMMC1_K>; clock-names = "apb_pclk"; + resets = <&rcc SDMMC1_R>; cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <130000000>; @@ -246,8 +210,9 @@ reg = <0x58007000 0x1000>, <0x58008000 0x1000>; interrupts = ; interrupt-names = "cmd_irq"; - clocks = <&clk_pll4_p>; + clocks = <&rcc SDMMC2_K>; clock-names = "apb_pclk"; + resets = <&rcc SDMMC2_R>; cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <130000000>; @@ -257,7 +222,7 @@ iwdg2: watchdog@5a002000 { compatible = "st,stm32mp1-iwdg"; reg = <0x5a002000 0x400>; - clocks = <&clk_pclk4>, <&clk_lsi>; + clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>; clock-names = "pclk", "lsi"; status = "disabled"; }; @@ -266,7 +231,8 @@ compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_pclk4>, <&clk_rtc_k>; + clocks = <&scmi_clk CK_SCMI_RTCAPB>, + <&scmi_clk CK_SCMI_RTC>; clock-names = "pclk", "rtc_ck"; status = "disabled"; }; @@ -307,7 +273,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x0 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOA>; st,bank-name = "GPIOA"; ngpios = <16>; gpio-ranges = <&pinctrl 0 0 16>; @@ -319,7 +285,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x1000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOB>; st,bank-name = "GPIOB"; ngpios = <16>; gpio-ranges = <&pinctrl 0 16 16>; @@ -331,7 +297,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x2000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOC>; st,bank-name = "GPIOC"; ngpios = <16>; gpio-ranges = <&pinctrl 0 32 16>; @@ -343,7 +309,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x3000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOD>; st,bank-name = "GPIOD"; ngpios = <16>; gpio-ranges = <&pinctrl 0 48 16>; @@ -355,7 +321,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x4000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOE>; st,bank-name = "GPIOE"; ngpios = <16>; gpio-ranges = <&pinctrl 0 64 16>; @@ -367,7 +333,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x5000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOF>; st,bank-name = "GPIOF"; ngpios = <16>; gpio-ranges = <&pinctrl 0 80 16>; @@ -379,7 +345,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x6000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOG>; st,bank-name = "GPIOG"; ngpios = <16>; gpio-ranges = <&pinctrl 0 96 16>; @@ -391,7 +357,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x7000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOH>; st,bank-name = "GPIOH"; ngpios = <15>; gpio-ranges = <&pinctrl 0 112 15>; @@ -403,7 +369,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x8000 0x400>; - clocks = <&clk_pclk4>; + clocks = <&rcc GPIOI>; st,bank-name = "GPIOI"; ngpios = <8>; gpio-ranges = <&pinctrl 0 128 8>; diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi index 0fb1386257cf..531c263c9f46 100644 --- a/arch/arm/boot/dts/stm32mp133.dtsi +++ b/arch/arm/boot/dts/stm32mp133.dtsi @@ -15,7 +15,7 @@ interrupts = , ; interrupt-names = "int0", "int1"; - clocks = <&clk_hse>, <&clk_pll4_r>; + clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; status = "disabled"; @@ -28,7 +28,7 @@ interrupts = , ; interrupt-names = "int0", "int1"; - clocks = <&clk_hse>, <&clk_pll4_r>; + clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; status = "disabled"; diff --git a/arch/arm/boot/dts/stm32mp13xc.dtsi b/arch/arm/boot/dts/stm32mp13xc.dtsi index fa6889e30591..4d00e7592882 100644 --- a/arch/arm/boot/dts/stm32mp13xc.dtsi +++ b/arch/arm/boot/dts/stm32mp13xc.dtsi @@ -10,7 +10,8 @@ compatible = "st,stm32mp1-cryp"; reg = <0x54002000 0x400>; interrupts = ; - clocks = <&clk_axi>; + clocks = <&rcc CRYP1>; + resets = <&rcc CRYP1_R>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/stm32mp13xf.dtsi b/arch/arm/boot/dts/stm32mp13xf.dtsi index fa6889e30591..4d00e7592882 100644 --- a/arch/arm/boot/dts/stm32mp13xf.dtsi +++ b/arch/arm/boot/dts/stm32mp13xf.dtsi @@ -10,7 +10,8 @@ compatible = "st,stm32mp1-cryp"; reg = <0x54002000 0x400>; interrupts = ; - clocks = <&clk_axi>; + clocks = <&rcc CRYP1>; + resets = <&rcc CRYP1_R>; status = "disabled"; }; }; -- cgit v1.2.3 From e007ec8422d3a4286f9ecdab35e92b710843b7e1 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Fri, 13 May 2022 16:51:48 +0200 Subject: ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk Add the static OP-TEE reserved memory regions. Signed-off-by: Gabriel Fernandez Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp135f-dk.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts index 09d6226d598f..e6b8ffd332c7 100644 --- a/arch/arm/boot/dts/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/stm32mp135f-dk.dts @@ -26,6 +26,17 @@ reg = <0xc0000000 0x20000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + optee@dd000000 { + reg = <0xdd000000 0x3000000>; + no-map; + }; + }; + gpio-keys { compatible = "gpio-keys"; -- cgit v1.2.3 From 4dd1a613e464e9036d5163fc8ec5f7dc6e394b53 Mon Sep 17 00:00:00 2001 From: Herve Codina Date: Mon, 4 Jul 2022 12:28:45 +0200 Subject: ARM: dts: lan966x: Add UDPHS support Add UDPHS (the USB High Speed Device Port controller) support. The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS IP. This IP is also the same as the one present in the SAMA5D3 SOC. Signed-off-by: Herve Codina Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220704102845.168438-4-herve.codina@bootlin.com --- arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 25cfa89dde7b..7962d226242c 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -84,6 +84,17 @@ #size-cells = <1>; ranges; + udc: usb@200000 { + compatible = "microchip,lan9662-udc", + "atmel,sama5d3-udc"; + reg = <0x00200000 0x80000>, + <0xe0808000 0x400>; + interrupts = ; + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + switch: switch@e0000000 { compatible = "microchip,lan966x-switch"; reg = <0xe0000000 0x0100000>, -- cgit v1.2.3 From fe7758e0e70b4199ff239720b53cff5248c8497c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:15:59 +0200 Subject: ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15 Those pin comments refer to SPI2 pins, not SPI1 pins, update the comments. No functional change. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 6052243ad81c..658162e2f420 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1794,15 +1794,15 @@ spi2_pins_a: spi2-0 { pins1 { - pinmux = , /* SPI1_SCK */ - ; /* SPI1_MOSI */ + pinmux = , /* SPI2_SCK */ + ; /* SPI2_MOSI */ bias-disable; drive-push-pull; slew-rate = <1>; }; pins2 { - pinmux = ; /* SPI1_MISO */ + pinmux = ; /* SPI2_MISO */ bias-disable; }; }; -- cgit v1.2.3 From bdb1f18fa959aa305c97708345fa9d9f90a59ef3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:00 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for CAN1 pins Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 658162e2f420..667d8b74a8a4 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -978,6 +978,26 @@ }; }; + m_can1_pins_c: m-can1-2 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_c: m_can1-sleep-2 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ -- cgit v1.2.3 From 5eabbd30fe60e03367b0d06461d1f94ea46a1b8a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:01 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for SPI2 pins Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 667d8b74a8a4..01242cb005b6 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1827,6 +1827,21 @@ }; }; + spi2_pins_b: spi2-1 { + pins1 { + pinmux = , /* SPI2_SCK */ + ; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI2_MISO */ + bias-disable; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = , /* SPI4_SCK */ -- cgit v1.2.3 From 2ff9ec3a77f2d06165761e9606c4a5fccbe0feb2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:02 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for UART3 pins Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 41 ++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 01242cb005b6..95781bd8c309 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -2218,6 +2218,47 @@ }; }; + usart3_pins_e: usart3-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-pull-up; + }; + }; + + usart3_idle_pins_e: usart3-idle-4 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART3_RX */ + bias-pull-up; + }; + }; + + usart3_sleep_pins_e: usart3-sleep-4 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ -- cgit v1.2.3 From ced0cb456b429a126b8992035b3069db5f77f09e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:03 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for UART4 pins Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 95781bd8c309..adcb86831849 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1919,6 +1919,36 @@ }; }; + uart4_pins_d: uart4-3 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_idle_pins_d: uart4-idle-3 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_d: uart4-sleep-3 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ -- cgit v1.2.3 From 35b2cb537c2147b61139e8ca226eb7c13fbe60b2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:04 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for UART5 pins Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index adcb86831849..214563a4e56b 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1949,6 +1949,19 @@ }; }; + uart5_pins_a: uart5-0 { + pins1 { + pinmux = ; /* UART5_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART5_RX */ + bias-disable; + }; + }; + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ -- cgit v1.2.3 From 49c66eb382da2ecac40f0b7d0e529ec9d24ce84e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 26 Jun 2022 02:21:05 +0200 Subject: ARM: dts: stm32: Add DHCOR based DRC Compact board Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/Makefile | 1 + .../arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts | 30 ++ .../boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi | 322 +++++++++++++++++++++ 3 files changed, 353 insertions(+) create mode 100644 arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts create mode 100644 arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5112f493f494..e3e9af031bf5 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1192,6 +1192,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32mp151a-prtt1c.dtb \ stm32mp151a-prtt1s.dtb \ stm32mp153c-dhcom-drc02.dtb \ + stm32mp153c-dhcor-drc-compact.dtb \ stm32mp157a-avenger96.dtb \ stm32mp157a-dhcor-avenger96.dtb \ stm32mp157a-dk1.dtb \ diff --git a/arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts b/arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts new file mode 100644 index 000000000000..c8b9818499ea --- /dev/null +++ b/arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + * + * DHCOR STM32MP1 variant: + * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG + * DHCOR PCB number: 586-100 or newer + * DRC Compact PCB number: 627-100 or newer + */ + +/dts-v1/; + +#include "stm32mp153.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-dhcor-som.dtsi" +#include "stm32mp15xx-dhcor-drc-compact.dtsi" + +/ { + model = "DH electronics STM32MP153C DHCOR DRC Compact"; + compatible = "dh,stm32mp153c-dhcor-drc-compact", + "dh,stm32mp153c-dhcor-som", + "st,stm32mp153"; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_c>; + pinctrl-1 = <&m_can1_sleep_pins_c>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi new file mode 100644 index 000000000000..27477bb219de --- /dev/null +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2022 Marek Vasut + */ + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = &ksz8851; + mmc0 = &sdmmc1; + rtc0 = &hwrtc; + rtc1 = &rtc; + serial0 = &uart4; + serial1 = &uart8; + serial2 = &usart3; + serial3 = &uart5; + spi0 = &qspi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led { + compatible = "gpio-leds"; + led1 { + label = "yellow:user0"; + gpios = <&gpioz 6 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led2 { + label = "red:user1"; + gpios = <&gpioz 3 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + ethernet_vio: vioregulator { + compatible = "regulator-fixed"; + regulator-name = "vio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpioh 2 GPIO_ACTIVE_LOW>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd>; + }; +}; + +&adc { /* X11 ADC inputs */ + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_b>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vdda>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <0 1 6>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; + + adc2: adc@100 { + st,adc-channels = <0 1 2>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; +}; + +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_rgmii_pins_c>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-delay-us = <1000>; + reset-post-delay-us = <1000>; + + phy0: ethernet-phy@7 { + reg = <7>; + + rxc-skew-ps = <1500>; + rxdv-skew-ps = <540>; + rxd0-skew-ps = <420>; + rxd1-skew-ps = <420>; + rxd2-skew-ps = <420>; + rxd3-skew-ps = <420>; + + txc-skew-ps = <1440>; + txen-skew-ps = <540>; + txd0-skew-ps = <420>; + txd1-skew-ps = <420>; + txd2-skew-ps = <420>; + txd3-skew-ps = <420>; + }; + }; +}; + +&fmc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + status = "okay"; + + ksz8851: ethernet@1,0 { + compatible = "micrel,ks8851-mll"; + reg = <1 0x0 0x2>, <1 0x2 0x20000>; + interrupt-parent = <&gpioc>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + bank-width = <2>; + + /* Timing values are in nS */ + st,fmc2-ebi-cs-mux-enable; + st,fmc2-ebi-cs-transaction-type = <4>; + st,fmc2-ebi-cs-buswidth = <16>; + st,fmc2-ebi-cs-address-setup-ns = <5>; + st,fmc2-ebi-cs-address-hold-ns = <5>; + st,fmc2-ebi-cs-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-data-setup-ns = <45>; + st,fmc2-ebi-cs-data-hold-ns = <1>; + st,fmc2-ebi-cs-write-address-setup-ns = <5>; + st,fmc2-ebi-cs-write-address-hold-ns = <5>; + st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; + st,fmc2-ebi-cs-write-data-setup-ns = <45>; + st,fmc2-ebi-cs-write-data-hold-ns = <1>; + }; +}; + +&gpioa { + gpio-line-names = "", "", "", "", + "DRCC-VAR2", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpioe { + gpio-line-names = "", "", "", "", + "", "DRCC-GPIO0", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpiog { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "", + "DRCC-GPIO5", "", "", ""; +}; + +&gpioh { + gpio-line-names = "", "", "", "DRCC-HW2", + "DRCC-GPIO4", "", "", "", + "DRCC-HW1", "DRCC-HW0", "", "DRCC-VAR1", + "DRCC-VAR0", "", "", "DRCC-GPIO6"; +}; + +&gpioi { + gpio-line-names = "", "", "", "", + "", "", "", "DRCC-GPIO2", + "", "DRCC-GPIO1", "", "", + "", "", "", ""; +}; + +&i2c1 { /* X11 I2C1 */ + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_b>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + hwrtc: rtc@32 { + compatible = "microcrystal,rv8803"; + reg = <0x32>; + }; + + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&sdmmc1 { /* MicroSD */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc2 { /* eMMC */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>; + bus-width = <8>; + no-sd; + no-sdio; + non-removable; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; + +&sdmmc3 { /* SDIO Wi-Fi */ + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc3_b4_pins_a>; + pinctrl-1 = <&sdmmc3_b4_od_pins_a>; + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; + broken-cd; + bus-width = <4>; + mmc-ddr-3_3v; + st,neg-edge; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&v3v3>; + status = "okay"; +}; + +&spi2 { /* X11 SPI */ + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_b>; + cs-gpios = <&gpioi 0 0>; + status = "disabled"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&uart4 { + label = "UART0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_d>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart5 { /* X11 UART */ + label = "X11-UART5"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart8 { + label = "RS485-1"; + pinctrl-names = "default"; + pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usart3 { /* RS485 or RS232 */ + label = "RS485-2"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usart3_pins_e>; + pinctrl-1 = <&usart3_sleep_pins_e>; + uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "otg"; + pinctrl-0 = <&usbotg_hs_pins_a>; + pinctrl-names = "default"; + phy-names = "usb2-phy"; + phys = <&usbphyc_port1 0>; + vbus-supply = <&vbus_otg>; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; + connector { + compatible = "usb-a-connector"; + vbus-supply = <&vbus_sw>; + }; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; -- cgit v1.2.3 From bcdf998ea3eae91921eb1327664db227fd6b773e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 22 May 2022 22:24:02 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for DCMI pins Add another mux option for DCMI pins, this is used on AV96 board. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Manivannan Sadhasivam Cc: Maxime Coquelin Cc: Patrice Chotard Cc: Patrick Delaunay Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 37 ++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 214563a4e56b..94db065eada5 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -151,6 +151,43 @@ }; }; + dcmi_pins_c: dcmi-2 { + pins { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ,/* DCMI_D7 */ + ,/* DCMI_D8 */ + ;/* DCMI_D9 */ + bias-pull-up; + }; + }; + + dcmi_sleep_pins_c: dcmi-sleep-2 { + pins { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ,/* DCMI_D7 */ + ,/* DCMI_D8 */ + ;/* DCMI_D9 */ + }; + }; + ethernet0_rgmii_pins_a: rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ -- cgit v1.2.3 From f95a5242c54d528eab5c7c4f3f5910d72f585bbe Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 22 May 2022 22:24:03 +0200 Subject: ARM: dts: stm32: Add alternate pinmux for RCC pin Add another mux option for RCC pin, this is used on AV96 board for e.g. sensor clock supply. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Manivannan Sadhasivam Cc: Maxime Coquelin Cc: Patrice Chotard Cc: Patrick Delaunay Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 94db065eada5..2cc9341d43d2 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -960,6 +960,21 @@ }; }; + mco1_pins_a: mco1-0 { + pins { + pinmux = ; /* MCO1 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + mco1_sleep_pins_a: mco1-sleep-0 { + pins { + pinmux = ; /* MCO1 */ + }; + }; + mco2_pins_a: mco2-0 { pins { pinmux = ; /* MCO2 */ -- cgit v1.2.3 From cc6280cf885ce9ab923b9f9779aa8fbe10983d20 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 22 May 2022 22:24:04 +0200 Subject: ARM: dts: stm32: Add ST MIPID02 bindings to AV96 Add DT bindings for ST MIPID02 and DCMI to Avenger96 base DT. Both the ST MIPID02 and DCMI are disabled by default, as the AV96 camera module is optional. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Manivannan Sadhasivam Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi index 76c54b006d87..90933077d66d 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi @@ -126,6 +126,22 @@ }; }; +&dcmi { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcmi_pins_c>; + pinctrl-1 = <&dcmi_sleep_pins_c>; + status = "disabled"; + + port { + dcmi_0: endpoint { + remote-endpoint = <&stmipi_2>; + bus-type = <5>; + bus-width = <8>; + pclk-sample = <0>; + }; + }; +}; + ðernet0 { status = "okay"; pinctrl-0 = <ðernet0_rgmii_pins_c>; @@ -219,6 +235,45 @@ }; &i2c4 { + stmipi: stmipi@14 { + compatible = "st,st-mipid02"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mco1_pins_a>; + pinctrl-1 = <&mco1_sleep_pins_a>; + reg = <0x14>; + clocks = <&rcc CK_MCO1>; + clock-names = "xclk"; + assigned-clocks = <&rcc CK_MCO1>; + assigned-clock-parents = <&rcc CK_HSE>; + assigned-clock-rates = <24000000>; + VDDE-supply = <&v1v8>; + VDDIN-supply = <&v1v8>; + reset-gpios = <&gpioz 0 GPIO_ACTIVE_LOW>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + stmipi_0: endpoint { + }; + }; + + port@2 { + reg = <2>; + stmipi_2: endpoint { + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <0>; + remote-endpoint = <&dcmi_0>; + }; + }; + }; + }; + hdmi-transmitter@3d { compatible = "adi,adv7513"; reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>; -- cgit v1.2.3 From 7bd809eee4290ae7277f4fb20f270fcedd74737b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:29 -0700 Subject: ARM: dts: aspeed: align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-36-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 30 +++++++-------- arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts | 48 ++++++++++++------------ arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 8 ++-- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 12 +++--- arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts | 22 +++++------ arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts | 23 ++++++------ arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts | 20 +++++----- arch/arm/boot/dts/aspeed-bmc-opp-nicole.dts | 2 +- arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 2 +- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 2 +- arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 30 +++++++-------- arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 12 +++--- arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 4 +- arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 16 ++++---- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 4 +- 15 files changed, 118 insertions(+), 117 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts index 1b2e7ad37566..82a6f14a45f0 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts @@ -100,91 +100,91 @@ gpio-keys { compatible = "gpio-keys"; - shutdown_ack { + event-shutdown-ack { label = "SHUTDOWN_ACK"; gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - reboot_ack { + event-reboot-ack { label = "REBOOT_ACK"; gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>; linux,code = ; }; - S0_overtemp { + event-s0-overtemp { label = "S0_OVERTEMP"; gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>; linux,code = ; }; - S0_hightemp { + event-s0-hightemp { label = "S0_HIGHTEMP"; gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - S0_cpu_fault { + event-s0-cpu-fault { label = "S0_CPU_FAULT"; gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>; linux,code = ; }; - S0_scp_auth_fail { + event-s0-scp-auth-fail { label = "S0_SCP_AUTH_FAIL"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - S1_scp_auth_fail { + event-s1-scp-auth-fail { label = "S1_SCP_AUTH_FAIL"; gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - S1_overtemp { + event-s1-overtemp { label = "S1_OVERTEMP"; gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>; linux,code = ; }; - S1_hightemp { + event-s1-hightemp { label = "S1_HIGHTEMP"; gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - S1_cpu_fault { + event-s1-cpu-fault { label = "S1_CPU_FAULT"; gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>; linux,code = ; }; - id_button { + event-id { label = "ID_BUTTON"; gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - psu1_vin_good { + event-psu1-vin-good { label = "PSU1_VIN_GOOD"; gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>; linux,code = ; }; - psu2_vin_good { + event-psu2-vin-good { label = "PSU2_VIN_GOOD"; gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - psu1_present { + event-psu1-present { label = "PSU1_PRESENT"; gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - psu2_present { + event-psu2-present { label = "PSU2_PRESENT"; gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts b/arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts index 0d1fb5ccfd36..f75cad41ae6f 100644 --- a/arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts +++ b/arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts @@ -100,7 +100,7 @@ gpio-keys { compatible = "gpio-keys"; - burn-in-signal { + event-burn-in-signal { label = "burn-in"; gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; linux,code = ; @@ -111,139 +111,139 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - rear-riser1-presence { + event-rear-riser1-presence { label = "rear-riser1-presence"; gpios = <&pca0 1 GPIO_ACTIVE_LOW>; linux,code = <1>; }; - alrt-pvddq-cpu0 { + event-alrt-pvddq-cpu0 { label = "alrt-pvddq-cpu0"; gpios = <&pca0 8 GPIO_ACTIVE_LOW>; linux,code = <2>; }; - rear-riser0-presence { + event-rear-riser0-presence { label = "rear-riser0-presence"; gpios = <&pca0 9 GPIO_ACTIVE_LOW>; linux,code = <3>; }; - fault-pvddq-cpu0 { + event-fault-pvddq-cpu0 { label = "fault-pvddq-cpu0"; gpios = <&pca0 10 GPIO_ACTIVE_LOW>; linux,code = <4>; }; - alrt-pvddq-cpu1 { + event-alrt-pvddq-cpu1 { label = "alrt-pvddq-cpu1"; gpios = <&pca0 11 GPIO_ACTIVE_LOW>; linux,code = <5>; }; - fault-pvddq-cpu1 { + event-fault-pvddq-cpu1 { label = "alrt-pvddq-cpu1"; gpios = <&pca0 12 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fault-pvccin-cpu1 { + event-fault-pvccin-cpu1 { label = "fault-pvccin-cpuq"; gpios = <&pca0 13 GPIO_ACTIVE_LOW>; linux,code = <7>; }; - bmc-rom0-wp { + event-bmc-rom0-wp { label = "bmc-rom0-wp"; gpios = <&pca1 0 GPIO_ACTIVE_LOW>; linux,code = <8>; }; - bmc-rom1-wp { + event-bmc-rom1-wp { label = "bmc-rom1-wp"; gpios = <&pca1 1 GPIO_ACTIVE_LOW>; linux,code = <9>; }; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca1 2 GPIO_ACTIVE_LOW>; linux,code = <10>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca1 3 GPIO_ACTIVE_LOW>; linux,code = <11>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca1 4 GPIO_ACTIVE_LOW>; linux,code = <12>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca1 5 GPIO_ACTIVE_LOW>; linux,code = <13>; }; - fan4-presence { + event-fan4-presence { label = "fan4-presence"; gpios = <&pca1 6 GPIO_ACTIVE_LOW>; linux,code = <14>; }; - fan5-presence { + event-fan5-presence { label = "fan5-presence"; gpios = <&pca1 7 GPIO_ACTIVE_LOW>; linux,code = <15>; }; - front-bp1-presence { + event-front-bp1-presence { label = "front-bp1-presence"; gpios = <&pca1 8 GPIO_ACTIVE_LOW>; linux,code = <16>; }; - rear-bp-presence { + event-rear-bp-presence { label = "rear-bp-presence"; gpios = <&pca1 9 GPIO_ACTIVE_LOW>; linux,code = <17>; }; - fault-pvccin-cpu0 { + event-fault-pvccin-cpu0 { label = "fault-pvccin-cpu0"; gpios = <&pca1 10 GPIO_ACTIVE_LOW>; linux,code = <18>; }; - alrt-p1v05-pvcc { + event-alrt-p1v05-pvcc { label = "alrt-p1v05-pvcc1"; gpios = <&pca1 11 GPIO_ACTIVE_LOW>; linux,code = <19>; }; - fault-p1v05-pvccio { + event-fault-p1v05-pvccio { label = "alrt-p1v05-pvcc1"; gpios = <&pca1 12 GPIO_ACTIVE_LOW>; linux,code = <20>; }; - alrt-p1v8-pvccio { + event-alrt-p1v8-pvccio { label = "alrt-p1v8-pvccio"; gpios = <&pca1 13 GPIO_ACTIVE_LOW>; linux,code = <21>; }; - fault-p1v8-pvccio { + event-fault-p1v8-pvccio { label = "fault-p1v8-pvccio"; gpios = <&pca1 14 GPIO_ACTIVE_LOW>; linux,code = <22>; }; - front-bp0-presence { + event-front-bp0-presence { label = "front-bp0-presence"; gpios = <&pca1 15 GPIO_ACTIVE_LOW>; linux,code = <23>; diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index 382da7934eaa..afad8d732cc3 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -193,25 +193,25 @@ #size-cells = <0>; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca0 15 GPIO_ACTIVE_LOW>; linux,code = <15>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca0 14 GPIO_ACTIVE_LOW>; linux,code = <14>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca0 13 GPIO_ACTIVE_LOW>; linux,code = <13>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca0 12 GPIO_ACTIVE_LOW>; linux,code = <12>; diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 7213434695bf..fc8222ea2dd0 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -183,37 +183,37 @@ #size-cells = <0>; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca0 6 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca0 7 GPIO_ACTIVE_LOW>; linux,code = <7>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca0 8 GPIO_ACTIVE_LOW>; linux,code = <8>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca0 9 GPIO_ACTIVE_LOW>; linux,code = <9>; }; - fan4-presence { + event-fan4-presence { label = "fan4-presence"; gpios = <&pca0 10 GPIO_ACTIVE_LOW>; linux,code = <10>; }; - fan5-presence { + event-fan5-presence { label = "fan5-presence"; gpios = <&pca0 11 GPIO_ACTIVE_LOW>; linux,code = <11>; diff --git a/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts b/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts index 60a39ea10ab1..208b0f094ed9 100644 --- a/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts +++ b/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts @@ -73,19 +73,19 @@ gpio-keys { compatible = "gpio-keys"; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; linux,code = ; @@ -97,49 +97,49 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca1 0 GPIO_ACTIVE_LOW>; linux,code = <1>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca1 1 GPIO_ACTIVE_LOW>; linux,code = <2>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca1 2 GPIO_ACTIVE_LOW>; linux,code = <3>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca1 3 GPIO_ACTIVE_LOW>; linux,code = <4>; }; - fan4-presence { + event-fan4-presence { label = "fan4-presence"; gpios = <&pca1 4 GPIO_ACTIVE_LOW>; linux,code = <5>; }; - fan5-presence { + event-fan5-presence { label = "fan5-presence"; gpios = <&pca1 5 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fan6-presence { + event-fan6-presence { label = "fan6-presence"; gpios = <&pca1 6 GPIO_ACTIVE_LOW>; linux,code = <7>; }; - fan7-presence { + event-fan7-presence { label = "fan7-presence"; gpios = <&pca1 7 GPIO_ACTIVE_LOW>; linux,code = <8>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts index a52a289cee85..48776fb663fb 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts @@ -92,30 +92,31 @@ gpio-keys { compatible = "gpio-keys"; - air-water { + event-air-water { label = "air-water"; gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>; linux,code = ; }; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - id-button { + + button-id { label = "id-button"; gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; linux,code = ; @@ -126,37 +127,37 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca9552 9 GPIO_ACTIVE_LOW>; linux,code = <9>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca9552 10 GPIO_ACTIVE_LOW>; linux,code = <10>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca9552 11 GPIO_ACTIVE_LOW>; linux,code = <11>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca9552 12 GPIO_ACTIVE_LOW>; linux,code = <12>; }; - fan4-presence { + event-fan4-presence { label = "fan4-presence"; gpios = <&pca9552 13 GPIO_ACTIVE_LOW>; linux,code = <13>; }; - fan5-presence { + event-fan5-presence { label = "fan5-presence"; gpios = <&pca9552 14 GPIO_ACTIVE_LOW>; linux,code = <14>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts b/arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts index 7d38d121ec6d..31ff19ef87a0 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-mowgli.dts @@ -46,31 +46,31 @@ gpio-keys { compatible = "gpio-keys"; - air-water { + event-air-water { label = "air-water"; gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>; linux,code = ; }; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - id-button { + button-id { label = "id-button"; gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; linux,code = ; @@ -81,31 +81,31 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca9552 9 GPIO_ACTIVE_LOW>; linux,code = <9>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca9552 10 GPIO_ACTIVE_LOW>; linux,code = <10>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca9552 11 GPIO_ACTIVE_LOW>; linux,code = <11>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca9552 12 GPIO_ACTIVE_LOW>; linux,code = <12>; }; - fan4-presence { + event-fan4-presence { label = "fan4-presence"; gpios = <&pca9552 13 GPIO_ACTIVE_LOW>; linux,code = <13>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-nicole.dts b/arch/arm/boot/dts/aspeed-bmc-opp-nicole.dts index 3d4bdad27c2d..ac0d666ca10e 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-nicole.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-nicole.dts @@ -96,7 +96,7 @@ gpio-keys { compatible = "gpio-keys"; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts index cd660c1ff3f5..45631b47a7b3 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts @@ -73,7 +73,7 @@ gpio-keys { compatible = "gpio-keys"; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts index 084f54866f38..893e621ecab1 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts @@ -87,7 +87,7 @@ gpio-keys { compatible = "gpio-keys"; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts index 4816486c0c9e..bbf864f84d37 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts @@ -38,37 +38,37 @@ gpio-keys { compatible = "gpio-keys"; - air-water { + event-air-water { label = "air-water"; gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>; linux,code = ; }; - oppanel-presence { + event-oppanel-presence { label = "oppanel-presence"; gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>; linux,code = ; }; - opencapi-riser-presence { + event-opencapi-riser-presence { label = "opencapi-riser-presence"; gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -84,55 +84,55 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - scm0-presence { + event-scm0-presence { label = "scm0-presence"; gpios = <&pca9552 6 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - scm1-presence { + event-scm1-presence { label = "scm1-presence"; gpios = <&pca9552 7 GPIO_ACTIVE_LOW>; linux,code = <7>; }; - cpu0vrm-presence { + event-cpu0vrm-presence { label = "cpu0vrm-presence"; gpios = <&pca9552 12 GPIO_ACTIVE_LOW>; linux,code = <12>; }; - cpu1vrm-presence { + event-cpu1vrm-presence { label = "cpu1vrm-presence"; gpios = <&pca9552 13 GPIO_ACTIVE_LOW>; linux,code = <13>; }; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca0 5 GPIO_ACTIVE_LOW>; linux,code = <5>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca0 6 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca0 7 GPIO_ACTIVE_LOW>; linux,code = <7>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca0 8 GPIO_ACTIVE_LOW>; linux,code = <8>; }; - fanboost-presence { + event-fanboost-presence { label = "fanboost-presence"; gpios = <&pca0 9 GPIO_ACTIVE_LOW>; linux,code = <9>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts index 72b7a6639ed9..6f6a35fe2caf 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts @@ -50,13 +50,13 @@ gpio-keys { compatible = "gpio-keys"; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>; linux,code = ; @@ -69,25 +69,25 @@ #size-cells = <0>; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca0 4 GPIO_ACTIVE_LOW>; linux,code = <4>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca0 5 GPIO_ACTIVE_LOW>; linux,code = <5>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca0 6 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca0 7 GPIO_ACTIVE_LOW>; linux,code = <7>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts index 328ef472c479..8a7fb55ab489 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts @@ -63,13 +63,13 @@ gpio-keys { compatible = "gpio-keys"; - button_checkstop { + event-checkstop { label = "checkstop"; linux,code = <74>; gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>; }; - button_identify { + event-identify { label = "identify"; linux,code = <152>; gpios = <&gpio ASPEED_GPIO(O, 7) GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts index 230f3584bcab..a20a532fc280 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts @@ -51,25 +51,25 @@ gpio-keys { compatible = "gpio-keys"; - air-water { + event-air-water { label = "air-water"; gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; linux,code = ; }; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps0-presence { + event-ps0-presence { label = "ps0-presence"; gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; linux,code = ; }; - ps1-presence { + event-ps1-presence { label = "ps1-presence"; gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>; linux,code = ; @@ -85,25 +85,25 @@ compatible = "gpio-keys-polled"; poll-interval = <1000>; - fan0-presence { + event-fan0-presence { label = "fan0-presence"; gpios = <&pca0 4 GPIO_ACTIVE_LOW>; linux,code = <4>; }; - fan1-presence { + event-fan1-presence { label = "fan1-presence"; gpios = <&pca0 5 GPIO_ACTIVE_LOW>; linux,code = <5>; }; - fan2-presence { + event-fan2-presence { label = "fan2-presence"; gpios = <&pca0 6 GPIO_ACTIVE_LOW>; linux,code = <6>; }; - fan3-presence { + event-fan3-presence { label = "fan3-presence"; gpios = <&pca0 7 GPIO_ACTIVE_LOW>; linux,code = <7>; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts index 7ae4ea0d2931..0cb7b20ff3ab 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts @@ -58,13 +58,13 @@ gpio-keys { compatible = "gpio-keys"; - checkstop { + event-checkstop { label = "checkstop"; gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>; linux,code = ; }; - pcie-e2b-present{ + event-pcie-e2b-present{ label = "pcie-e2b-present"; gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>; linux,code = ; -- cgit v1.2.3 From bafd5bb5ea496c8fc443e6b9de70af840bec0b9c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 15 Jun 2022 17:53:30 -0700 Subject: ARM: dts: aspeed: correct gpio-keys properties gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220616005333.18491-37-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 2 -- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 2 -- arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 2 -- 3 files changed, 6 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index afad8d732cc3..a6a2bc3b855c 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -189,8 +189,6 @@ gpio-keys-polled { compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; poll-interval = <1000>; event-fan0-presence { diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index fc8222ea2dd0..bf59a9962379 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -179,8 +179,6 @@ gpio-keys-polled { compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; poll-interval = <1000>; event-fan0-presence { diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts index 6f6a35fe2caf..3f6010ef2b86 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts @@ -65,8 +65,6 @@ gpio-keys-polled { compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; poll-interval = <1000>; event-fan0-presence { -- cgit v1.2.3 From 6d5f3f67584a4e17b70970c7fc567b2251b880ed Mon Sep 17 00:00:00 2001 From: qianfan Zhao Date: Tue, 17 May 2022 09:36:05 +0800 Subject: ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board The CPU of sun8i-r40 is powered by PMIC, let's add "cpu-supply" node. Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220517013607.2252-2-qianfanguijin@163.com --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++ arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 4 ++++ arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 4 ++++ 4 files changed, 16 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index a6a1087a0c9b..4f30018ec4a2 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -113,6 +113,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi index 265e0fa57a32..b872b51a346d 100644 --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -6,6 +6,10 @@ #include "sun8i-r40.dtsi" +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &i2c0 { status = "okay"; diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts index 6931aaab2382..0eb1990742ff 100644 --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts @@ -88,6 +88,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts index 47954551f573..fdf8bd12faaa 100644 --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts @@ -107,6 +107,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; -- cgit v1.2.3 From 14dbef6772cd1d07b953a4b46e2be99351a4e953 Mon Sep 17 00:00:00 2001 From: qianfan Zhao Date: Tue, 17 May 2022 09:36:06 +0800 Subject: ARM: dts: sun8i-r40: add opp table for cpu OPP table value is get from allwinner lichee linux-3.10 kernel driver Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220517013607.2252-3-qianfanguijin@163.com --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 1 + arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi | 52 +++++++++++++++++++++++ arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 1 + arch/arm/boot/dts/sun8i-r40.dtsi | 8 ++++ arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 1 + arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 1 + 6 files changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 4f30018ec4a2..28197bbcb1d5 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi new file mode 100644 index 000000000000..649928b361af --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi @@ -0,0 +1,52 @@ +/{ + cpu0_opp_table: opp-table-cpu { + compatible = "operating-points-v2"; + opp-shared; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1000000 1000000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1100000 1100000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1160000 1160000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <2000000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu0_opp_table>; +}; diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi index b872b51a346d..9f39b5a2bb35 100644 --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -5,6 +5,7 @@ // Copyright (C) 2017 Icenowy Zheng #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" &cpu0 { cpu-supply = <®_dcdc2>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 75d55a46b50e..88baaf6b0f41 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -85,24 +85,32 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; }; diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts index 0eb1990742ff..9f472521f4a4 100644 --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts @@ -45,6 +45,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts index fdf8bd12faaa..434871040aca 100644 --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts @@ -42,6 +42,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include -- cgit v1.2.3 From 7d655166dbb29b6d735b4699ded5d2b2d74d579c Mon Sep 17 00:00:00 2001 From: qianfan Zhao Date: Tue, 17 May 2022 09:36:07 +0800 Subject: ARM: dts: sun8i-r40: Add thermal trip points/cooling maps For the trip points, I used values from the BSP code. The critical trip point value is 30°C above the maximum recommended ambient temperature (85°C) for the SoC from the datasheet, so there's some headroom even at such a high ambient temperature. Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Jernej Skrabec Link: https://lore.kernel.org/r/20220517013607.2252-4-qianfanguijin@163.com --- arch/arm/boot/dts/sun8i-r40.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 88baaf6b0f41..4ef26d8f5340 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -87,6 +87,7 @@ reg = <0>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -95,6 +96,7 @@ reg = <1>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -103,6 +105,7 @@ reg = <2>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -111,6 +114,7 @@ reg = <3>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; }; @@ -126,6 +130,30 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal: gpu-thermal { -- cgit v1.2.3 From 363c1b04cfce5615f2dc1b7f19e4456937ed2068 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Sun, 26 Jun 2022 20:32:45 +0200 Subject: ARM: dts: qcom: extend scm compatible to match dt-schema First device specific compatible, then general one. Reviewed-by: Krzysztof Kozlowski Signed-off-by: David Heidelberg Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220626183247.142776-1-david@ixit.cz --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 91adcbd54b17..38f6077d4c66 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -315,7 +315,7 @@ firmware { scm { - compatible = "qcom,scm-apq8064"; + compatible = "qcom,scm-apq8064", "qcom,scm"; clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>; clock-names = "core"; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 3e8bded2b5c8..72f9255855a1 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -95,7 +95,7 @@ firmware { scm { - compatible = "qcom,scm"; + compatible = "qcom,scm-apq8084", "qcom,scm"; clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; clock-names = "core", "bus", "iface"; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index a2632349cec4..bb307b8f678c 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -156,7 +156,7 @@ firmware { scm { - compatible = "qcom,scm-ipq4019"; + compatible = "qcom,scm-ipq4019", "qcom,scm"; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 8131d3e222cb..af318c104cdd 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -96,7 +96,7 @@ firmware { scm { - compatible = "qcom,scm"; + compatible = "qcom,scm-msm8974", "qcom,scm"; clocks = <&gcc GCC_CE1_CLK>, <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; clock-names = "core", "bus", "iface"; }; -- cgit v1.2.3 From 9c10bb43db82bc9289af50c39cc940aff79b7aed Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 6 Jul 2022 17:54:10 +0300 Subject: ARM: dts: qcom: apq8064: rename DSI PHY iface clock Follow the usual scheme and use name 'iface' rather than 'iface_clk' for the interface clock. The DSI PHY driver can cope with both of them, so there is no breakage. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220706145412.1566011-4-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 38f6077d4c66..298df0813969 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1299,7 +1299,7 @@ <0x04700300 0x200>, <0x04700500 0x5c>; reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator"; - clock-names = "iface_clk", "ref"; + clock-names = "iface", "ref"; clocks = <&mmcc DSI_M_AHB_CLK>, <&pxo_board>; }; -- cgit v1.2.3 From d8e51f13c31c585caf6a9497627ecad14e78211b Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 6 Jul 2022 17:54:11 +0300 Subject: ARM: dts: qcom: apq8064: disable DSI and DSI PHY by default Disable DSI and DSI PHY devices by default. The only actual user, Nexus 7, already contains `status = "okay"` property in the respective devices nodes. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220706145412.1566011-5-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 298df0813969..cc3882977483 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1271,6 +1271,8 @@ syscon-sfpb = <&mmss_sfpb>; phys = <&dsi0_phy>; phy-names = "dsi"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1302,6 +1304,7 @@ clock-names = "iface", "ref"; clocks = <&mmcc DSI_M_AHB_CLK>, <&pxo_board>; + status = "disabled"; }; -- cgit v1.2.3 From 864cfdeb76735909a9afcc314416ccaa1ce82a1a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 6 Jul 2022 17:54:12 +0300 Subject: ARM: dts: qcom: msm8974: rename GPU's OPP table node Rename the GPU's opp table node to make it follow the display/msm/gpu.yaml schema. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220706145412.1566011-6-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index af318c104cdd..d944c6272c37 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1612,7 +1612,7 @@ status = "disabled"; - gpu_opp_table: opp_table { + gpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-320000000 { -- cgit v1.2.3 From 79e682024559ccc8b01b36ef128afbe89cf25092 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 29 Dec 2021 21:31:33 +0200 Subject: arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support The Mitsubishi AA1024XD12 panel can be used for R-Car Gen2 and Gen3 boards as an optional external panel. It is described in the arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi file as a direct child of the DT root node. This allows including r8a77xx-aa104xd12-panel.dtsi in board device trees, with other minor modifications, to enable the panel. This is however not how external components should be modelled. Instead of modifying the board device tree to enable the panel, it should be compiled as a DT overlay, to be loaded by the boot loader. Prepare the r8a77xx-aa104xd12-panel.dtsi file for this usage by declaring a panel node only, without hardcoding its path. Overlay sources can then include r8a77xx-aa104xd12-panel.dtsi where appropriate. This change doesn't cause any regression as r8a77xx-aa104xd12-panel.dtsi is currently unused. As overlay support for this panel has only been tested with Gen3 hardware, and Gen2 support will require more development, move the file to arch/arm64/boot/dts/renesas/. Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Link: https://lore.kernel.org/r/20211229193135.28767-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi | 39 ------------------------ arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi | 30 ++++++++++++++++++ 2 files changed, 30 insertions(+), 39 deletions(-) delete mode 100644 arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi create mode 100644 arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi b/arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi deleted file mode 100644 index 79fce67ebb1c..000000000000 --- a/arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Common file for the AA104XD12 panel connected to Renesas R-Car boards - * - * Copyright (C) 2014 Renesas Electronics Corp. - */ - -/ { - panel { - compatible = "mitsubishi,aa104xd12", "panel-lvds"; - - width-mm = <210>; - height-mm = <158>; - data-mapping = "jeida-18"; - - panel-timing { - /* 1024x768 @65Hz */ - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hsync-len = <136>; - hfront-porch = <20>; - hback-porch = <160>; - vfront-porch = <3>; - vback-porch = <29>; - vsync-len = <6>; - }; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds_connector>; - }; - }; - }; -}; - -&lvds_connector { - remote-endpoint = <&panel_in>; -}; diff --git a/arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi b/arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi new file mode 100644 index 000000000000..4b1f0982b9e4 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Common file for the AA104XD12 panel connected to Renesas R-Car Gen3 boards. + * + * Copyright (C) 2014 Renesas Electronics Corp. + */ + +panel { + compatible = "mitsubishi,aa104xd12", "panel-lvds"; + + width-mm = <210>; + height-mm = <158>; + data-mapping = "jeida-18"; + + panel-timing { + /* 1024x768 @65Hz */ + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hsync-len = <136>; + hfront-porch = <20>; + hback-porch = <160>; + vfront-porch = <3>; + vback-porch = <29>; + vsync-len = <6>; + }; + + port { + }; +}; -- cgit v1.2.3 From d39f3f4d4f77be45a459596d0dbec61a797831b1 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Thu, 7 Jul 2022 00:00:32 -0700 Subject: ARM: dts: Move BCM963138DVT board dts to ARCH_BCMBCA Use CONFIG_ARCH_BCMBCA to build all the BCMBCA SoC dts and remove CONFIG_ARCH_BCM_63XX from the makefile Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5406ee68f75d..79ce903ab5e7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -147,8 +147,6 @@ dtb-$(CONFIG_ARCH_BCM_53573) += \ bcm47189-luxul-xap-810.dtb \ bcm47189-tenda-ac9.dtb \ bcm947189acdbmr.dtb -dtb-$(CONFIG_ARCH_BCM_63XX) += \ - bcm963138dvt.dtb dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ bcm911360_entphn.dtb \ bcm911360k.dtb \ @@ -184,6 +182,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ + bcm963138dvt.dtb \ bcm963148.dtb \ bcm963178.dtb \ bcm96756.dtb \ -- cgit v1.2.3 From a82291fce8aa5852f160ccce493ac52dfbf883a0 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Thu, 7 Jul 2022 00:00:33 -0700 Subject: ARM: dts: update dts files for bcmbca SoC BCM63138 Update BCM63138 board compatible string based on binding document. Signed-off-by: William Zhang Reviewed-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm63138.dtsi | 4 ++-- arch/arm/boot/dts/bcm963138dvt.dts | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index cca49a2e2d62..b774a8d63813 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -9,8 +9,8 @@ / { #address-cells = <1>; #size-cells = <1>; - compatible = "brcm,bcm63138"; - model = "Broadcom BCM63138 DSL SoC"; + compatible = "brcm,bcm63138", "brcm,bcmbca"; + model = "Broadcom BCM963138 Reference Board"; interrupt-parent = <&gic>; aliases { diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts index df5c8ab90627..15bec75be74c 100644 --- a/arch/arm/boot/dts/bcm963138dvt.dts +++ b/arch/arm/boot/dts/bcm963138dvt.dts @@ -8,7 +8,7 @@ #include "bcm63138.dtsi" / { - compatible = "brcm,BCM963138DVT", "brcm,bcm63138"; + compatible = "brcm,BCM963138DVT", "brcm,bcm63138", "brcm,bcmbca"; model = "Broadcom BCM963138DVT"; chosen { -- cgit v1.2.3 From daf7c850caabe0f12b10d2310a8420fc6e8abd8f Mon Sep 17 00:00:00 2001 From: William Zhang Date: Thu, 7 Jul 2022 00:00:34 -0700 Subject: ARM: dts: Add BCM63138 generic board dts Add generic bcm963138.dts file. Signed-off-by: William Zhang Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm963138.dts | 27 +++++++++++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 arch/arm/boot/dts/bcm963138.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 79ce903ab5e7..9e58aec9e7f7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -182,6 +182,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ + bcm963138.dtb \ bcm963138dvt.dtb \ bcm963148.dtb \ bcm963178.dtb \ diff --git a/arch/arm/boot/dts/bcm963138.dts b/arch/arm/boot/dts/bcm963138.dts new file mode 100644 index 000000000000..d28c4f130ca2 --- /dev/null +++ b/arch/arm/boot/dts/bcm963138.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63138.dtsi" + +/ { + model = "Broadcom BCM963138 Reference Board"; + compatible = "brcm,bcm963138", "brcm,bcm63138", "brcm,bcmbca"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &serial0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&serial0 { + status = "okay"; +}; -- cgit v1.2.3 From be16285265868aa371378132fe37df2bc14ceb78 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 7 Jul 2022 15:25:00 +0200 Subject: ARM: dts: kswitch-d10: enable the USB device port Now that there is driver support for the USB device, enable it. Signed-off-by: Michael Walle Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220707132500.1708020-2-michael@walle.cc --- arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi index 4cab1b3b3b29..84bffa3918c4 100644 --- a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi +++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi @@ -76,6 +76,12 @@ pins = "GPIO_25", "GPIO_26"; function = "fc0_b"; }; + + usbs_a_pins: usbs-a-pins { + /* VBUS_DET */ + pins = "GPIO_66"; + function = "gpio"; + }; }; &mdio0 { @@ -185,6 +191,13 @@ status = "okay"; }; +&udc { + pinctrl-0 = <&usbs_a_pins>; + pinctrl-names = "default"; + atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + &watchdog { status = "okay"; }; -- cgit v1.2.3 From 5142c3926f8fd358a62810cf09adcb128904694b Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 21 May 2022 18:14:37 +0300 Subject: ARM: dts: qcom: apq8064: create tsens device node Create separate device node for thermal sensors on apq8064 platform. Move related properties to the newly created device tree node. This harmonizes apq8064 and ipq8064 device trees and allows gcc device to be probed earlier by removing dependency on QFPROM nodes. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220521151437.1489111-5-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index cc3882977483..01207f6116a9 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -105,7 +105,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; - thermal-sensors = <&gcc 7>; + thermal-sensors = <&tsens 7>; coefficients = <1199 0>; trips { @@ -126,7 +126,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; - thermal-sensors = <&gcc 8>; + thermal-sensors = <&tsens 8>; coefficients = <1132 0>; trips { @@ -147,7 +147,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; - thermal-sensors = <&gcc 9>; + thermal-sensors = <&tsens 9>; coefficients = <1199 0>; trips { @@ -168,7 +168,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; - thermal-sensors = <&gcc 10>; + thermal-sensors = <&tsens 10>; coefficients = <1132 0>; trips { @@ -810,14 +810,23 @@ }; gcc: clock-controller@900000 { - compatible = "qcom,gcc-apq8064"; + compatible = "qcom,gcc-apq8064", "syscon"; reg = <0x00900000 0x4000>; - nvmem-cells = <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names = "calib", "calib_backup"; #clock-cells = <1>; #power-domain-cells = <1>; #reset-cells = <1>; - #thermal-sensor-cells = <1>; + + tsens: thermal-sensor { + compatible = "qcom,msm8960-tsens"; + + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + interrupts = ; + interrupt-names = "uplow"; + + #qcom,sensors = <11>; + #thermal-sensor-cells = <1>; + }; }; lcc: clock-controller@28000000 { -- cgit v1.2.3 From 079926b5a22ac92c4ac1e15e6cfb20a431802cb5 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 15 Jul 2022 09:02:48 +0200 Subject: ARM: dts: qcom: sdx65: reorder USB interrupts Three SoCs did not follow the interrupt order specified by the USB controller binding. While keeping the non-SuperSpeed interrupts together seems natural, reorder the interrupts to match the binding. Acked-by: Krzysztof Kozlowski Signed-off-by: Johan Hovold [bjorn: Split out from arm64 patch] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org --- arch/arm/boot/dts/qcom-sdx65.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 7a193678b4f5..8daefd50217a 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -372,11 +372,13 @@ assigned-clock-rates = <19200000>, <200000000>; interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 19 IRQ_TYPE_EDGE_BOTH>, <&pdc 76 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 18 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", - "ss_phy_irq", "dm_hs_phy_irq"; + <&pdc 18 IRQ_TYPE_EDGE_BOTH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", + "ss_phy_irq", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; power-domains = <&gcc USB30_GDSC>; -- cgit v1.2.3 From 5edd7d3e15a46c8549440a0b596c69be7e2c49fc Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Wed, 13 Jul 2022 14:23:08 -0700 Subject: ARM: dts: qcom: Add LPG node to pm8941 The PM8941 contains 8 LPG channels, as well as TRILED and LUT blocks. Add a node for these. Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20220713212309.130230-2-bjorn.andersson@linaro.org --- arch/arm/boot/dts/qcom-pm8941.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index a68634397938..59d0cde63251 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -144,6 +144,16 @@ #address-cells = <1>; #size-cells = <0>; + pm8941_lpg: lpg { + compatible = "qcom,pm8941-lpg"; + + #address-cells = <1>; + #size-cells = <0>; + #pwm-cells = <2>; + + status = "disabled"; + }; + pm8941_wled: wled@d800 { compatible = "qcom,pm8941-wled"; reg = <0xd800>; -- cgit v1.2.3 From 27f5947894c596fcfd6da20c061c582e7191e9e1 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Wed, 13 Jul 2022 14:23:09 -0700 Subject: ARM: dts: qcom: msm8974-sony: Enable LPG Both Castor and Honami has RGB LEDs driven by the PM8941 LPG, define these. Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20220713212309.130230-3-bjorn.andersson@linaro.org --- .../boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi | 30 ++++++++++++++++++++++ .../qcom-msm8974pro-sony-xperia-shinano-castor.dts | 30 ++++++++++++++++++++++ 2 files changed, 60 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index d42b85bda33a..5a70683d9103 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -3,6 +3,7 @@ #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" #include +#include #include / { @@ -172,6 +173,35 @@ }; }; +&pm8941_lpg { + status = "okay"; + + qcom,power-source = <1>; + + rgb-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@5 { + reg = <5>; + color = ; + }; + + led@6 { + reg = <6>; + color = ; + }; + + led@7 { + reg = <7>; + color = ; + }; + }; +}; + &pm8941_wled { status = "okay"; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 9fc696a7399a..3f45f5c5d37b 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -3,6 +3,7 @@ #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" #include +#include #include / { @@ -288,6 +289,35 @@ }; +&pm8941_lpg { + status = "okay"; + + qcom,power-source = <1>; + + rgb-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@5 { + reg = <5>; + color = ; + }; + + led@6 { + reg = <6>; + color = ; + }; + + led@7 { + reg = <7>; + color = ; + }; + }; +}; + &rpm_requests { pm8941-regulators { compatible = "qcom,rpm-pm8941-regulators"; -- cgit v1.2.3 From a037fcabdbdd8615e17add98c2638df529ff2e3c Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Thu, 5 May 2022 18:30:29 +0200 Subject: ARM: dts: qcom: msm8974-FP2: Add notification LED FP2 has a RGB LED connected to the TRILED and hence channels 7, 6 and 5 of the LPG. Add a node describing this. Signed-off-by: Luca Weiss Reported-by: kernel test robot Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220505163029.6541-1-luca@z3ntu.xyz --- .../arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index e1ae99579596..25c27b816e96 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -3,6 +3,7 @@ #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" #include +#include #include / { @@ -119,6 +120,35 @@ }; }; +&pm8941_lpg { + status = "okay"; + + qcom,power-source = <1>; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@7 { + reg = <7>; + color = ; + }; + + led@6 { + reg = <6>; + color = ; + }; + + led@5 { + reg = <5>; + color = ; + }; + }; +}; + &pronto { status = "okay"; -- cgit v1.2.3 From 1ea9098a81133d54b3d40d7ffd197f77881e5ecc Mon Sep 17 00:00:00 2001 From: André Almeida Date: Thu, 5 May 2022 18:43:37 +0200 Subject: ARM: dts: qcom: msm8974-hammerhead: Add notification LED Nexus 5 has a RGB LED connected to the TRILED and hence channels 7, 6 and 5 of the LPG. Add a node describing this. Signed-off-by: Luca Weiss Signed-off-by: André Almeida Reported-by: kernel test robot Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220505164336.13210-1-luca@z3ntu.xyz --- .../dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index b994474f83e6..ec5d340562b6 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -3,6 +3,7 @@ #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" #include +#include #include / { @@ -313,6 +314,35 @@ }; }; +&pm8941_lpg { + status = "okay"; + + qcom,power-source = <1>; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@7 { + reg = <7>; + color = ; + }; + + led@6 { + reg = <6>; + color = ; + }; + + led@5 { + reg = <5>; + color = ; + }; + }; +}; + &rpm_requests { pm8841-regulators { compatible = "qcom,rpm-pm8841-regulators"; -- cgit v1.2.3 From 4af1defb305798d1a064a5ea0d0c9b30e5eee185 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:35 +0200 Subject: ARM: dts: qcom: ipq8064: add multiple missing pin definition Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Drop i2c4_pins node from ipq8064-ap148 dts as it's now moved to ipq8064 dtsi. Drop mdio0_pins node from ipq8064-rb3011 dts as it's now moved to ipq8064 dtsi. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-2-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 6 ------ arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 9 --------- arch/arm/boot/dts/qcom-ipq8064.dtsi | 32 +++++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 15 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index b63d01d10189..a654d3c22c4f 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -7,12 +7,6 @@ soc { pinmux@800000 { - i2c4_pins: i2c4_pinmux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - bias-disable; - }; - buttons_pins: buttons_pins { mux { pins = "gpio54", "gpio65"; diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 9034f00f2bd8..5a65cce2500c 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -307,15 +307,6 @@ }; }; - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - mdio1_pins: mdio1_pins { mux { pins = "gpio10", "gpio11"; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 4b475d98343c..bc9987c841d0 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -382,6 +382,13 @@ }; }; + i2c4_pins: i2c4-default { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; @@ -424,6 +431,8 @@ pullups { pins = "gpio39"; + function = "nand"; + drive-strength = <10>; bias-pull-up; }; @@ -431,9 +440,32 @@ pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; + function = "nand"; + drive-strength = <10>; bias-bus-hold; }; }; + + mdio0_pins: mdio0-pins { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <8>; + bias-disable; + }; + }; + + rgmii2_pins: rgmii2-pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; intc: interrupt-controller@2000000 { -- cgit v1.2.3 From d883a12a547b6d42e795ff3b5ac87cfd013b5423 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:36 +0200 Subject: ARM: dts: qcom: ipq8064: add gsbi6 missing definition Add gsbi6 missing definition for ipq8064. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 43 +++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index bc9987c841d0..7cccfe99bf00 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -663,6 +663,49 @@ }; }; + gsbi6: gsbi@16500000 { + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16500000 0x100>; + cell-index = <6>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + status = "disabled"; + + gsbi6_i2c: i2c@16580000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16580000 0x1000>; + interrupts = ; + + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + gsbi6_spi: spi@16580000 { + compatible = "qcom,spi-qup-v1.1.1"; + reg = <0x16580000 0x1000>; + interrupts = ; + + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; -- cgit v1.2.3 From 5c47a46d5e942ea6b041c8b7727b201817c1ff76 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:37 +0200 Subject: ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulators Add specific ipq8064 dtsi with smb208 rpm regulators. Qcom advise to use this configuration but it's not mandatory and OEM can decide to implement their own regulators. smb208 regulators are used to scale CPU voltage, L2 cache voltage and Ubi32 cores. There regulators are controlled by rpm and to correctly works gsbi4-i2c require to be NEVER disabled or rpm will reject any regulator change request. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-4-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi | 37 ++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi new file mode 100644 index 000000000000..ac9c44f0c164 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "qcom-ipq8064.dtsi" + +&rpm { + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; + + smb208_s1a: s1a { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s1b: s1b { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2a: s2a { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2b: s2b { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + }; +}; -- cgit v1.2.3 From 0ce34e0c13e99c239cce6099f64b0e95697f36b1 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:38 +0200 Subject: ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmac Add missing snps,dwmac compatible for gmac ipq8064 dtsi. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-5-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7cccfe99bf00..a80090f5509e 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1042,7 +1042,7 @@ gmac0: ethernet@37000000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37000000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1066,7 +1066,7 @@ gmac1: ethernet@37200000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37200000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1090,7 +1090,7 @@ gmac2: ethernet@37400000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37400000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1114,7 +1114,7 @@ gmac3: ethernet@37600000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37600000 0x200000>; interrupts = ; interrupt-names = "macirq"; -- cgit v1.2.3 From d63d3124c0a5cdbe8b91d81b922fe56b2462e1b9 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:39 +0200 Subject: ARM: dts: qcom: ipq8064: disable usb phy by default Disable usb phy by default. When the usb phy were pushed, half of them were flagged as disabled by mistake. Correctly disable all usb phy and enable them only if a device actually use them. Signed-off-by: Christian Marangi Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-6-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index a80090f5509e..e70167870476 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1188,6 +1188,8 @@ clocks = <&gcc USB30_1_UTMI_CLK>; clock-names = "ref"; #phy-cells = <0>; + + status = "disabled"; }; ss_phy_1: phy@110f8830 { @@ -1196,6 +1198,8 @@ clocks = <&gcc USB30_1_MASTER_CLK>; clock-names = "ref"; #phy-cells = <0>; + + status = "disabled"; }; usb3_1: usb3@110f8800 { -- cgit v1.2.3 From 8fafb7e5c041814876266259e5e439f93571dcef Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:40 +0200 Subject: ARM: dts: qcom: ipq8064: reduce pci IO size to 64K The current value for pci IO is problematic for ath10k wifi card commonly connected to ipq8064 SoC. The current value is probably a typo and is actually uncommon to find 1MB IO space even on a x86 arch. Also with recent changes to the pci driver, pci1 and pci2 now fails to function as any connected device fails any reg read/write. Reduce this to 64K as it should be more than enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT hardcoded for the ARM arch. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-7-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index e70167870476..8d2f7c8bf6ac 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -885,7 +885,7 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */ + ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ interrupts = ; @@ -936,7 +936,7 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */ + ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ interrupts = ; @@ -987,7 +987,7 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */ + ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */ interrupts = ; -- cgit v1.2.3 From 6c421a9c08286389bb331fe783e2625c9efcc187 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:41 +0200 Subject: ARM: dts: qcom: ipq8064: fix and add some missing gsbi node Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing gsbi7 i2c node and gsbi1 node. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-8-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 54 ++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 8d2f7c8bf6ac..69cf664851c6 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -539,6 +539,44 @@ regulator; }; + gsbi1: gsbi@12440000 { + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x12440000 0x100>; + cell-index = <1>; + clocks = <&gcc GSBI1_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + status = "disabled"; + + gsbi1_serial: serial@12450000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x12450000 0x100>, + <0x12400000 0x03>; + interrupts = ; + clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + + status = "disabled"; + }; + + gsbi1_i2c: i2c@12460000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x12460000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; + gsbi2: gsbi@12480000 { compatible = "qcom,gsbi-v1.0.0"; cell-index = <2>; @@ -562,7 +600,7 @@ status = "disabled"; }; - i2c@124a0000 { + gsbi2_i2c: i2c@124a0000 { compatible = "qcom,i2c-qup-v1.1.1"; reg = <0x124a0000 0x1000>; interrupts = ; @@ -727,6 +765,20 @@ clock-names = "core", "iface"; status = "disabled"; }; + + gsbi7_i2c: i2c@16680000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16680000 0x1000>; + interrupts = ; + + clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>; + clock-names = "core", "iface"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; }; rng@1a500000 { -- cgit v1.2.3 From 7f5aecdd4ffcc018f73171bc0e028cd4e3361acd Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 03:09:43 +0200 Subject: ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node Add speedbin efuse nvmem cell needed for the opp table for the CPU freqs. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707010943.20857-10-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 69cf664851c6..71572028bc36 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -854,6 +854,9 @@ reg = <0x00700000 0x1000>; #address-cells = <1>; #size-cells = <1>; + speedbin_efuse: speedbin@c0 { + reg = <0xc0 0x4>; + }; tsens_calib: calib@400 { reg = <0x400 0xb>; }; -- cgit v1.2.3 From fbe4be367b2169602f6a5949a20d2917b25714d4 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 12:20:39 +0200 Subject: ARM: dts: qcom: ipq8064: add missing hwlock Add missing hwlock for ipq8064 dtsi provided by qcom,sfpb-mutex. Signed-off-by: Christian Marangi Acked-by: Krzysztof Kozlowski [bjorn: Moved the node inside /soc] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707102040.1859-2-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 71572028bc36..1644041f6a96 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1357,5 +1357,12 @@ dma-names = "tx", "rx"; }; }; + + sfpb_mutex: hwlock@1200600 { + compatible = "qcom,sfpb-mutex"; + reg = <0x01200600 0x100>; + + #hwlock-cells = <1>; + }; }; }; -- cgit v1.2.3 From 4fefb5434c4b735daf913abaef12431405368031 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 12:20:40 +0200 Subject: ARM: dts: qcom: ipq8064: add missing smem compatible Add missing smem compatible and hwlocks phandle for ipq8064 dtsi smem node. Signed-off-by: Christian Marangi Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220707102040.1859-3-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 1644041f6a96..da90f7c08d75 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -292,8 +292,11 @@ }; smem: smem@41000000 { + compatible = "qcom,smem"; reg = <0x41000000 0x200000>; no-map; + + hwlocks = <&sfpb_mutex 3>; }; }; -- cgit v1.2.3 From 8d8be8dd7c1f5d50f84ecc7a6a41962da48c6164 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Tue, 12 Jul 2022 14:44:18 +0200 Subject: ARM: dts: qcom: msm8974: Disable remoteprocs by default The remoteproc configuration in qcom-msm8974.dtsi is incomplete because it lacks the regulator supplies that should be added in the board DT files. Some of the msm8974 boards are currently missing the regulator supplies and should have the remoteprocs disabled to avoid making use of the incomplete configuration. This also fixes dtbs_check warnings after moving "qcom,msm8974-mss-pil" to DT schema, which rightfully complains that the -supply properties are missing for some boards: qcom-apq8074-dragonboard.dtb: remoteproc@fc880000: 'pll-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'mss-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'oneOf' conditional failed, one must be fixed: 'power-domains' is a required property 'power-domain-names' is a required property, or 'cx-supply' is a required property 'mx-supply' is a required property Cc: Luca Weiss Cc: Konrad Dybcio Fixes: f300826d27be ("ARM: dts: qcom-msm8974: Sort and clean up nodes") Signed-off-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220712124421.3129206-4-stephan.gerhold@kernkonzept.com --- arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++++ arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 2 ++ arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 2 ++ 3 files changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index d944c6272c37..9cbdd04bf010 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1184,6 +1184,8 @@ qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; + status = "disabled"; + mba { memory-region = <&mba_region>; }; @@ -1666,6 +1668,8 @@ qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "stop"; + status = "disabled"; + smd-edge { interrupts = ; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 25c27b816e96..ff6e0066768b 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -177,10 +177,12 @@ }; &remoteproc_adsp { + status = "okay"; cx-supply = <&pm8841_s2>; }; &remoteproc_mss { + status = "okay"; cx-supply = <&pm8841_s2>; mss-supply = <&pm8841_s3>; mx-supply = <&pm8841_s1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index aa609312caf9..983e10c3d863 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -457,10 +457,12 @@ }; &remoteproc_adsp { + status = "okay"; cx-supply = <&pma8084_s2>; }; &remoteproc_mss { + status = "okay"; cx-supply = <&pma8084_s2>; mss-supply = <&pma8084_s6>; mx-supply = <&pma8084_s1>; -- cgit v1.2.3 From 94a29bffdd59498382131fd428fed221f5c96def Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 4 Jul 2022 13:36:21 +0200 Subject: ARM: dts: turris-omnia: configure LED[0] pin function to link/activity The marvell PHY driver changes the LED[0] pin function to "On - 1000 Mbps Link, Off - Else". Turris Omnia expects that the function is "On - Link, Blink - Activity, Off - No link". Use the `marvell,reg-init` DT property to change the function. In the future, once netdev trigger will support HW offloading, we will be able to have this configured via the combination of PHY driver and leds-turris-omnia driver. Signed-off-by: Marek Behún Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-385-turris-omnia.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts index f4878df39753..1583c4b14ae8 100644 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts @@ -397,7 +397,8 @@ phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; - marvell,reg-init = <3 18 0 0x4985>; + marvell,reg-init = <3 18 0 0x4985>, + <3 16 0xfff0 0x0001>; /* irq is connected to &pcawan pin 7 */ }; -- cgit v1.2.3 From 40624346b7ae0c2b1209fc9993ea30699e512c50 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 4 Jul 2022 13:36:22 +0200 Subject: ARM: dts: turris-omnia: enable LED controller node The LED controller node is disabled because the leds-turris-omnia driver does not support setting the LED blinking to be controlled by the MCU. The patches for that have now been sent [1], so let's enable the node. [1] https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/ Signed-off-by: Marek Behún Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-385-turris-omnia.dts | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts index 1583c4b14ae8..d1e0db6e5730 100644 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts @@ -191,15 +191,13 @@ reg = <0x2b>; #address-cells = <1>; #size-cells = <0>; + status = "okay"; /* * LEDs are controlled by MCU (STM32F0) at * address 0x2b. * - * The driver does not support HW control mode - * for the LEDs yet. Disable the LEDs for now. - * - * Also LED functions are not stable yet: + * LED functions are not stable yet: * - there are 3 LEDs connected via MCU to PCIe * ports. One of these ports supports mSATA. * There is no mSATA nor PCIe function. @@ -210,7 +208,6 @@ * B. Again there is no such function defined. * For now we use LED_FUNCTION_INDICATOR */ - status = "disabled"; multi-led@0 { reg = <0x0>; -- cgit v1.2.3 From aa7fd3bb6017b343585e97a909f9b7d2fe174018 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Thu, 7 Jul 2022 00:53:19 +0200 Subject: ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and msm8660 Add missing rpmcc pxo and cxo clock for apq8064, ipq8064 and msm8660 dtsi. Signed-off-by: Christian Marangi Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220706225321.26215-3-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 ++ arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 ++ arch/arm/boot/dts/qcom-msm8660.dtsi | 4 +++- 3 files changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 01207f6116a9..ada4c828bf2f 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -862,6 +862,8 @@ rpmcc: clock-controller { compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc"; #clock-cells = <1>; + clocks = <&pxo_board>, <&cxo_board>; + clock-names = "pxo", "cxo"; }; regulators { diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index da90f7c08d75..c8337c870bdb 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -906,6 +906,8 @@ rpmcc: clock-controller { compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc"; #clock-cells = <1>; + clocks = <&pxo_board>; + clock-names = "pxo"; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index b9cded35b1cc..63a501c63cf8 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -56,7 +56,7 @@ clock-frequency = <19200000>; }; - pxo_board { + pxo_board: pxo_board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; @@ -411,6 +411,8 @@ rpmcc: clock-controller { compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc"; #clock-cells = <1>; + clocks = <&pxo_board>; + clock-names = "pxo"; }; pm8901-regulators { -- cgit v1.2.3 From 390ffde2b97c8d50f87bf450208b3a4ed70cc2db Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 23 Jun 2022 09:24:28 +0200 Subject: ARM: dts: aspeed: centriq2400: drop the board The board is unmaintained and unused, according to Joel, so simply let's remove it. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/all/CACPK8XfxXi8kQr+vxta8rD6SBgxLf_oBjAH0UkPBacQta552YQ@mail.gmail.com/ Link: https://lore.kernel.org/r/20220623072428.33697-1-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/Makefile | 1 - .../boot/dts/aspeed-bmc-arm-centriq2400-rep.dts | 225 --------------------- 2 files changed, 226 deletions(-) delete mode 100644 arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f9484f5ef126..fca5400b607f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1573,7 +1573,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-ast2600-evb.dtb \ aspeed-bmc-amd-ethanolx.dtb \ aspeed-bmc-ampere-mtjade.dtb \ - aspeed-bmc-arm-centriq2400-rep.dtb \ aspeed-bmc-arm-stardragon4800-rep2.dtb \ aspeed-bmc-asrock-e3c246d4i.dtb \ aspeed-bmc-asrock-romed8hm3.dtb \ diff --git a/arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dts b/arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dts deleted file mode 100644 index 3395de96ee11..000000000000 --- a/arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dts +++ /dev/null @@ -1,225 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/dts-v1/; - -#include "aspeed-g5.dtsi" -#include - -/ { - model = "Qualcomm Centriq 2400 REP AST2520"; - compatible = "qualcomm,centriq2400-rep-bmc", "aspeed,ast2500"; - - chosen { - stdout-path = &uart5; - bootargs = "console=ttyS4,115200 earlycon"; - }; - - memory@80000000 { - reg = <0x80000000 0x40000000>; - }; - - iio-hwmon { - compatible = "iio-hwmon"; - io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, - <&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>; - }; - - iio-hwmon-battery { - compatible = "iio-hwmon"; - io-channels = <&adc 7>; - }; - - leds { - compatible = "gpio-leds"; - - uid_led { - label = "UID_LED"; - gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>; - }; - - ras_error_led { - label = "RAS_ERROR_LED"; - gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>; - }; - - system_fault { - label = "System_fault"; - gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>; - }; - }; -}; - -&fmc { - status = "okay"; - flash@0 { - status = "okay"; - m25p,fast-read; - label = "bmc"; -#include "openbmc-flash-layout.dtsi" - }; -}; - -&spi1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1_default>; - flash@0 { - status = "okay"; - }; -}; - -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi2ck_default - &pinctrl_spi2miso_default - &pinctrl_spi2mosi_default - &pinctrl_spi2cs0_default>; -}; - -&uart3 { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; - current-speed = <115200>; -}; - -&uart5 { - status = "okay"; -}; - -&mac0 { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - tmp421@1e { - compatible = "ti,tmp421"; - reg = <0x1e>; - }; - tmp421@2a { - compatible = "ti,tmp421"; - reg = <0x2a>; - }; - tmp421@4e { - compatible = "ti,tmp421"; - reg = <0x4e>; - }; - tmp421@1c { - compatible = "ti,tmp421"; - reg = <0x1c>; - }; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; -}; - -&i2c6 { - status = "okay"; - - tmp421@1d { - compatible = "ti,tmp421"; - reg = <0x1d>; - }; - tmp421@1f { - compatible = "ti,tmp421"; - reg = <0x1f>; - }; - tmp421@4d { - compatible = "ti,tmp421"; - reg = <0x4d>; - }; - tmp421@4f { - compatible = "ti,tmp421"; - reg = <0x4f>; - }; - nvt210@4c { - compatible = "nvt210"; - reg = <0x4c>; - }; - eeprom@50 { - compatible = "atmel,24c128"; - reg = <0x50>; - pagesize = <128>; - }; -}; - -&i2c7 { - status = "okay"; -}; - -&i2c8 { - status = "okay"; - - pca9641@70 { - compatible = "nxp,pca9641"; - reg = <0x70>; - i2c-arb { - #address-cells = <1>; - #size-cells = <0>; - tmp421@1d { - compatible = "tmp421"; - reg = <0x1d>; - }; - adm1278@12 { - compatible = "adi,adm1278"; - reg = <0x12>; - Rsense = <500>; - }; - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - ds1100@58 { - compatible = "ds1100"; - reg = <0x58>; - }; - }; - }; -}; - -&i2c9 { - status = "okay"; -}; - -&vuart { - status = "okay"; -}; - -&gfx { - status = "okay"; -}; - -&pinctrl { - aspeed,external-nodes = <&gfx &lhc>; -}; - -&gpio { - pin_gpio_c7 { - gpio-hog; - gpios = ; - output; - line-name = "BIOS_SPI_MUX_S"; - }; -}; -- cgit v1.2.3 From 819c620507229332e2a038b1d742ee1eee5946ad Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 7 Jul 2022 15:24:59 +0200 Subject: ARM: dts: lan966x: add clock gating register The clock controller supports an optional clock gating register. This is necessary to expose the USB device clock, for example. Add it. Signed-off-by: Michael Walle Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220707132500.1708020-1-michael@walle.cc --- arch/arm/boot/dts/lan966x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7962d226242c..391fca240e38 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -65,7 +65,7 @@ #clock-cells = <1>; clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; clock-names = "cpu", "ddr", "sys"; - reg = <0xe00c00a8 0x38>; + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; }; timer { -- cgit v1.2.3 From 85e4739f88296321924f20aa5ab36c1e04f3da6a Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:56 +0200 Subject: ARM: dts: lan966x: Add gpio-restart The pcb8291 can be rebooted by toggling the GPIO 56. Therefore enable this in DT. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-2-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index d56d2054c38d..02fbf7371a8d 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -16,6 +16,12 @@ aliases { serial0 = &usart3; }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 56 GPIO_ACTIVE_LOW>; + priority = <200>; + }; }; &gpio { -- cgit v1.2.3 From 8d56c48354fca4e7980e6014d2021ebccd2ce581 Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:57 +0200 Subject: ARM: dts: lan966x: Disable can0 on pcb8291 On pcb8291, can0 and the network driver share some of the GPIOs so only 1 device can be active. Therefore disable can0 as we want to enable the network driver. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-3-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index 02fbf7371a8d..ab80558de259 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -41,7 +41,7 @@ &can0 { pinctrl-0 = <&can0_b_pins>; pinctrl-names = "default"; - status = "okay"; + status = "disabled"; /* Conflict with switch */ }; &flx3 { -- cgit v1.2.3 From d3e71a2eae1f43fd318922694b843d34b4920b07 Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:58 +0200 Subject: ARM: dts: lan966x: Enable network driver on pcb8291 The pcb8291 has 2 ports that are connected to the internal ports of the switch. Enable them in DT. Signed-off-by: Horatiu Vultur [claudiu.beznea: moved status ="okay" at the end for port0 and port1] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-4-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index ab80558de259..24d9055c4a08 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -4,6 +4,7 @@ */ /dts-v1/; #include "lan966x.dtsi" +#include "dt-bindings/phy/phy-lan966x-serdes.h" / { model = "Microchip EVB - LAN9662"; @@ -55,6 +56,40 @@ }; }; +&mdio1 { + status = "okay"; +}; + +&phy0 { + status = "okay"; +}; + +&phy1 { + status = "okay"; +}; + +&port0 { + phy-handle = <&phy0>; + phy-mode = "gmii"; + phys = <&serdes 0 CU(0)>; + status = "okay"; +}; + +&port1 { + phy-handle = <&phy1>; + phy-mode = "gmii"; + phys = <&serdes 1 CU(1)>; + status = "okay"; +}; + +&serdes { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + &watchdog { status = "okay"; }; -- cgit v1.2.3 From 6239b21bbc538e94a4362eb21b0d1479e2a0a1df Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Fri, 22 Jul 2022 15:18:36 +0200 Subject: ARM: dts: lan966x: add support for pcb8309 Add basic support for pcb8309. It is similar with pcb8291 with one big difference that is having 2 SFP cages. Therefore it has 4 network ports. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220722131836.2377720-3-horatiu.vultur@microchip.com --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/lan966x-pcb8309.dts | 184 ++++++++++++++++++++++++++++++++++ 2 files changed, 186 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/lan966x-pcb8309.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 184899808ee7..6a6166e3a405 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -772,7 +772,8 @@ dtb-$(CONFIG_SOC_IMXRT) += \ dtb-$(CONFIG_SOC_LAN966) += \ lan966x-pcb8291.dtb \ lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb \ - lan966x-kontron-kswitch-d10-mmt-8g.dtb + lan966x-kontron-kswitch-d10-mmt-8g.dtb \ + lan966x-pcb8309.dtb dtb-$(CONFIG_SOC_LS1021A) += \ ls1021a-iot.dtb \ ls1021a-moxa-uc-8410a.dtb \ diff --git a/arch/arm/boot/dts/lan966x-pcb8309.dts b/arch/arm/boot/dts/lan966x-pcb8309.dts new file mode 100644 index 000000000000..05ce27ed5648 --- /dev/null +++ b/arch/arm/boot/dts/lan966x-pcb8309.dts @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * lan966x_pcb8309.dts - Device Tree file for PCB8309 + */ +/dts-v1/; +#include "lan966x.dtsi" +#include "dt-bindings/phy/phy-lan966x-serdes.h" + +/ { + model = "Microchip EVB - LAN9662"; + compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966"; + + aliases { + serial0 = &usart3; + i2c102 = &i2c102; + i2c103 = &i2c103; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 56 GPIO_ACTIVE_LOW>; + priority = <200>; + }; + + i2c-mux { + compatible = "i2c-mux"; + #address-cells = <1>; + #size-cells = <0>; + mux-controls = <&mux>; + i2c-parent = <&i2c4>; + + i2c102: i2c-sfp@1 { + reg = <1>; + }; + + i2c103: i2c-sfp@2 { + reg = <2>; + }; + }; + + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&sgpio_out 11 0 GPIO_ACTIVE_HIGH>, /* p11b0 */ + <&sgpio_out 11 1 GPIO_ACTIVE_HIGH>; /* p11b1 */ + }; + + sfp2: sfp2 { + compatible = "sff,sfp"; + i2c-bus = <&i2c102>; + tx-disable-gpios = <&sgpio_out 10 0 GPIO_ACTIVE_LOW>; + los-gpios = <&sgpio_in 2 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sgpio_in 2 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>; + }; + + sfp3: sfp3 { + compatible = "sff,sfp"; + i2c-bus = <&i2c103>; + tx-disable-gpios = <&sgpio_out 10 1 GPIO_ACTIVE_LOW>; + los-gpios = <&sgpio_in 3 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sgpio_in 3 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_HIGH>; + }; +}; + +&flx3 { + atmel,flexcom-mode = ; + status = "okay"; + + usart3: serial@200 { + pinctrl-0 = <&fc3_b_pins>; + pinctrl-names = "default"; + status = "okay"; + }; +}; + +&flx4 { + atmel,flexcom-mode = ; + status = "okay"; + + i2c4: i2c@600 { + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + clocks = <&nic_clk>; + pinctrl-0 = <&fc4_b_pins>; + pinctrl-names = "default"; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + i2c-sda-hold-time-ns = <1500>; + status = "okay"; + }; +}; + +&gpio { + fc3_b_pins: fc3-b-pins { + /* RXD, TXD */ + pins = "GPIO_52", "GPIO_53"; + function = "fc3_b"; + }; + + fc4_b_pins: fc4-b-pins { + /* SCL, SDA */ + pins = "GPIO_57", "GPIO_58"; + function = "fc4_b"; + }; + + sgpio_a_pins: sgpio-a-pins { + /* SCK, D0, D1, LD */ + pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35"; + function = "sgpio_a"; + }; +}; + +&mdio1 { + status = "okay"; +}; + +&phy0 { + status = "okay"; +}; + +&phy1 { + status = "okay"; +}; + +&port0 { + phy-handle = <&phy0>; + phy-mode = "gmii"; + phys = <&serdes 0 CU(0)>; + status = "okay"; +}; + +&port1 { + phy-handle = <&phy1>; + phy-mode = "gmii"; + phys = <&serdes 1 CU(1)>; + status = "okay"; +}; + +&port2 { + sfp = <&sfp2>; + managed = "in-band-status"; + phy-mode = "sgmii"; + phys = <&serdes 2 SERDES6G(0)>; + status = "okay"; +}; + +&port3 { + sfp = <&sfp3>; + managed = "in-band-status"; + phy-mode = "sgmii"; + phys = <&serdes 3 SERDES6G(1)>; + status = "okay"; +}; + +&serdes { + status = "okay"; +}; + +&sgpio { + pinctrl-0 = <&sgpio_a_pins>; + pinctrl-names = "default"; + microchip,sgpio-port-ranges = <0 3>, <8 11>; + status = "okay"; + + gpio@0 { + ngpios = <64>; + }; + gpio@1 { + ngpios = <64>; + }; +}; + +&switch { + status = "okay"; +}; -- cgit v1.2.3 From ed65704f3a8f5add6542c1f363abc715934ade98 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 26 Jul 2022 11:49:31 +0300 Subject: ARM: dts: lan966x: keep lan966 entries alphabetically sorted Keep LAN966 entries alphabetically sorted. Signed-off-by: Claudiu Beznea Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220726084931.1789855-1-claudiu.beznea@microchip.com --- arch/arm/boot/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6a6166e3a405..f12c5c1b1c93 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -770,9 +770,9 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \ dtb-$(CONFIG_SOC_IMXRT) += \ imxrt1050-evk.dtb dtb-$(CONFIG_SOC_LAN966) += \ - lan966x-pcb8291.dtb \ lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb \ lan966x-kontron-kswitch-d10-mmt-8g.dtb \ + lan966x-pcb8291.dtb \ lan966x-pcb8309.dtb dtb-$(CONFIG_SOC_LS1021A) += \ ls1021a-iot.dtb \ -- cgit v1.2.3