From eca9e56eb8dfcf2b8b966c1c49e4622196f0586d Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 26 Jun 2006 16:16:06 -0700 Subject: ARM: OMAP: DMA transfer parameter configuration fix Fix for re-using OMAP DMA channel with different transfer parameters. Bits in the CCR register need to be cleaned as well in some cases. Signed-off-by: Peter Ujfalusi Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/dma.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/plat-omap/dma.c') diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 5dac4230360d..aa1cf79f9543 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -166,18 +166,24 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, if (cpu_is_omap24xx() && dma_trigger) { u32 val = OMAP_DMA_CCR_REG(lch); + val &= ~(3 << 19); if (dma_trigger > 63) val |= 1 << 20; if (dma_trigger > 31) val |= 1 << 19; + val &= ~(0x1f); val |= (dma_trigger & 0x1f); if (sync_mode & OMAP_DMA_SYNC_FRAME) val |= 1 << 5; + else + val &= ~(1 << 5); if (sync_mode & OMAP_DMA_SYNC_BLOCK) val |= 1 << 18; + else + val &= ~(1 << 18); if (src_or_dst_synch) val |= 1 << 24; /* source synch */ -- cgit v1.2.3