From fcb008a75702c9932f54e5425e7c12b0ea5cf487 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 26 Oct 2016 16:14:07 +0200 Subject: arm64: dts: r8a7796: add I2C support Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 94 ++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index f9cb7796ad49..2e940ff61378 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -17,6 +17,16 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; @@ -239,6 +249,90 @@ #power-domain-cells = <1>; }; + i2c0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe6500000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 931>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <110>; + status = "disabled"; + }; + + i2c1: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe6508000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 930>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c2: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe6510000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 929>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c3: i2c@e66d0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe66d0000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 928>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <110>; + status = "disabled"; + }; + + i2c4: i2c@e66d8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe66d8000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 927>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <110>; + status = "disabled"; + }; + + i2c5: i2c@e66e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe66e0000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 919>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <110>; + status = "disabled"; + }; + + i2c6: i2c@e66e8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7796"; + reg = <0 0xe66e8000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 918>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; -- cgit v1.2.3 From c758f4e333ee7473056484f7ea2294cb1e58c9d5 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 26 Oct 2016 16:14:08 +0200 Subject: arm64: dts: r8a7796: Enable I2C DMA Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 2e940ff61378..9599f5691099 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -257,6 +257,9 @@ interrupts = ; clocks = <&cpg CPG_MOD 931>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac1 0x91>, <&dmac1 0x90>, + <&dmac2 0x91>, <&dmac2 0x90>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -269,6 +272,9 @@ interrupts = ; clocks = <&cpg CPG_MOD 930>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac1 0x93>, <&dmac1 0x92>, + <&dmac2 0x93>, <&dmac2 0x92>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -281,6 +287,9 @@ interrupts = ; clocks = <&cpg CPG_MOD 929>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac1 0x95>, <&dmac1 0x94>, + <&dmac2 0x95>, <&dmac2 0x94>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -293,6 +302,8 @@ interrupts = ; clocks = <&cpg CPG_MOD 928>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac0 0x97>, <&dmac0 0x96>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -305,6 +316,8 @@ interrupts = ; clocks = <&cpg CPG_MOD 927>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac0 0x99>, <&dmac0 0x98>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -317,6 +330,8 @@ interrupts = ; clocks = <&cpg CPG_MOD 919>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -329,6 +344,8 @@ interrupts = ; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; -- cgit v1.2.3 From 20b93fbb08bd38f094186f604e4e5bdafe23f817 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 26 Oct 2016 16:14:09 +0200 Subject: arm64: dts: r8a7796: salvator-x: enable I2C Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts index a9c296b1e1b7..f35e96ca7d60 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts @@ -111,6 +111,11 @@ function = "scif_clk"; }; + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -208,6 +213,13 @@ status = "okay"; }; +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &wdt0 { timeout-sec = <60>; status = "okay"; -- cgit v1.2.3 From c77c97557614f07c72393eafa09ef826e0924293 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:04:54 +0300 Subject: arm64: dts: h3ulcb: update header This updates H3ULCB device tree header with official board name Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index bcb11a868343..f178fe1730de 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the H3ULCB board + * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board * * Copyright (C) 2016 Renesas Electronics Corp. * Copyright (C) 2016 Cogent Embedded, Inc. -- cgit v1.2.3 From d9b1c753878310c90e8be178f6a8e119fd0aa25d Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:07:09 +0300 Subject: arm64: dts: m3ulcb: initial device tree Add the initial device tree for the R8A7796 SoC based M3ULCB low cost board (R-Car Starter Kit Pro) This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/Makefile | 2 +- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 51 ++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index eb72830ec9eb..1618e0a3c81d 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -1,5 +1,5 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb -dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb always := $(dtb-y) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts new file mode 100644 index 000000000000..1ae0708bb495 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -0,0 +1,51 @@ +/* + * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board + * + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7796.dtsi" +#include + +/ { + model = "Renesas M3ULCB board based on r8a7796"; + compatible = "renesas,m3ulcb", "renesas,r8a7796"; + + aliases { + serial0 = &scif2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&pfc { + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; -- cgit v1.2.3 From d92ce1a57480e17aff1fb8693cc919bb46a6e0fd Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:07:20 +0300 Subject: arm64: dts: m3ulcb: enable SCIF clk and pins This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 1ae0708bb495..96cda59c2698 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -37,10 +37,18 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif2_pins: scif2 { groups = "scif2_data_a"; function = "scif2"; }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; }; &scif2 { @@ -49,3 +57,8 @@ status = "okay"; }; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; -- cgit v1.2.3 From 811a0d07e68ed3bb576e2f193f2c9831bb25c04e Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:07:31 +0300 Subject: arm64: dts: m3ulcb: enable GPIO leds This supports GPIO leds on M3ULCB board Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 96cda59c2698..49162bd488f8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -30,6 +30,17 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; + + leds { + compatible = "gpio-leds"; + + led5 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + led6 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + }; }; &extal_clk { -- cgit v1.2.3 From 96cc1e177c1260e53ac39a0fb109f5d9e7300b09 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:07:43 +0300 Subject: arm64: dts: m3ulcb: enable GPIO keys This supports GPIO keys on M3ULCB board Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 49162bd488f8..2f8f183ea0cd 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -12,6 +12,7 @@ /dts-v1/; #include "r8a7796.dtsi" #include +#include / { model = "Renesas M3ULCB board based on r8a7796"; @@ -41,6 +42,18 @@ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; }; }; + + keyboard { + compatible = "gpio-keys"; + + key-1 { + linux,code = ; + label = "SW3"; + wakeup-source; + debounce-interval = <20>; + gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + }; + }; }; &extal_clk { -- cgit v1.2.3 From 7be98b473d407583d29baad10df50639fd63b213 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:08:02 +0300 Subject: arm64: dts: m3ulcb: enable EXTALR clk This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 2f8f183ea0cd..5567c46f3753 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -60,6 +60,10 @@ clock-frequency = <16666666>; }; +&extalr_clk { + clock-frequency = <32768>; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 31e12cb663b0392c9dda1c6edf0c4b22bf15232d Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Thu, 3 Nov 2016 21:08:12 +0300 Subject: arm64: dts: m3ulcb: enable WDT This supports watchdog timer for M3ULCB board Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 5567c46f3753..593d0b4ab31a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -90,3 +90,8 @@ clock-frequency = <14745600>; status = "okay"; }; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; -- cgit v1.2.3 From 5be54db85872fddf060ccec962a50b40d3b24625 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 8 Nov 2016 17:14:21 +0300 Subject: arm64: dts: m3ulcb: enable SDHI0 This supports SDHI0 on M3ULCB board SD card slot Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 49 ++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index 593d0b4ab31a..d209e5480ff6 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -54,6 +54,30 @@ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; }; }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -77,6 +101,31 @@ groups = "scif_clk_a"; function = "scif_clk"; }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; }; &scif2 { -- cgit v1.2.3 From fd51baee7abc388916b3e3b58dc062ef9c534150 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 8 Nov 2016 17:14:42 +0300 Subject: arm64: dts: m3ulcb: enable SDHI2 This supports SDHI2 for M3ULCB onboard eMMC Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 43 ++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index d209e5480ff6..c3f064ac2cb4 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -55,6 +55,24 @@ }; }; + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_sdhi0: regulator-vcc-sdhi0 { compatible = "regulator-fixed"; @@ -113,6 +131,18 @@ function = "sdhi0"; power-source = <1800>; }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; }; &sdhi0 { @@ -128,6 +158,19 @@ status = "okay"; }; +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 274dc8916d4b4b2f6a2636e670771c806a7e6a96 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 8 Nov 2016 17:16:19 +0300 Subject: arm64: dts: h3ulcb: enable SDHI2 This supports SDHI2 for H3ULCB onboard eMMC Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 43 ++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index f178fe1730de..8d0ac076d8e2 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -62,6 +62,24 @@ clock-frequency = <24576000>; }; + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_sdhi0: regulator-vcc-sdhi0 { compatible = "regulator-fixed"; @@ -157,6 +175,18 @@ power-source = <1800>; }; + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + sound_pins: sound { groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; function = "ssi"; @@ -273,6 +303,19 @@ status = "okay"; }; +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + &ssi1 { shared-pin; }; -- cgit v1.2.3 From 93373c309a703b57690216db4106a4a534929c15 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 8 Nov 2016 17:16:29 +0300 Subject: arm64: dts: h3ulcb: rename SDHI0 pins This changes SDHI0 pin names for H3ULCB board Signed-off-by: Vladimir Barinov Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index 8d0ac076d8e2..6ffb0517421a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -163,13 +163,13 @@ function = "avb"; }; - sdhi0_pins_3v3: sd0_3v3 { + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; power-source = <3300>; }; - sdhi0_pins_1v8: sd0_1v8 { + sdhi0_pins_uhs: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; power-source = <1800>; @@ -291,8 +291,8 @@ }; &sdhi0 { - pinctrl-0 = <&sdhi0_pins_3v3>; - pinctrl-1 = <&sdhi0_pins_1v8>; + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; -- cgit v1.2.3 From bd6777f8b4cdb53dafb12229410acf2ab85d7c28 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 14 Nov 2016 19:37:16 +0100 Subject: arm64: dts: r8a7795: Add device node for PRR Add a device node for the Product Register, which provides SoC product and revision information. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 681f54422375..a39a702b904d 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -321,6 +321,11 @@ #power-domain-cells = <0>; }; + prr: chipid@fff00044 { + compatible = "renesas,prr"; + reg = <0 0xfff00044 0 4>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7795-sysc"; reg = <0 0xe6180000 0 0x0400>; -- cgit v1.2.3 From 5de68961cf5618c1ce5bb15848b36121247f23d5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 14 Nov 2016 19:37:17 +0100 Subject: arm64: dts: r8a7796: Add device node for PRR Add a device node for the Product Register, which provides SoC product and revision information. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 9599f5691099..41a050d2f192 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -243,6 +243,11 @@ #power-domain-cells = <0>; }; + prr: chipid@fff00044 { + compatible = "renesas,prr"; + reg = <0 0xfff00044 0 4>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a7796-sysc"; reg = <0 0xe6180000 0 0x0400>; -- cgit v1.2.3