From 28dc7ef8cd53f965da47688a52f7afddb00979d2 Mon Sep 17 00:00:00 2001 From: Mateusz Krawczuk Date: Sat, 28 Dec 2013 18:09:16 +0100 Subject: ARM: S5PV210: Migrate clock handling to Common Clock Framework This patch migrates the s5pv210 platform to use new clock driver using Common Clock Framework. Signed-off-by: Mateusz Krawczuk Signed-off-by: Kyungmin Park [t.figa: Rebased and fixed merge conflicts.] Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/Kconfig | 9 +++++++++ arch/arm/mach-s5pv210/Makefile | 4 ++-- arch/arm/mach-s5pv210/common.c | 16 ++++++++++++++++ arch/arm/mach-s5pv210/common.h | 9 +++++++++ arch/arm/mach-s5pv210/mach-goni.c | 2 +- arch/arm/mach-s5pv210/mach-smdkv210.c | 2 +- arch/arm/plat-samsung/Kconfig | 2 +- 7 files changed, 39 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index f60f2862856d..60785cea7c61 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -13,6 +13,7 @@ config CPU_S5PV210 bool select ARM_AMBA select PL330_DMA if DMADEVICES + select S5P_CLOCK if !COMMON_CLK select S5P_EXT_INT select S5P_PM if PM select S5P_SLEEP if PM @@ -70,6 +71,14 @@ config S5PV210_SETUP_USB_PHY help Common setup code for USB PHY controller +config COMMON_CLK_S5PV210 + bool "Common Clock Framework support" + default y + select COMMON_CLK_SAMSUNG + help + Enable this option to use new clock driver + based on Common Clock Framework. + menu "S5PC110 Machines" config MACH_AQUILA diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 1c4e41998a10..d1a493aea1cf 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -12,8 +12,8 @@ obj- := # Core -obj-y += common.o clock.o - +obj-y += common.o +obj-$(CONFIG_S5P_CLOCK) += clock.o obj-$(CONFIG_PM) += pm.o obj-y += dma.o diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 7024dcd0e40a..2e2202ac7173 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -35,7 +36,13 @@ #include #include + +#ifdef CONFIG_S5P_CLOCK #include +#else +#include +#endif + #include #include #include @@ -50,6 +57,9 @@ #include "common.h" +/* External clock frequency */ +static unsigned long xusbxti_f; + static const char name_s5pv210[] = "S5PV210/S5PC110"; static struct cpu_table cpu_ids[] __initdata = { @@ -229,18 +239,24 @@ void __init s5pv210_map_io(void) void __init s5pv210_init_clocks(int xtal) { +#ifdef CONFIG_S5P_CLOCK printk(KERN_DEBUG "%s: initializing clocks\n", __func__); s3c24xx_register_baseclocks(xtal); s5p_register_clocks(xtal); s5pv210_register_clocks(); s5pv210_setup_clocks(); +#else + xusbxti_f = xtal; +#endif } void __init s5pv210_init_irq(void) { u32 vic[4]; /* S5PV210 supports 4 VIC */ + s5pv210_clk_init(0, xusbxti_f, S3C_VA_SYS); + /* All the VICs are fully populated. */ vic[0] = ~0; vic[1] = ~0; diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h index fe1beb54e548..a2e85cb9b471 100644 --- a/arch/arm/mach-s5pv210/common.h +++ b/arch/arm/mach-s5pv210/common.h @@ -14,6 +14,15 @@ #include +#ifdef CONFIG_COMMON_CLK_S5PV210 +void s5pv210_clk_init(unsigned long xxti_f, unsigned long xusbxti_f, + void __iomem *reg_base); +#else +static inline void s5pv210_clk_init(unsigned long xxti_f, + unsigned long xusbxti_f, + void __iomem *reg_base) {} +#endif + void s5pv210_init_io(struct map_desc *mach_desc, int size); void s5pv210_init_irq(void); diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index c1ce921c4088..0fc71beab779 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -849,7 +849,7 @@ static void __init goni_sound_init(void) static void __init goni_map_io(void) { s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(clk_xusbxti.rate); + s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); } diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 2a6655fb63e7..1bde3a37060b 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -285,7 +285,7 @@ static struct platform_pwm_backlight_data smdkv210_bl_data = { static void __init smdkv210_map_io(void) { s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(clk_xusbxti.rate); + s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); samsung_set_timer_source(SAMSUNG_PWM2, SAMSUNG_PWM4); } diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 1c629c2c270f..42f5d5bde627 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -78,7 +78,7 @@ config SAMSUNG_CLKSRC used by newer systems such as the S3C64XX. config S5P_CLOCK - def_bool ARCH_S5PV210 + bool help Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs -- cgit v1.2.3 From 32726d2d5502302ba5753854f5f2f12ba22681c4 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Wed, 2 Jul 2014 19:42:03 +0200 Subject: ARM: SAMSUNG: Remove legacy clock code Since S5PV210 now has a complete clock driver using Common Clock Framework, there is no reason to keep the old code. Remove it together with the whole legacy Samsung-specific clock framework which no longer has any users. Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/Kconfig | 1 + arch/arm/mach-exynos/pm.c | 1 - arch/arm/mach-s3c24xx/common.c | 2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c | 1 - arch/arm/mach-s3c24xx/mach-h1940.c | 5 +- arch/arm/mach-s3c24xx/mach-jive.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2413.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2416.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2443.c | 1 - arch/arm/mach-s3c24xx/mach-vstms.c | 1 - arch/arm/mach-s3c24xx/s3c2410.c | 6 - arch/arm/mach-s3c24xx/s3c2412.c | 6 - arch/arm/mach-s3c24xx/s3c2442.c | 1 - arch/arm/mach-s3c24xx/s3c244x.c | 6 - arch/arm/mach-s3c64xx/mach-anw6410.c | 1 - arch/arm/mach-s3c64xx/mach-crag6410.c | 1 - arch/arm/mach-s3c64xx/mach-hmt.c | 1 - arch/arm/mach-s3c64xx/mach-ncp.c | 1 - arch/arm/mach-s3c64xx/mach-smartq.c | 1 - arch/arm/mach-s3c64xx/mach-smdk6400.c | 1 - arch/arm/mach-s3c64xx/mach-smdk6410.c | 1 - arch/arm/mach-s3c64xx/s3c6400.c | 1 - arch/arm/mach-s3c64xx/s3c6410.c | 1 - arch/arm/mach-s5pv210/Kconfig | 9 - arch/arm/mach-s5pv210/Makefile | 1 - arch/arm/mach-s5pv210/clock.c | 1365 -------------------- arch/arm/mach-s5pv210/common.c | 16 +- arch/arm/mach-s5pv210/common.h | 6 - arch/arm/mach-s5pv210/mach-goni.c | 1 - arch/arm/mach-s5pv210/mach-smdkv210.c | 1 - arch/arm/mach-s5pv210/pm.c | 48 - arch/arm/plat-samsung/Kconfig | 18 - arch/arm/plat-samsung/Makefile | 5 - arch/arm/plat-samsung/clock-clksrc.c | 212 --- arch/arm/plat-samsung/clock.c | 539 -------- arch/arm/plat-samsung/include/plat/clock-clksrc.h | 83 -- arch/arm/plat-samsung/include/plat/clock.h | 152 --- arch/arm/plat-samsung/include/plat/cpu-freq-core.h | 3 - arch/arm/plat-samsung/include/plat/pll.h | 323 ----- arch/arm/plat-samsung/include/plat/s5p-clock.h | 65 - arch/arm/plat-samsung/init.c | 1 - arch/arm/plat-samsung/s5p-clock.c | 294 ----- 42 files changed, 6 insertions(+), 3179 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/clock.c delete mode 100644 arch/arm/plat-samsung/clock-clksrc.c delete mode 100644 arch/arm/plat-samsung/clock.c delete mode 100644 arch/arm/plat-samsung/include/plat/clock-clksrc.h delete mode 100644 arch/arm/plat-samsung/include/plat/clock.h delete mode 100644 arch/arm/plat-samsung/include/plat/pll.h delete mode 100644 arch/arm/plat-samsung/include/plat/s5p-clock.h delete mode 100644 arch/arm/plat-samsung/s5p-clock.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f4396fd8d6b9..c0c1c3f83679 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -765,6 +765,7 @@ config ARCH_S5PV210 select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM + select COMMON_CLK_SAMSUNG select CPU_V7 select GENERIC_CLOCKEVENTS select GPIO_SAMSUNG diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index f127c0cefbb8..a8b5af545d26 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -28,7 +28,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index c0763b837745..44fa95df9262 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -49,9 +49,7 @@ #include #include -#include #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c b/arch/arm/mach-s3c24xx/iotiming-s3c2412.c index bd064c05c473..28b13951de87 100644 --- a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c +++ b/arch/arm/mach-s3c24xx/iotiming-s3c2412.c @@ -29,7 +29,6 @@ #include #include -#include #include diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index fbf5487ae5d1..c9a99bbad545 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -60,7 +60,6 @@ #include #include #include -#include #include #include @@ -73,6 +72,10 @@ #define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) +#define S3C24XX_PLL_MDIV_SHIFT (12) +#define S3C24XX_PLL_PDIV_SHIFT (4) +#define S3C24XX_PLL_SDIV_SHIFT (0) + static struct map_desc h1940_iodesc[] __initdata = { [0] = { .virtual = (unsigned long)H1940_LATCH, diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c index e81ea82c55f9..e647b47244a9 100644 --- a/arch/arm/mach-s3c24xx/mach-jive.c +++ b/arch/arm/mach-s3c24xx/mach-jive.c @@ -48,7 +48,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c index fb3b80e44595..10726bf84920 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c @@ -43,7 +43,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c index fa6f30d23601..24189e8e8560 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c @@ -44,7 +44,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c index ef5d5ea33182..0ed77614dcfe 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2443.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c @@ -38,7 +38,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c index 9104c2be36c9..9d4f64750698 100644 --- a/arch/arm/mach-s3c24xx/mach-vstms.c +++ b/arch/arm/mach-s3c24xx/mach-vstms.c @@ -42,7 +42,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index 7eab88829883..5ffe828cd659 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c @@ -41,8 +41,6 @@ #include #include -#include -#include #include #include @@ -83,10 +81,6 @@ void __init s3c2410_map_io(void) iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); } -void __init_or_cpufreq s3c2410_setup_clocks(void) -{ -} - struct bus_type s3c2410_subsys = { .name = "s3c2410-core", .dev_name = "s3c2410-core", diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index d49f52fbc842..569f3f5a6c71 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -37,12 +37,10 @@ #include #include -#include #include #include #include #include -#include #include #include @@ -171,10 +169,6 @@ void __init s3c2412_map_io(void) iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); } -void __init_or_cpufreq s3c2412_setup_clocks(void) -{ -} - /* need to register the subsystem before we actually register the device, and * we also need to ensure that it has been initialised before any of the * drivers even try to use it (even if not on an s3c2412 based system) diff --git a/arch/arm/mach-s3c24xx/s3c2442.c b/arch/arm/mach-s3c24xx/s3c2442.c index fb9da2b603a2..7b043349f1c8 100644 --- a/arch/arm/mach-s3c24xx/s3c2442.c +++ b/arch/arm/mach-s3c24xx/s3c2442.c @@ -43,7 +43,6 @@ #include -#include #include #include diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index 4a64bcc9eb51..d1c3e65785a1 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -38,11 +38,9 @@ #include #include -#include #include #include #include -#include #include #include @@ -78,10 +76,6 @@ void __init s3c244x_map_io(void) s3c2410_device_dclk.name = "s3c2440-dclk"; } -void __init_or_cpufreq s3c244x_setup_clocks(void) -{ -} - /* Since the S3C2442 and S3C2440 share items, put both subsystems here */ struct bus_type s3c2440_subsys = { diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 55eb6a69655b..60576dfbea8d 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -45,7 +45,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 4b0199fff9f5..fe116334afda 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -58,7 +58,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 72cee08c8bf5..19e8feb908fd 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -39,7 +39,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 67f06a9ae656..4bae7dc49eea 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -40,7 +40,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c index 78dd6f73c072..b3d13537a7f0 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c64xx/mach-smartq.c @@ -28,7 +28,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index c85d1cbe769f..910749768340 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -30,7 +30,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index c6a8b2ab0240..1dc86d76b530 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -63,7 +63,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 8c42807bf579..1ce48c54cd9c 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -39,7 +39,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 5be3f09bac92..b2a7930548d9 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -40,7 +40,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 60785cea7c61..f60f2862856d 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -13,7 +13,6 @@ config CPU_S5PV210 bool select ARM_AMBA select PL330_DMA if DMADEVICES - select S5P_CLOCK if !COMMON_CLK select S5P_EXT_INT select S5P_PM if PM select S5P_SLEEP if PM @@ -71,14 +70,6 @@ config S5PV210_SETUP_USB_PHY help Common setup code for USB PHY controller -config COMMON_CLK_S5PV210 - bool "Common Clock Framework support" - default y - select COMMON_CLK_SAMSUNG - help - Enable this option to use new clock driver - based on Common Clock Framework. - menu "S5PC110 Machines" config MACH_AQUILA diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index d1a493aea1cf..08358bbccb88 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -13,7 +13,6 @@ obj- := # Core obj-y += common.o -obj-$(CONFIG_S5P_CLOCK) += clock.o obj-$(CONFIG_PM) += pm.o obj-y += dma.o diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c deleted file mode 100644 index ca463724a3df..000000000000 --- a/arch/arm/mach-s5pv210/clock.c +++ /dev/null @@ -1,1365 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/clock.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "common.h" - -static unsigned long xtal; - -static struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - }, - .sources = &clk_src_apll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - }, - .sources = &clk_src_epll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - }, - .sources = &clk_src_mpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, -}; - -static struct clk *clkset_armclk_list[] = { - [0] = &clk_mout_apll.clk, - [1] = &clk_mout_mpll.clk, -}; - -static struct clksrc_sources clkset_armclk = { - .sources = clkset_armclk_list, - .nr_sources = ARRAY_SIZE(clkset_armclk_list), -}; - -static struct clksrc_clk clk_armclk = { - .clk = { - .name = "armclk", - }, - .sources = &clkset_armclk, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_msys = { - .clk = { - .name = "hclk_msys", - .parent = &clk_armclk.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 }, -}; - -static struct clksrc_clk clk_pclk_msys = { - .clk = { - .name = "pclk_msys", - .parent = &clk_hclk_msys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 }, -}; - -static struct clksrc_clk clk_sclk_a2m = { - .clk = { - .name = "sclk_a2m", - .parent = &clk_mout_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, -}; - -static struct clk *clkset_hclk_sys_list[] = { - [0] = &clk_mout_mpll.clk, - [1] = &clk_sclk_a2m.clk, -}; - -static struct clksrc_sources clkset_hclk_sys = { - .sources = clkset_hclk_sys_list, - .nr_sources = ARRAY_SIZE(clkset_hclk_sys_list), -}; - -static struct clksrc_clk clk_hclk_dsys = { - .clk = { - .name = "hclk_dsys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_dsys = { - .clk = { - .name = "pclk_dsys", - .parent = &clk_hclk_dsys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_psys = { - .clk = { - .name = "hclk_psys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_psys = { - .clk = { - .name = "pclk_psys", - .parent = &clk_hclk_psys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, -}; - -static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); -} - -static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable); -} - -static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable); -} - -static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); -} - -static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); -} - -static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); -} - -static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); -} - -static int exynos4_clk_dac_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable); -} - -static struct clk clk_sclk_hdmi27m = { - .name = "sclk_hdmi27m", - .rate = 27000000, -}; - -static struct clk clk_sclk_hdmiphy = { - .name = "sclk_hdmiphy", -}; - -static struct clk clk_sclk_usbphy0 = { - .name = "sclk_usbphy0", -}; - -static struct clk clk_sclk_usbphy1 = { - .name = "sclk_usbphy1", -}; - -static struct clk clk_pcmcdclk0 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk1 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk2 = { - .name = "pcmcdclk", -}; - -static struct clk *clkset_vpllsrc_list[] = { - [0] = &clk_fin_vpll, - [1] = &clk_sclk_hdmi27m, -}; - -static struct clksrc_sources clkset_vpllsrc = { - .sources = clkset_vpllsrc_list, - .nr_sources = ARRAY_SIZE(clkset_vpllsrc_list), -}; - -static struct clksrc_clk clk_vpllsrc = { - .clk = { - .name = "vpll_src", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 7), - }, - .sources = &clkset_vpllsrc, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 }, -}; - -static struct clk *clkset_sclk_vpll_list[] = { - [0] = &clk_vpllsrc.clk, - [1] = &clk_fout_vpll, -}; - -static struct clksrc_sources clkset_sclk_vpll = { - .sources = clkset_sclk_vpll_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), -}; - -static struct clksrc_clk clk_sclk_vpll = { - .clk = { - .name = "sclk_vpll", - }, - .sources = &clkset_sclk_vpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 }, -}; - -static struct clk *clkset_moutdmc0src_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = NULL, - [3] = NULL, -}; - -static struct clksrc_sources clkset_moutdmc0src = { - .sources = clkset_moutdmc0src_list, - .nr_sources = ARRAY_SIZE(clkset_moutdmc0src_list), -}; - -static struct clksrc_clk clk_mout_dmc0 = { - .clk = { - .name = "mout_dmc0", - }, - .sources = &clkset_moutdmc0src, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, -}; - -static struct clksrc_clk clk_sclk_dmc0 = { - .clk = { - .name = "sclk_dmc0", - .parent = &clk_mout_dmc0.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, -}; - -static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk) -{ - return clk_get_rate(clk->parent) / 2; -} - -static struct clk_ops clk_hclk_imem_ops = { - .get_rate = s5pv210_clk_imem_get_rate, -}; - -static unsigned long s5pv210_clk_fout_apll_get_rate(struct clk *clk) -{ - return s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); -} - -static struct clk_ops clk_fout_apll_ops = { - .get_rate = s5pv210_clk_fout_apll_get_rate, -}; - -static struct clk init_clocks_off[] = { - { - .name = "rot", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1<<29), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.0", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 24), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.1", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.2", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 26), - }, { - .name = "jpeg", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 28), - }, { - .name = "mfc", - .devname = "s5p-mfc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, { - .name = "dac", - .devname = "s5p-sdo", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "mixer", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 9), - }, { - .name = "vp", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "hdmi", - .devname = "s5pv210-hdmi", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "hdmiphy", - .devname = "s5pv210-hdmi", - .enable = s5pv210_clk_hdmiphy_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "dacphy", - .devname = "s5p-sdo", - .enable = exynos4_clk_dac_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "otg", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "usb-host", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<17), - }, { - .name = "lcd", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<0), - }, { - .name = "cfcon", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<25), - }, { - .name = "systimer", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "watchdog", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<22), - }, { - .name = "rtc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<15), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<7), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<9), - }, { - .name = "i2c", - .devname = "s3c2440-hdmiphy-i2c", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "spi", - .devname = "s5pv210-spi.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<12), - }, { - .name = "spi", - .devname = "s5pv210-spi.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<13), - }, { - .name = "spi", - .devname = "s5pv210-spi.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<14), - }, { - .name = "timers", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<23), - }, { - .name = "adc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<24), - }, { - .name = "keypad", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<21), - }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<4), - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "spdif", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 0), - }, -}; - -static struct clk init_clocks[] = { - { - .name = "hclk_imem", - .parent = &clk_hclk_msys.clk, - .ctrlbit = (1 << 5), - .enable = s5pv210_clk_ip0_ctrl, - .ops = &clk_hclk_imem_ops, - }, { - .name = "uart", - .devname = "s5pv210-uart.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "uart", - .devname = "s5pv210-uart.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 18), - }, { - .name = "uart", - .devname = "s5pv210-uart.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "uart", - .devname = "s5pv210-uart.3", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 20), - }, { - .name = "sromc", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 26), - }, -}; - -static struct clk clk_hsmmc0 = { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<16), -}; - -static struct clk clk_hsmmc1 = { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<17), -}; - -static struct clk clk_hsmmc2 = { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<18), -}; - -static struct clk clk_hsmmc3 = { - .name = "hsmmc", - .devname = "s3c-sdhci.3", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<19), -}; - -static struct clk clk_pdma0 = { - .name = "pdma0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 3), -}; - -static struct clk clk_pdma1 = { - .name = "pdma1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 4), -}; - -static struct clk *clkset_uart_list[] = { - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_group1_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = &clk_mout_epll.clk, - [3] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group1 = { - .sources = clkset_group1_list, - .nr_sources = ARRAY_SIZE(clkset_group1_list), -}; - -static struct clk *clkset_sclk_onenand_list[] = { - [0] = &clk_hclk_psys.clk, - [1] = &clk_hclk_dsys.clk, -}; - -static struct clksrc_sources clkset_sclk_onenand = { - .sources = clkset_sclk_onenand_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_onenand_list), -}; - -static struct clk *clkset_sclk_dac_list[] = { - [0] = &clk_sclk_vpll.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_dac = { - .sources = clkset_sclk_dac_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list), -}; - -static struct clksrc_clk clk_sclk_dac = { - .clk = { - .name = "sclk_dac", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_sclk_dac, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_sclk_pixel = { - .clk = { - .name = "sclk_pixel", - .parent = &clk_sclk_vpll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4}, -}; - -static struct clk *clkset_sclk_hdmi_list[] = { - [0] = &clk_sclk_pixel.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_hdmi = { - .sources = clkset_sclk_hdmi_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list), -}; - -static struct clksrc_clk clk_sclk_hdmi = { - .clk = { - .name = "sclk_hdmi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &clkset_sclk_hdmi, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, -}; - -static struct clk *clkset_sclk_mixer_list[] = { - [0] = &clk_sclk_dac.clk, - [1] = &clk_sclk_hdmi.clk, -}; - -static struct clksrc_sources clkset_sclk_mixer = { - .sources = clkset_sclk_mixer_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), -}; - -static struct clksrc_clk clk_sclk_mixer = { - .clk = { - .name = "sclk_mixer", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 1), - }, - .sources = &clkset_sclk_mixer, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, -}; - -static struct clksrc_clk *sclk_tv[] = { - &clk_sclk_dac, - &clk_sclk_pixel, - &clk_sclk_hdmi, - &clk_sclk_mixer, -}; - -static struct clk *clkset_sclk_audio0_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio0 = { - .sources = clkset_sclk_audio0_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list), -}; - -static struct clksrc_clk clk_sclk_audio0 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 24), - }, - .sources = &clkset_sclk_audio0, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 0, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio1_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk1, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio1 = { - .sources = clkset_sclk_audio1_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio1_list), -}; - -static struct clksrc_clk clk_sclk_audio1 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 25), - }, - .sources = &clkset_sclk_audio1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 4, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio2 = { - .sources = clkset_sclk_audio2_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio2_list), -}; - -static struct clksrc_clk clk_sclk_audio2 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 26), - }, - .sources = &clkset_sclk_audio2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 8, .size = 4 }, -}; - -static struct clk *clkset_sclk_spdif_list[] = { - [0] = &clk_sclk_audio0.clk, - [1] = &clk_sclk_audio1.clk, - [2] = &clk_sclk_audio2.clk, -}; - -static struct clksrc_sources clkset_sclk_spdif = { - .sources = clkset_sclk_spdif_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list), -}; - -static struct clksrc_clk clk_sclk_spdif = { - .clk = { - .name = "sclk_spdif", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 27), - .ops = &s5p_sclk_spdif_ops, - }, - .sources = &clkset_sclk_spdif, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 }, -}; - -static struct clk *clkset_group2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_xusbxti, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group2 = { - .sources = clkset_group2_list, - .nr_sources = ARRAY_SIZE(clkset_group2_list), -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_dmc", - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_onenand", - }, - .sources = &clkset_sclk_onenand, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 28, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.0", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.1", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.2", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimd", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 5), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_mfc", - .devname = "s5p-mfc", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, - }, { - .clk = { - .name = "sclk_g2d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, - }, { - .clk = { - .name = "sclk_g3d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_csis", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 6), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 29), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 24, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwm", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 19), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 12, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_uart0 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart1 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 13), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart2 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 14), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart3 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 15), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 9), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 10), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc3 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 11), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pv210-spi.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 }, - }; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pv210-spi.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 17), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 }, - }; - - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uart0, - &clk_sclk_uart1, - &clk_sclk_uart2, - &clk_sclk_uart3, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_sclk_mmc3, - &clk_sclk_spi0, - &clk_sclk_spi1, -}; - -static struct clk *clk_cdev[] = { - &clk_hsmmc0, - &clk_hsmmc1, - &clk_hsmmc2, - &clk_hsmmc3, - &clk_pdma0, - &clk_pdma1, -}; - -/* Clock initialisation code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, - &clk_armclk, - &clk_hclk_msys, - &clk_sclk_a2m, - &clk_hclk_dsys, - &clk_hclk_psys, - &clk_pclk_msys, - &clk_pclk_dsys, - &clk_pclk_psys, - &clk_vpllsrc, - &clk_sclk_vpll, - &clk_mout_dmc0, - &clk_sclk_dmc0, - &clk_sclk_audio0, - &clk_sclk_audio1, - &clk_sclk_audio2, - &clk_sclk_spdif, -}; - -static u32 epll_div[][6] = { - { 48000000, 0, 48, 3, 3, 0 }, - { 96000000, 0, 48, 3, 2, 0 }, - { 144000000, 1, 72, 3, 2, 0 }, - { 192000000, 0, 48, 3, 1, 0 }, - { 288000000, 1, 72, 3, 1, 0 }, - { 32750000, 1, 65, 3, 4, 35127 }, - { 32768000, 1, 65, 3, 4, 35127 }, - { 45158400, 0, 45, 3, 3, 10355 }, - { 45000000, 0, 45, 3, 3, 10355 }, - { 45158000, 0, 45, 3, 3, 10355 }, - { 49125000, 0, 49, 3, 3, 9961 }, - { 49152000, 0, 49, 3, 3, 9961 }, - { 67737600, 1, 67, 3, 3, 48366 }, - { 67738000, 1, 67, 3, 3, 48366 }, - { 73800000, 1, 73, 3, 3, 47710 }, - { 73728000, 1, 73, 3, 3, 47710 }, - { 36000000, 1, 32, 3, 4, 0 }, - { 60000000, 1, 60, 3, 3, 0 }, - { 72000000, 1, 72, 3, 3, 0 }, - { 80000000, 1, 80, 3, 3, 0 }, - { 84000000, 0, 42, 3, 2, 0 }, - { 50000000, 0, 50, 3, 3, 0 }, -}; - -static int s5pv210_epll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int epll_con, epll_con_k; - unsigned int i; - - /* Return if nothing changed */ - if (clk->rate == rate) - return 0; - - epll_con = __raw_readl(S5P_EPLL_CON); - epll_con_k = __raw_readl(S5P_EPLL_CON1); - - epll_con_k &= ~PLL46XX_KDIV_MASK; - epll_con &= ~(1 << 27 | - PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT | - PLL46XX_PDIV_MASK << PLL46XX_PDIV_SHIFT | - PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT); - - for (i = 0; i < ARRAY_SIZE(epll_div); i++) { - if (epll_div[i][0] == rate) { - epll_con_k |= epll_div[i][5] << 0; - epll_con |= (epll_div[i][1] << 27 | - epll_div[i][2] << PLL46XX_MDIV_SHIFT | - epll_div[i][3] << PLL46XX_PDIV_SHIFT | - epll_div[i][4] << PLL46XX_SDIV_SHIFT); - break; - } - } - - if (i == ARRAY_SIZE(epll_div)) { - printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", - __func__); - return -EINVAL; - } - - __raw_writel(epll_con, S5P_EPLL_CON); - __raw_writel(epll_con_k, S5P_EPLL_CON1); - - printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", - clk->rate, rate); - - clk->rate = rate; - - return 0; -} - -static struct clk_ops s5pv210_epll_ops = { - .set_rate = s5pv210_epll_set_rate, - .get_rate = s5p_epll_get_rate, -}; - -static u32 vpll_div[][5] = { - { 54000000, 3, 53, 3, 0 }, - { 108000000, 3, 53, 2, 0 }, -}; - -static unsigned long s5pv210_vpll_get_rate(struct clk *clk) -{ - return clk->rate; -} - -static int s5pv210_vpll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int vpll_con; - unsigned int i; - - /* Return if nothing changed */ - if (clk->rate == rate) - return 0; - - vpll_con = __raw_readl(S5P_VPLL_CON); - vpll_con &= ~(0x1 << 27 | \ - PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT | \ - PLL90XX_PDIV_MASK << PLL90XX_PDIV_SHIFT | \ - PLL90XX_SDIV_MASK << PLL90XX_SDIV_SHIFT); - - for (i = 0; i < ARRAY_SIZE(vpll_div); i++) { - if (vpll_div[i][0] == rate) { - vpll_con |= vpll_div[i][1] << PLL90XX_PDIV_SHIFT; - vpll_con |= vpll_div[i][2] << PLL90XX_MDIV_SHIFT; - vpll_con |= vpll_div[i][3] << PLL90XX_SDIV_SHIFT; - vpll_con |= vpll_div[i][4] << 27; - break; - } - } - - if (i == ARRAY_SIZE(vpll_div)) { - printk(KERN_ERR "%s: Invalid Clock VPLL Frequency\n", - __func__); - return -EINVAL; - } - - __raw_writel(vpll_con, S5P_VPLL_CON); - - /* Wait for VPLL lock */ - while (!(__raw_readl(S5P_VPLL_CON) & (1 << PLL90XX_LOCKED_SHIFT))) - continue; - - clk->rate = rate; - return 0; -} -static struct clk_ops s5pv210_vpll_ops = { - .get_rate = s5pv210_vpll_get_rate, - .set_rate = s5pv210_vpll_set_rate, -}; - -void __init_or_cpufreq s5pv210_setup_clocks(void) -{ - struct clk *xtal_clk; - unsigned long vpllsrc; - unsigned long armclk; - unsigned long hclk_msys; - unsigned long hclk_dsys; - unsigned long hclk_psys; - unsigned long pclk_msys; - unsigned long pclk_dsys; - unsigned long pclk_psys; - unsigned long apll; - unsigned long mpll; - unsigned long epll; - unsigned long vpll; - unsigned int ptr; - u32 clkdiv0, clkdiv1; - - /* Set functions for clk_fout_epll */ - clk_fout_epll.enable = s5p_epll_enable; - clk_fout_epll.ops = &s5pv210_epll_ops; - - printk(KERN_DEBUG "%s: registering clocks\n", __func__); - - clkdiv0 = __raw_readl(S5P_CLK_DIV0); - clkdiv1 = __raw_readl(S5P_CLK_DIV1); - - printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", - __func__, clkdiv0, clkdiv1); - - xtal_clk = clk_get(NULL, "xtal"); - BUG_ON(IS_ERR(xtal_clk)); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); - - apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); - mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); - epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON), - __raw_readl(S5P_EPLL_CON1), pll_4600); - vpllsrc = clk_get_rate(&clk_vpllsrc.clk); - vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502); - - clk_fout_apll.ops = &clk_fout_apll_ops; - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - clk_fout_vpll.ops = &s5pv210_vpll_ops; - clk_fout_vpll.rate = vpll; - - printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", - apll, mpll, epll, vpll); - - armclk = clk_get_rate(&clk_armclk.clk); - hclk_msys = clk_get_rate(&clk_hclk_msys.clk); - hclk_dsys = clk_get_rate(&clk_hclk_dsys.clk); - hclk_psys = clk_get_rate(&clk_hclk_psys.clk); - pclk_msys = clk_get_rate(&clk_pclk_msys.clk); - pclk_dsys = clk_get_rate(&clk_pclk_dsys.clk); - pclk_psys = clk_get_rate(&clk_pclk_psys.clk); - - printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld\n" - "HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n", - armclk, hclk_msys, hclk_dsys, hclk_psys, - pclk_msys, pclk_dsys, pclk_psys); - - clk_f.rate = armclk; - clk_h.rate = hclk_psys; - clk_p.rate = pclk_psys; - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); -} - -static struct clk *clks[] __initdata = { - &clk_sclk_hdmi27m, - &clk_sclk_hdmiphy, - &clk_sclk_usbphy0, - &clk_sclk_usbphy1, - &clk_pcmcdclk0, - &clk_pcmcdclk1, - &clk_pcmcdclk2, -}; - -static struct clk_lookup s5pv210_clk_lookup[] = { - CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p), - CLKDEV_INIT("s5pv210-uart.0", "clk_uart_baud1", &clk_sclk_uart0.clk), - CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk), - CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk), - CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), - CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), - CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), - CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), - CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), - CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), - CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), - CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), -}; - -void __init s5pv210_register_clocks(void) -{ - int ptr; - - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) - s3c_register_clksrc(sclk_tv[ptr], 1); - - for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) - s3c_register_clksrc(clksrc_cdev[ptr], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup)); - - s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); - for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) - s3c_disable_clocks(clk_cdev[ptr], 1); - -} diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 2e2202ac7173..30bd5421aa79 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -37,12 +38,6 @@ #include -#ifdef CONFIG_S5P_CLOCK -#include -#else -#include -#endif - #include #include #include @@ -239,16 +234,7 @@ void __init s5pv210_map_io(void) void __init s5pv210_init_clocks(int xtal) { -#ifdef CONFIG_S5P_CLOCK - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5pv210_register_clocks(); - s5pv210_setup_clocks(); -#else xusbxti_f = xtal; -#endif } void __init s5pv210_init_irq(void) diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h index a2e85cb9b471..083ffe7b5079 100644 --- a/arch/arm/mach-s5pv210/common.h +++ b/arch/arm/mach-s5pv210/common.h @@ -14,14 +14,8 @@ #include -#ifdef CONFIG_COMMON_CLK_S5PV210 void s5pv210_clk_init(unsigned long xxti_f, unsigned long xusbxti_f, void __iomem *reg_base); -#else -static inline void s5pv210_clk_init(unsigned long xxti_f, - unsigned long xusbxti_f, - void __iomem *reg_base) {} -#endif void s5pv210_init_io(struct map_desc *mach_desc, int size); void s5pv210_init_irq(void); diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 0fc71beab779..315926f0b5d3 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -46,7 +46,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 1bde3a37060b..6816ccdfd86c 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -47,7 +47,6 @@ #include #include #include -#include #include "common.h" diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 3cf3f9c8ddd1..dd5bfec16b4f 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -26,55 +26,7 @@ #include static struct sleep_save s5pv210_core_save[] = { - /* Clock source */ - SAVE_ITEM(S5P_CLK_SRC0), - SAVE_ITEM(S5P_CLK_SRC1), - SAVE_ITEM(S5P_CLK_SRC2), - SAVE_ITEM(S5P_CLK_SRC3), - SAVE_ITEM(S5P_CLK_SRC4), - SAVE_ITEM(S5P_CLK_SRC5), - SAVE_ITEM(S5P_CLK_SRC6), - - /* Clock source Mask */ - SAVE_ITEM(S5P_CLK_SRC_MASK0), - SAVE_ITEM(S5P_CLK_SRC_MASK1), - - /* Clock Divider */ - SAVE_ITEM(S5P_CLK_DIV0), - SAVE_ITEM(S5P_CLK_DIV1), - SAVE_ITEM(S5P_CLK_DIV2), - SAVE_ITEM(S5P_CLK_DIV3), - SAVE_ITEM(S5P_CLK_DIV4), - SAVE_ITEM(S5P_CLK_DIV5), - SAVE_ITEM(S5P_CLK_DIV6), - SAVE_ITEM(S5P_CLK_DIV7), - - /* Clock Main Gate */ - SAVE_ITEM(S5P_CLKGATE_MAIN0), - SAVE_ITEM(S5P_CLKGATE_MAIN1), - SAVE_ITEM(S5P_CLKGATE_MAIN2), - - /* Clock source Peri Gate */ - SAVE_ITEM(S5P_CLKGATE_PERI0), - SAVE_ITEM(S5P_CLKGATE_PERI1), - - /* Clock source SCLK Gate */ - SAVE_ITEM(S5P_CLKGATE_SCLK0), - SAVE_ITEM(S5P_CLKGATE_SCLK1), - - /* Clock IP Clock gate */ - SAVE_ITEM(S5P_CLKGATE_IP0), - SAVE_ITEM(S5P_CLKGATE_IP1), - SAVE_ITEM(S5P_CLKGATE_IP2), - SAVE_ITEM(S5P_CLKGATE_IP3), - SAVE_ITEM(S5P_CLKGATE_IP4), - - /* Clock Blcok and Bus gate */ - SAVE_ITEM(S5P_CLKGATE_BLOCK), - SAVE_ITEM(S5P_CLKGATE_BUS0), - /* Clock ETC */ - SAVE_ITEM(S5P_CLK_OUT), SAVE_ITEM(S5P_MDNIE_SEL), }; diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 42f5d5bde627..f8185b542218 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -23,7 +23,6 @@ config PLAT_S5P select PLAT_SAMSUNG select S3C_GPIO_TRACK select S5P_GPIO_DRVSTR - select SAMSUNG_CLKSRC if !COMMON_CLK help Base platform code for Samsung's S5P series SoC. @@ -65,23 +64,6 @@ config SAMSUNG_ATAGS if SAMSUNG_ATAGS -# clock options - -config SAMSUNG_CLOCK - bool - default y if !COMMON_CLK - -config SAMSUNG_CLKSRC - bool - help - Select the clock code for the clksrc implementation - used by newer systems such as the S3C64XX. - -config S5P_CLOCK - bool - help - Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs - # options for IRQ support config S5P_IRQ diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 5e5beaa9ae15..906f54b11225 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -16,11 +16,6 @@ obj- := obj-y += init.o cpu.o -obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o - -obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o -obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o - obj-$(CONFIG_S5P_IRQ) += s5p-irq.o obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c deleted file mode 100644 index 786a4107a157..000000000000 --- a/arch/arm/plat-samsung/clock-clksrc.c +++ /dev/null @@ -1,212 +0,0 @@ -/* linux/arch/arm/plat-samsung/clock-clksrc.c - * - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -static inline struct clksrc_clk *to_clksrc(struct clk *clk) -{ - return container_of(clk, struct clksrc_clk, clk); -} - -static inline u32 bit_mask(u32 shift, u32 nr_bits) -{ - u32 mask = 0xffffffff >> (32 - nr_bits); - - return mask << shift; -} - -static unsigned long s3c_getrate_clksrc(struct clk *clk) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long rate = clk_get_rate(clk->parent); - u32 clkdiv = __raw_readl(sclk->reg_div.reg); - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - - clkdiv &= mask; - clkdiv >>= sclk->reg_div.shift; - clkdiv++; - - rate /= clkdiv; - return rate; -} - -static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - void __iomem *reg = sclk->reg_div.reg; - unsigned int div; - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - u32 val; - - rate = clk_round_rate(clk, rate); - div = clk_get_rate(clk->parent) / rate; - if (div > (1 << sclk->reg_div.size)) - return -EINVAL; - - val = __raw_readl(reg); - val &= ~mask; - val |= (div - 1) << sclk->reg_div.shift; - __raw_writel(val, reg); - - return 0; -} - -static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - struct clksrc_sources *srcs = sclk->sources; - u32 clksrc = __raw_readl(sclk->reg_src.reg); - u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size); - int src_nr = -1; - int ptr; - - for (ptr = 0; ptr < srcs->nr_sources; ptr++) - if (srcs->sources[ptr] == parent) { - src_nr = ptr; - break; - } - - if (src_nr >= 0) { - clk->parent = parent; - - clksrc &= ~mask; - clksrc |= src_nr << sclk->reg_src.shift; - - __raw_writel(clksrc, sclk->reg_src.reg); - return 0; - } - - return -EINVAL; -} - -static unsigned long s3c_roundrate_clksrc(struct clk *clk, - unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long parent_rate = clk_get_rate(clk->parent); - int max_div = 1 << sclk->reg_div.size; - int div; - - if (rate >= parent_rate) - rate = parent_rate; - else { - div = parent_rate / rate; - if (parent_rate % rate) - div++; - - if (div == 0) - div = 1; - if (div > max_div) - div = max_div; - - rate = parent_rate / div; - } - - return rate; -} - -/* Clock initialisation code */ - -void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce) -{ - struct clksrc_sources *srcs = clk->sources; - u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size); - u32 clksrc; - - if (!clk->reg_src.reg) { - if (!clk->clk.parent) - printk(KERN_ERR "%s: no parent clock specified\n", - clk->clk.name); - return; - } - - clksrc = __raw_readl(clk->reg_src.reg); - clksrc &= mask; - clksrc >>= clk->reg_src.shift; - - if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) { - printk(KERN_ERR "%s: bad source %d\n", - clk->clk.name, clksrc); - return; - } - - clk->clk.parent = srcs->sources[clksrc]; - - if (announce) - printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n", - clk->clk.name, clk->clk.parent->name, clksrc, - clk_get_rate(&clk->clk)); -} - -static struct clk_ops clksrc_ops = { - .set_parent = s3c_setparent_clksrc, - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -static struct clk_ops clksrc_ops_nodiv = { - .set_parent = s3c_setparent_clksrc, -}; - -static struct clk_ops clksrc_ops_nosrc = { - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size) -{ - int ret; - - for (; size > 0; size--, clksrc++) { - if (!clksrc->reg_div.reg && !clksrc->reg_src.reg) - printk(KERN_ERR "%s: clock %s has no registers set\n", - __func__, clksrc->clk.name); - - /* fill in the default functions */ - - if (!clksrc->clk.ops) { - if (!clksrc->reg_div.reg) - clksrc->clk.ops = &clksrc_ops_nodiv; - else if (!clksrc->reg_src.reg) - clksrc->clk.ops = &clksrc_ops_nosrc; - else - clksrc->clk.ops = &clksrc_ops; - } - - /* setup the clocksource, but do not announce it - * as it may be re-set by the setup routines - * called after the rest of the clocks have been - * registered - */ - s3c_set_clksrc(clksrc, false); - - ret = s3c24xx_register_clock(&clksrc->clk); - - if (ret < 0) { - printk(KERN_ERR "%s: failed to register %s (%d)\n", - __func__, clksrc->clk.name, ret); - } - } -} diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c deleted file mode 100644 index d103ac1a52af..000000000000 --- a/arch/arm/plat-samsung/clock.c +++ /dev/null @@ -1,539 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/clock.c - * - * Copyright 2004-2005 Simtec Electronics - * Ben Dooks - * - * S3C24XX Core clock control support - * - * Based on, and code from linux/arch/arm/mach-versatile/clock.c - ** - ** Copyright (C) 2004 ARM Limited. - ** Written by Deep Blue Solutions Limited. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_DEBUG_FS) -#include -#endif - -#include - -#include - -#include -#include - -#include -#include /* for s3c24xx_uart_devs */ - -/* clock information */ - -static LIST_HEAD(clocks); - -/* We originally used an mutex here, but some contexts (see resume) - * are calling functions such as clk_set_parent() with IRQs disabled - * causing an BUG to be triggered. - */ -DEFINE_SPINLOCK(clocks_lock); - -/* Global watchdog clock used by arch_wtd_reset() callback */ -struct clk *s3c2410_wdtclk; -static int __init s3c_wdt_reset_init(void) -{ - s3c2410_wdtclk = clk_get(NULL, "watchdog"); - if (IS_ERR(s3c2410_wdtclk)) - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); - return 0; -} -arch_initcall(s3c_wdt_reset_init); - -/* enable and disable calls for use with the clk struct */ - -static int clk_null_enable(struct clk *clk, int enable) -{ - return 0; -} - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return -EINVAL; - - clk_enable(clk->parent); - - spin_lock_irqsave(&clocks_lock, flags); - - if ((clk->usage++) == 0) - (clk->enable)(clk, 1); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return; - - spin_lock_irqsave(&clocks_lock, flags); - - if ((--clk->usage) == 0) - (clk->enable)(clk, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - clk_disable(clk->parent); -} - - -unsigned long clk_get_rate(struct clk *clk) -{ - if (IS_ERR_OR_NULL(clk)) - return 0; - - if (clk->rate != 0) - return clk->rate; - - if (clk->ops != NULL && clk->ops->get_rate != NULL) - return (clk->ops->get_rate)(clk); - - if (clk->parent != NULL) - return clk_get_rate(clk->parent); - - return clk->rate; -} - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (!IS_ERR_OR_NULL(clk) && clk->ops && clk->ops->round_rate) - return (clk->ops->round_rate)(clk, rate); - - return rate; -} - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret; - - if (IS_ERR_OR_NULL(clk)) - return -EINVAL; - - /* We do not default just do a clk->rate = rate as - * the clock may have been made this way by choice. - */ - - WARN_ON(clk->ops == NULL); - WARN_ON(clk->ops && clk->ops->set_rate == NULL); - - if (clk->ops == NULL || clk->ops->set_rate == NULL) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - ret = (clk->ops->set_rate)(clk, rate); - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -struct clk *clk_get_parent(struct clk *clk) -{ - return clk->parent; -} - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - int ret = 0; - - if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent)) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - - if (clk->ops && clk->ops->set_parent) - ret = (clk->ops->set_parent)(clk, parent); - - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -EXPORT_SYMBOL(clk_enable); -EXPORT_SYMBOL(clk_disable); -EXPORT_SYMBOL(clk_get_rate); -EXPORT_SYMBOL(clk_round_rate); -EXPORT_SYMBOL(clk_set_rate); -EXPORT_SYMBOL(clk_get_parent); -EXPORT_SYMBOL(clk_set_parent); - -/* base clocks */ - -int clk_default_setrate(struct clk *clk, unsigned long rate) -{ - clk->rate = rate; - return 0; -} - -struct clk_ops clk_ops_def_setrate = { - .set_rate = clk_default_setrate, -}; - -struct clk clk_xtal = { - .name = "xtal", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_ext = { - .name = "ext", -}; - -struct clk clk_epll = { - .name = "epll", -}; - -struct clk clk_mpll = { - .name = "mpll", - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_upll = { - .name = "upll", - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_f = { - .name = "fclk", - .rate = 0, - .parent = &clk_mpll, - .ctrlbit = 0, -}; - -struct clk clk_h = { - .name = "hclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_p = { - .name = "pclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_usb_bus = { - .name = "usb-bus", - .rate = 0, - .parent = &clk_upll, -}; - - -struct clk s3c24xx_uclk = { - .name = "uclk", -}; - -/* initialise the clock system */ - -/** - * s3c24xx_register_clock() - register a clock - * @clk: The clock to register - * - * Add the specified clock to the list of clocks known by the system. - */ -int s3c24xx_register_clock(struct clk *clk) -{ - if (clk->enable == NULL) - clk->enable = clk_null_enable; - - /* fill up the clk_lookup structure and register it*/ - clk->lookup.dev_id = clk->devname; - clk->lookup.con_id = clk->name; - clk->lookup.clk = clk; - clkdev_add(&clk->lookup); - - return 0; -} - -/** - * s3c24xx_register_clocks() - register an array of clock pointers - * @clks: Pointer to an array of struct clk pointers - * @nr_clks: The number of clocks in the @clks array. - * - * Call s3c24xx_register_clock() for all the clock pointers contained - * in the @clks list. Returns the number of failures. - */ -int s3c24xx_register_clocks(struct clk **clks, int nr_clks) -{ - int fails = 0; - - for (; nr_clks > 0; nr_clks--, clks++) { - if (s3c24xx_register_clock(*clks) < 0) { - struct clk *clk = *clks; - printk(KERN_ERR "%s: failed to register %p: %s\n", - __func__, clk, clk->name); - fails++; - } - } - - return fails; -} - -/** - * s3c_register_clocks() - register an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * Call s3c24xx_register_clock() on the @clkp array given, printing an - * error if it fails to register the clock (unlikely). - */ -void __init s3c_register_clocks(struct clk *clkp, int nr_clks) -{ - int ret; - - for (; nr_clks > 0; nr_clks--, clkp++) { - ret = s3c24xx_register_clock(clkp); - - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } -} - -/** - * s3c_disable_clocks() - disable an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * for internal use only at initialisation time. disable the clocks in the - * @clkp array. - */ - -void __init s3c_disable_clocks(struct clk *clkp, int nr_clks) -{ - for (; nr_clks > 0; nr_clks--, clkp++) - (clkp->enable)(clkp, 0); -} - -/* initialise all the clocks */ - -int __init s3c24xx_register_baseclocks(unsigned long xtal) -{ - printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n"); - - clk_xtal.rate = xtal; - - /* register our clocks */ - - if (s3c24xx_register_clock(&clk_xtal) < 0) - printk(KERN_ERR "failed to register master xtal\n"); - - if (s3c24xx_register_clock(&clk_mpll) < 0) - printk(KERN_ERR "failed to register mpll clock\n"); - - if (s3c24xx_register_clock(&clk_upll) < 0) - printk(KERN_ERR "failed to register upll clock\n"); - - if (s3c24xx_register_clock(&clk_f) < 0) - printk(KERN_ERR "failed to register cpu fclk\n"); - - if (s3c24xx_register_clock(&clk_h) < 0) - printk(KERN_ERR "failed to register cpu hclk\n"); - - if (s3c24xx_register_clock(&clk_p) < 0) - printk(KERN_ERR "failed to register cpu pclk\n"); - - return 0; -} - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* debugfs support to trace clock tree hierarchy and attributes */ - -static struct dentry *clk_debugfs_root; - -static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) -{ - struct clk *child; - const char *state; - char buf[255] = { 0 }; - int n = 0; - - if (c->name) - n = snprintf(buf, sizeof(buf) - 1, "%s", c->name); - - if (c->devname) - n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname); - - state = (c->usage > 0) ? "on" : "off"; - - seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n", - level * 3 + 1, "", - 50 - level * 3, buf, - state, c->usage, clk_get_rate(c)); - - list_for_each_entry(child, &clocks, list) { - if (child->parent != c) - continue; - - clock_tree_show_one(s, child, level + 1); - } -} - -static int clock_tree_show(struct seq_file *s, void *data) -{ - struct clk *c; - unsigned long flags; - - seq_printf(s, " clock state ref rate\n"); - seq_printf(s, "----------------------------------------------------\n"); - - spin_lock_irqsave(&clocks_lock, flags); - - list_for_each_entry(c, &clocks, list) - if (c->parent == NULL) - clock_tree_show_one(s, c, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -static int clock_tree_open(struct inode *inode, struct file *file) -{ - return single_open(file, clock_tree_show, inode->i_private); -} - -static const struct file_operations clock_tree_fops = { - .open = clock_tree_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int clock_rate_show(void *data, u64 *val) -{ - struct clk *c = data; - *val = clk_get_rate(c); - return 0; -} -DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_rate_show, NULL, "%llu\n"); - -static int clk_debugfs_register_one(struct clk *c) -{ - int err; - struct dentry *d; - struct clk *pa = c->parent; - char s[255]; - char *p = s; - - p += sprintf(p, "%s", c->devname); - - d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); - if (!d) - return -ENOMEM; - - c->dent = d; - - d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage); - if (!d) { - err = -ENOMEM; - goto err_out; - } - - d = debugfs_create_file("rate", S_IRUGO, c->dent, c, &clock_rate_fops); - if (!d) { - err = -ENOMEM; - goto err_out; - } - return 0; - -err_out: - debugfs_remove_recursive(c->dent); - return err; -} - -static int clk_debugfs_register(struct clk *c) -{ - int err; - struct clk *pa = c->parent; - - if (pa && !pa->dent) { - err = clk_debugfs_register(pa); - if (err) - return err; - } - - if (!c->dent) { - err = clk_debugfs_register_one(c); - if (err) - return err; - } - return 0; -} - -static int __init clk_debugfs_init(void) -{ - struct clk *c; - struct dentry *d; - int err = -ENOMEM; - - d = debugfs_create_dir("clock", NULL); - if (!d) - return -ENOMEM; - clk_debugfs_root = d; - - d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL, - &clock_tree_fops); - if (!d) - goto err_out; - - list_for_each_entry(c, &clocks, list) { - err = clk_debugfs_register(c); - if (err) - goto err_out; - } - return 0; - -err_out: - debugfs_remove_recursive(clk_debugfs_root); - return err; -} -late_initcall(clk_debugfs_init); - -#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h deleted file mode 100644 index 50a8ca7c3760..000000000000 --- a/arch/arm/plat-samsung/include/plat/clock-clksrc.h +++ /dev/null @@ -1,83 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h - * - * Parts taken from arch/arm/plat-s3c64xx/clock.c - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Copyright 2009 Ben Dooks - * Copyright 2009 Harald Welte - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/** - * struct clksrc_sources - list of sources for a given clock - * @sources: array of pointers to clocks - * @nr_sources: The size of @sources - */ -struct clksrc_sources { - unsigned int nr_sources; - struct clk **sources; -}; - -/** - * struct clksrc_reg - register definition for clock control bits - * @reg: pointer to the register in virtual memory. - * @shift: the shift in bits to where the bitfield is. - * @size: the size in bits of the bitfield. - * - * This specifies the size and position of the bits we are interested - * in within the register specified by @reg. - */ -struct clksrc_reg { - void __iomem *reg; - unsigned short shift; - unsigned short size; -}; - -/** - * struct clksrc_clk - class of clock for newer style samsung devices. - * @clk: the standard clock representation - * @sources: the sources for this clock - * @reg_src: the register definition for selecting the clock's source - * @reg_div: the register definition for the clock's output divisor - * - * This clock implements the features required by the newer SoCs where - * the standard clock block provides an input mux and a post-mux divisor - * to provide the periperhal's clock. - * - * The array of @sources provides the mapping of mux position to the - * clock, and @reg_src shows the code where to modify to change the mux - * position. The @reg_div defines how to change the divider settings on - * the output. - */ -struct clksrc_clk { - struct clk clk; - struct clksrc_sources *sources; - - struct clksrc_reg reg_src; - struct clksrc_reg reg_div; -}; - -/** - * s3c_set_clksrc() - setup the clock from the register settings - * @clk: The clock to setup. - * @announce: true to announce the setting to printk(). - * - * Setup the clock from the current register settings, for when the - * kernel boots or if it is resuming from a possibly unknown state. - */ -extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce); - -/** - * s3c_register_clksrc() register clocks from an array of clksrc clocks - * @srcs: The array of clocks to register - * @size: The size of the @srcs array. - * - * Initialise and register the array of clocks described by @srcs. - */ -extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size); diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h deleted file mode 100644 index 63239f409807..000000000000 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ /dev/null @@ -1,152 +0,0 @@ -/* linux/arch/arm/plat-s3c/include/plat/clock.h - * - * Copyright (c) 2004-2005 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * Written by Ben Dooks, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_CLOCK_H -#define __ASM_PLAT_CLOCK_H __FILE__ - -#include -#include - -struct clk; - -/** - * struct clk_ops - standard clock operations - * @set_rate: set the clock rate, see clk_set_rate(). - * @get_rate: get the clock rate, see clk_get_rate(). - * @round_rate: round a given clock rate, see clk_round_rate(). - * @set_parent: set the clock's parent, see clk_set_parent(). - * - * Group the common clock implementations together so that we - * don't have to keep setting the same fields again. We leave - * enable in struct clk. - * - * Adding an extra layer of indirection into the process should - * not be a problem as it is unlikely these operations are going - * to need to be called quickly. - */ -struct clk_ops { - int (*set_rate)(struct clk *c, unsigned long rate); - unsigned long (*get_rate)(struct clk *c); - unsigned long (*round_rate)(struct clk *c, unsigned long rate); - int (*set_parent)(struct clk *c, struct clk *parent); -}; - -struct clk { - struct list_head list; - struct module *owner; - struct clk *parent; - const char *name; - const char *devname; - int id; - int usage; - unsigned long rate; - unsigned long ctrlbit; - - struct clk_ops *ops; - int (*enable)(struct clk *, int enable); - struct clk_lookup lookup; -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif -}; - -/* other clocks which may be registered by board support */ - -extern struct clk s3c24xx_dclk0; -extern struct clk s3c24xx_dclk1; -extern struct clk s3c24xx_clkout0; -extern struct clk s3c24xx_clkout1; -extern struct clk s3c24xx_uclk; - -extern struct clk clk_usb_bus; - -/* core clock support */ - -extern struct clk clk_f; -extern struct clk clk_h; -extern struct clk clk_p; -extern struct clk clk_mpll; -extern struct clk clk_upll; -extern struct clk clk_epll; -extern struct clk clk_xtal; -extern struct clk clk_ext; - -/* S3C2443/S3C2416 specific clocks */ -extern struct clksrc_clk clk_epllref; -extern struct clksrc_clk clk_esysclk; - -/* S3C24XX UART clocks */ -extern struct clk s3c24xx_clk_uart0; -extern struct clk s3c24xx_clk_uart1; -extern struct clk s3c24xx_clk_uart2; - -/* S3C64XX specific clocks */ -extern struct clk clk_h2; -extern struct clk clk_27m; -extern struct clk clk_48m; -extern struct clk clk_xusbxti; - -extern int clk_default_setrate(struct clk *clk, unsigned long rate); -extern struct clk_ops clk_ops_def_setrate; - -/* exports for arch/arm/mach-s3c2410 - * - * Please DO NOT use these outside of arch/arm/mach-s3c2410 -*/ - -extern spinlock_t clocks_lock; - -extern int s3c2410_clkcon_enable(struct clk *clk, int enable); - -extern int s3c24xx_register_clock(struct clk *clk); -extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); - -extern void s3c_register_clocks(struct clk *clk, int nr_clks); -extern void s3c_disable_clocks(struct clk *clkp, int nr_clks); - -extern int s3c24xx_register_baseclocks(unsigned long xtal); - -extern void s5p_register_clocks(unsigned long xtal_freq); - -extern void s3c24xx_setup_clocks(unsigned long fclk, - unsigned long hclk, - unsigned long pclk); - -extern void s3c2410_setup_clocks(void); -extern void s3c2412_setup_clocks(void); -extern void s3c244x_setup_clocks(void); - -/* S3C2410 specific clock functions */ - -extern int s3c2410_baseclk_add(void); - -/* S3C2443/S3C2416 specific clock functions */ - -typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); - -extern void s3c2443_common_setup_clocks(pll_fn get_mpll); -extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, - unsigned int *divs, int nr_divs, - int divmask); - -extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); -extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); -extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); - -/* S3C64XX specific functions and clocks */ - -extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); - -/* Global watchdog clock used by arch_wtd_reset() callback */ - -extern struct clk *s3c2410_wdtclk; - -#endif /* __ASM_PLAT_CLOCK_H */ diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index 72d4178ad23b..317c52303288 100644 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h @@ -140,7 +140,6 @@ struct s3c_cpufreq_config { * any frequency changes. This is really only need by devices like the * S3C2410 where there is no or limited divider between the PLL and the * ARMCLK. - * @resume_clocks: Update the clocks on resume. * @get_iotiming: Get the current IO timing data, mainly for use at start. * @set_iotiming: Update the IO timings from the cached copies calculated * from the @calc_iotiming entry when changing the frequency. @@ -169,8 +168,6 @@ struct s3c_cpufreq_info { /* driver routines */ - void (*resume_clocks)(void); - int (*get_iotiming)(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); diff --git a/arch/arm/plat-samsung/include/plat/pll.h b/arch/arm/plat-samsung/include/plat/pll.h deleted file mode 100644 index 357af7c1c664..000000000000 --- a/arch/arm/plat-samsung/include/plat/pll.h +++ /dev/null @@ -1,323 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/pll.h - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Samsung PLL codes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - -#define S3C24XX_PLL_MDIV_MASK (0xFF) -#define S3C24XX_PLL_PDIV_MASK (0x1F) -#define S3C24XX_PLL_SDIV_MASK (0x3) -#define S3C24XX_PLL_MDIV_SHIFT (12) -#define S3C24XX_PLL_PDIV_SHIFT (4) -#define S3C24XX_PLL_SDIV_SHIFT (0) - -static inline unsigned int s3c24xx_get_pll(unsigned int pllval, - unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = (pllval >> S3C24XX_PLL_MDIV_SHIFT) & S3C24XX_PLL_MDIV_MASK; - pdiv = (pllval >> S3C24XX_PLL_PDIV_SHIFT) & S3C24XX_PLL_PDIV_MASK; - sdiv = (pllval >> S3C24XX_PLL_SDIV_SHIFT) & S3C24XX_PLL_SDIV_MASK; - - fvco = (uint64_t)baseclk * (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -#define S3C2416_PLL_MDIV_MASK (0x3FF) -#define S3C2416_PLL_PDIV_MASK (0x3F) -#define S3C2416_PLL_SDIV_MASK (0x7) -#define S3C2416_PLL_MDIV_SHIFT (14) -#define S3C2416_PLL_PDIV_SHIFT (5) -#define S3C2416_PLL_SDIV_SHIFT (0) - -static inline unsigned int s3c2416_get_pll(unsigned int pllval, - unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = (pllval >> S3C2416_PLL_MDIV_SHIFT) & S3C2416_PLL_MDIV_MASK; - pdiv = (pllval >> S3C2416_PLL_PDIV_SHIFT) & S3C2416_PLL_PDIV_MASK; - sdiv = (pllval >> S3C2416_PLL_SDIV_SHIFT) & S3C2416_PLL_SDIV_MASK; - - fvco = (uint64_t)baseclk * mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned int)fvco; -} - -#define S3C6400_PLL_MDIV_MASK (0x3FF) -#define S3C6400_PLL_PDIV_MASK (0x3F) -#define S3C6400_PLL_SDIV_MASK (0x7) -#define S3C6400_PLL_MDIV_SHIFT (16) -#define S3C6400_PLL_PDIV_SHIFT (8) -#define S3C6400_PLL_SDIV_SHIFT (0) - -static inline unsigned long s3c6400_get_pll(unsigned long baseclk, - u32 pllcon) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; - pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; - sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -#define PLL6553X_MDIV_MASK (0x7F) -#define PLL6553X_PDIV_MASK (0x1F) -#define PLL6553X_SDIV_MASK (0x3) -#define PLL6553X_KDIV_MASK (0xFFFF) -#define PLL6553X_MDIV_SHIFT (16) -#define PLL6553X_PDIV_SHIFT (8) -#define PLL6553X_SDIV_SHIFT (0) - -static inline unsigned long s3c_get_pll6553x(unsigned long baseclk, - u32 pll_con0, u32 pll_con1) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK; - pdiv = (pll_con0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK; - sdiv = (pll_con0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK; - kdiv = pll_con1 & PLL6553X_KDIV_MASK; - - /* - * We need to multiple baseclk by mdiv (the integer part) and kdiv - * which is in 2^16ths, so shift mdiv up (does not overflow) and - * add kdiv before multiplying. The use of tmp is to avoid any - * overflows before shifting bac down into result when multipling - * by the mdiv and kdiv pair. - */ - - tmp = baseclk; - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL35XX_MDIV_MASK (0x3FF) -#define PLL35XX_PDIV_MASK (0x3F) -#define PLL35XX_SDIV_MASK (0x7) -#define PLL35XX_MDIV_SHIFT (16) -#define PLL35XX_PDIV_SHIFT (8) -#define PLL35XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK; - pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; - sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -#define PLL36XX_KDIV_MASK (0xFFFF) -#define PLL36XX_MDIV_MASK (0x1FF) -#define PLL36XX_PDIV_MASK (0x3F) -#define PLL36XX_SDIV_MASK (0x7) -#define PLL36XX_MDIV_SHIFT (16) -#define PLL36XX_PDIV_SHIFT (8) -#define PLL36XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll36xx(unsigned long baseclk, - u32 pll_con0, u32 pll_con1) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; - pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; - sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK; - kdiv = pll_con1 & PLL36XX_KDIV_MASK; - - tmp = baseclk; - - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL45XX_MDIV_MASK (0x3FF) -#define PLL45XX_PDIV_MASK (0x3F) -#define PLL45XX_SDIV_MASK (0x7) -#define PLL45XX_MDIV_SHIFT (16) -#define PLL45XX_PDIV_SHIFT (8) -#define PLL45XX_SDIV_SHIFT (0) - -enum pll45xx_type_t { - pll_4500, - pll_4502, - pll_4508 -}; - -static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, - enum pll45xx_type_t pll_type) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK; - pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK; - sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK; - - if (pll_type == pll_4508) - sdiv = sdiv - 1; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -/* CON0 bit-fields */ -#define PLL46XX_MDIV_MASK (0x1FF) -#define PLL46XX_PDIV_MASK (0x3F) -#define PLL46XX_SDIV_MASK (0x7) -#define PLL46XX_LOCKED_SHIFT (29) -#define PLL46XX_MDIV_SHIFT (16) -#define PLL46XX_PDIV_SHIFT (8) -#define PLL46XX_SDIV_SHIFT (0) - -/* CON1 bit-fields */ -#define PLL46XX_MRR_MASK (0x1F) -#define PLL46XX_MFR_MASK (0x3F) -#define PLL46XX_KDIV_MASK (0xFFFF) -#define PLL4650C_KDIV_MASK (0xFFF) -#define PLL46XX_MRR_SHIFT (24) -#define PLL46XX_MFR_SHIFT (16) -#define PLL46XX_KDIV_SHIFT (0) - -enum pll46xx_type_t { - pll_4600, - pll_4650, - pll_4650c, -}; - -static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, - u32 pll_con0, u32 pll_con1, - enum pll46xx_type_t pll_type) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; - pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; - sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; - kdiv = pll_con1 & PLL46XX_KDIV_MASK; - - if (pll_type == pll_4650c) - kdiv = pll_con1 & PLL4650C_KDIV_MASK; - else - kdiv = pll_con1 & PLL46XX_KDIV_MASK; - - tmp = baseclk; - - if (pll_type == pll_4600) { - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - } else { - tmp *= (mdiv << 10) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 10; - } - - return result; -} - -#define PLL90XX_MDIV_MASK (0xFF) -#define PLL90XX_PDIV_MASK (0x3F) -#define PLL90XX_SDIV_MASK (0x7) -#define PLL90XX_KDIV_MASK (0xffff) -#define PLL90XX_LOCKED_SHIFT (29) -#define PLL90XX_MDIV_SHIFT (16) -#define PLL90XX_PDIV_SHIFT (8) -#define PLL90XX_SDIV_SHIFT (0) -#define PLL90XX_KDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll90xx(unsigned long baseclk, - u32 pll_con, u32 pll_conk) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK; - pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK; - sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK; - kdiv = pll_conk & PLL90XX_KDIV_MASK; - - /* - * We need to multiple baseclk by mdiv (the integer part) and kdiv - * which is in 2^16ths, so shift mdiv up (does not overflow) and - * add kdiv before multiplying. The use of tmp is to avoid any - * overflows before shifting bac down into result when multipling - * by the mdiv and kdiv pair. - */ - - tmp = baseclk; - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL65XX_MDIV_MASK (0x3FF) -#define PLL65XX_PDIV_MASK (0x3F) -#define PLL65XX_SDIV_MASK (0x7) -#define PLL65XX_MDIV_SHIFT (16) -#define PLL65XX_PDIV_SHIFT (8) -#define PLL65XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK; - pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK; - sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h deleted file mode 100644 index acacc4b88a39..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5p-clock.h +++ /dev/null @@ -1,65 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_CLOCK_H -#define __ASM_PLAT_S5P_CLOCK_H __FILE__ - -#include - -#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) - -#define clk_fin_apll clk_ext_xtal_mux -#define clk_fin_bpll clk_ext_xtal_mux -#define clk_fin_cpll clk_ext_xtal_mux -#define clk_fin_mpll clk_ext_xtal_mux -#define clk_fin_epll clk_ext_xtal_mux -#define clk_fin_dpll clk_ext_xtal_mux -#define clk_fin_vpll clk_ext_xtal_mux -#define clk_fin_hpll clk_ext_xtal_mux - -extern struct clk clk_ext_xtal_mux; -extern struct clk clk_xusbxti; -extern struct clk clk_48m; -extern struct clk s5p_clk_27m; -extern struct clk clk_fout_apll; -extern struct clk clk_fout_bpll; -extern struct clk clk_fout_bpll_div2; -extern struct clk clk_fout_cpll; -extern struct clk clk_fout_mpll; -extern struct clk clk_fout_mpll_div2; -extern struct clk clk_fout_epll; -extern struct clk clk_fout_dpll; -extern struct clk clk_fout_vpll; -extern struct clk clk_arm; -extern struct clk clk_vpll; - -extern struct clksrc_sources clk_src_apll; -extern struct clksrc_sources clk_src_bpll; -extern struct clksrc_sources clk_src_bpll_fout; -extern struct clksrc_sources clk_src_cpll; -extern struct clksrc_sources clk_src_mpll; -extern struct clksrc_sources clk_src_mpll_fout; -extern struct clksrc_sources clk_src_epll; -extern struct clksrc_sources clk_src_dpll; - -extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); - -/* Common EPLL operations for S5P platform */ -extern int s5p_epll_enable(struct clk *clk, int enable); -extern unsigned long s5p_epll_get_rate(struct clk *clk); - -/* SPDIF clk operations common for S5PV210/C110 and Exynos4 */ -extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long s5p_spdif_get_rate(struct clk *clk); - -extern struct clk_ops s5p_sclk_spdif_ops; -#endif /* __ASM_PLAT_S5P_CLOCK_H */ diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c index a1f925f3121f..11fbbc26e49f 100644 --- a/arch/arm/plat-samsung/init.c +++ b/arch/arm/plat-samsung/init.c @@ -30,7 +30,6 @@ #include #include -#include static struct cpu_table *cpu; diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c deleted file mode 100644 index 48a159911037..000000000000 --- a/arch/arm/plat-samsung/s5p-clock.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * Copyright 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P - Common clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call - * clk_ext_xtal_mux. -*/ -struct clk clk_ext_xtal_mux = { - .name = "ext_xtal", - .id = -1, -}; - -struct clk clk_xusbxti = { - .name = "xusbxti", - .id = -1, - .rate = 24000000, -}; - -struct clk s5p_clk_27m = { - .name = "clk_27m", - .id = -1, - .rate = 27000000, -}; - -/* 48MHz USB Phy clock output */ -struct clk clk_48m = { - .name = "clk_48m", - .id = -1, - .rate = 48000000, -}; - -/* APLL clock output - * No need .ctrlbit, this is always on -*/ -struct clk clk_fout_apll = { - .name = "fout_apll", - .id = -1, -}; - -/* BPLL clock output */ - -struct clk clk_fout_bpll = { - .name = "fout_bpll", - .id = -1, -}; - -struct clk clk_fout_bpll_div2 = { - .name = "fout_bpll_div2", - .id = -1, -}; - -/* CPLL clock output */ - -struct clk clk_fout_cpll = { - .name = "fout_cpll", - .id = -1, -}; - -/* MPLL clock output - * No need .ctrlbit, this is always on -*/ -struct clk clk_fout_mpll = { - .name = "fout_mpll", - .id = -1, -}; - -struct clk clk_fout_mpll_div2 = { - .name = "fout_mpll_div2", - .id = -1, -}; - -/* EPLL clock output */ -struct clk clk_fout_epll = { - .name = "fout_epll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* DPLL clock output */ -struct clk clk_fout_dpll = { - .name = "fout_dpll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* VPLL clock output */ -struct clk clk_fout_vpll = { - .name = "fout_vpll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* Possible clock sources for APLL Mux */ -static struct clk *clk_src_apll_list[] = { - [0] = &clk_fin_apll, - [1] = &clk_fout_apll, -}; - -struct clksrc_sources clk_src_apll = { - .sources = clk_src_apll_list, - .nr_sources = ARRAY_SIZE(clk_src_apll_list), -}; - -/* Possible clock sources for BPLL Mux */ -static struct clk *clk_src_bpll_list[] = { - [0] = &clk_fin_bpll, - [1] = &clk_fout_bpll, -}; - -struct clksrc_sources clk_src_bpll = { - .sources = clk_src_bpll_list, - .nr_sources = ARRAY_SIZE(clk_src_bpll_list), -}; - -static struct clk *clk_src_bpll_fout_list[] = { - [0] = &clk_fout_bpll_div2, - [1] = &clk_fout_bpll, -}; - -struct clksrc_sources clk_src_bpll_fout = { - .sources = clk_src_bpll_fout_list, - .nr_sources = ARRAY_SIZE(clk_src_bpll_fout_list), -}; - -/* Possible clock sources for CPLL Mux */ -static struct clk *clk_src_cpll_list[] = { - [0] = &clk_fin_cpll, - [1] = &clk_fout_cpll, -}; - -struct clksrc_sources clk_src_cpll = { - .sources = clk_src_cpll_list, - .nr_sources = ARRAY_SIZE(clk_src_cpll_list), -}; - -/* Possible clock sources for MPLL Mux */ -static struct clk *clk_src_mpll_list[] = { - [0] = &clk_fin_mpll, - [1] = &clk_fout_mpll, -}; - -struct clksrc_sources clk_src_mpll = { - .sources = clk_src_mpll_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_list), -}; - -static struct clk *clk_src_mpll_fout_list[] = { - [0] = &clk_fout_mpll_div2, - [1] = &clk_fout_mpll, -}; - -struct clksrc_sources clk_src_mpll_fout = { - .sources = clk_src_mpll_fout_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_fout_list), -}; - -/* Possible clock sources for EPLL Mux */ -static struct clk *clk_src_epll_list[] = { - [0] = &clk_fin_epll, - [1] = &clk_fout_epll, -}; - -struct clksrc_sources clk_src_epll = { - .sources = clk_src_epll_list, - .nr_sources = ARRAY_SIZE(clk_src_epll_list), -}; - -/* Possible clock sources for DPLL Mux */ -static struct clk *clk_src_dpll_list[] = { - [0] = &clk_fin_dpll, - [1] = &clk_fout_dpll, -}; - -struct clksrc_sources clk_src_dpll = { - .sources = clk_src_dpll_list, - .nr_sources = ARRAY_SIZE(clk_src_dpll_list), -}; - -struct clk clk_vpll = { - .name = "vpll", - .id = -1, -}; - -int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - u32 con; - - con = __raw_readl(reg); - con = enable ? (con | ctrlbit) : (con & ~ctrlbit); - __raw_writel(con, reg); - return 0; -} - -int s5p_epll_enable(struct clk *clk, int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit; - - if (enable) - __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON); - else - __raw_writel(epll_con, S5P_EPLL_CON); - - return 0; -} - -unsigned long s5p_epll_get_rate(struct clk *clk) -{ - return clk->rate; -} - -int s5p_spdif_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *pclk; - int ret; - - pclk = clk_get_parent(clk); - if (IS_ERR(pclk)) - return -EINVAL; - - ret = pclk->ops->set_rate(pclk, rate); - clk_put(pclk); - - return ret; -} - -unsigned long s5p_spdif_get_rate(struct clk *clk) -{ - struct clk *pclk; - int rate; - - pclk = clk_get_parent(clk); - if (IS_ERR(pclk)) - return -EINVAL; - - rate = pclk->ops->get_rate(pclk); - clk_put(pclk); - - return rate; -} - -struct clk_ops s5p_sclk_spdif_ops = { - .set_rate = s5p_spdif_set_rate, - .get_rate = s5p_spdif_get_rate, -}; - -static struct clk *s5p_clks[] __initdata = { - &clk_ext_xtal_mux, - &clk_48m, - &s5p_clk_27m, - &clk_fout_apll, - &clk_fout_mpll, - &clk_fout_epll, - &clk_fout_dpll, - &clk_fout_vpll, - &clk_vpll, - &clk_xusbxti, -}; - -void __init s5p_register_clocks(unsigned long xtal_freq) -{ - int ret; - - clk_ext_xtal_mux.rate = xtal_freq; - - ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks)); - if (ret > 0) - printk(KERN_ERR "Failed to register s5p clocks\n"); -} -- cgit v1.2.3 From adbd1ad139789ec8a5f8c7ab397d6636d6a3d277 Mon Sep 17 00:00:00 2001 From: Mateusz Krawczuk Date: Sat, 28 Sep 2013 18:25:28 +0200 Subject: ARM: S5PV210: Add board file for boot using Device Tree This patch adds board file that will be used to boot S5PV210/S5PC110-based boards using Device Tree. Signed-off-by: Mateusz Krawczuk Signed-off-by: Kyungmin Park [t.figa: Rebased and cleaned-up a bit.] Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/Kconfig | 14 +++++++++ arch/arm/mach-s5pv210/Makefile | 2 +- arch/arm/mach-s5pv210/s5pv210.c | 68 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-s5pv210/s5pv210.c (limited to 'arch/arm') diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index f60f2862856d..ed492cf10a16 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -194,6 +194,20 @@ config MACH_TORBRECK help Machine support for aESOP Torbreck +config MACH_S5PV210_DT + bool "Samsung S5PV210/S5PC110 machine using Device Tree" + select CLKSRC_OF + select CPU_S5PV210 + select PINCTRL + select PINCTRL_EXYNOS + select USE_OF + help + Machine support for Samsung S5PV210/S5PC110 machines with Device Tree + enabled. + Select this if a fdt blob is available for your S5PV210 SoC based + board. + Note: This is under development and not all peripherals can be + supported with this machine file. endmenu endif diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 08358bbccb88..8d87b10ea461 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_GONI) += mach-goni.o obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o - +obj-$(CONFIG_MACH_S5PV210_DT) += s5pv210.o # device support obj-y += dev-audio.o diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c new file mode 100644 index 000000000000..c244ccb6b236 --- /dev/null +++ b/arch/arm/mach-s5pv210/s5pv210.c @@ -0,0 +1,68 @@ +/* + * Samsung's S5PC110/S5PV210 flattened device tree enabled machine. + * + * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd. + * Mateusz Krawczuk + * Tomasz Figa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include +#include +#include + +#include +#include + +static int __init s5pv210_fdt_map_sys(unsigned long node, const char *uname, + int depth, void *data) +{ + struct map_desc iodesc; + const __be32 *reg; + int len; + + if (!of_flat_dt_is_compatible(node, "samsung,s5pv210-clock")) + return 0; + + reg = of_get_flat_dt_prop(node, "reg", &len); + if (reg == NULL || len != (sizeof(unsigned long) * 2)) + return 0; + + iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); + iodesc.length = be32_to_cpu(reg[1]) - 1; + iodesc.virtual = (unsigned long)S3C_VA_SYS; + iodesc.type = MT_DEVICE; + iotable_init(&iodesc, 1); + + return 1; +} + +static void __init s5pv210_dt_map_io(void) +{ + debug_ll_io_init(); + + of_scan_flat_dt(s5pv210_fdt_map_sys, NULL); +} + +static void s5pv210_dt_restart(enum reboot_mode mode, const char *cmd) +{ + __raw_writel(0x1, S5P_SWRESET); +} + +static char const *s5pv210_dt_compat[] __initconst = { + "samsung,s5pc110", + "samsung,s5pv210", + NULL +}; + +DT_MACHINE_START(S5PV210_DT, "Samsung S5PC110/S5PV210-based board") + .dt_compat = s5pv210_dt_compat, + .map_io = s5pv210_dt_map_io, + .restart = s5pv210_dt_restart, +MACHINE_END -- cgit v1.2.3 From 94ad0f6d9278a4137d863391131a7c7826630297 Mon Sep 17 00:00:00 2001 From: Mateusz Krawczuk Date: Sat, 28 Sep 2013 18:25:29 +0200 Subject: ARM: dts: Add Device tree for s5pv210 SoC Add generic device tree for s5pv210 and s5pv210-pinctrl Signed-off-by: Mateusz Krawczuk Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/s5pv210.dtsi | 633 +++++++++++++++++++++++++ 2 files changed, 1472 insertions(+) create mode 100644 arch/arm/boot/dts/s5pv210-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/s5pv210.dtsi (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi new file mode 100644 index 000000000000..8c714088e3c6 --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi @@ -0,0 +1,839 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&pinctrl0 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb: gpb { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj2: gpj2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj3: gpj3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj4: gpj4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpgi: gpgi { + gpio-controller; + #gpio-cells = <2>; + }; + + mp01: mp01 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp02: mp02 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp03: mp03 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp04: mp04 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp05: mp05 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp06: mp06 { + gpio-controller; + #gpio-cells = <2>; + }; + + mp07: mp07 { + gpio-controller; + #gpio-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + interrupt-controller; + interrupt-parent = <&vic0>; + interrupts = <0>, <1>, <2>, <3>, + <4>, <5>, <6>, <7>; + #gpio-cells = <2>; + #interrupt-cells = <2>; + }; + + gph1: gph1 { + gpio-controller; + interrupt-controller; + interrupt-parent = <&vic0>; + interrupts = <8>, <9>, <10>, <11>, + <12>, <13>, <14>, <15>; + #gpio-cells = <2>; + #interrupt-cells = <2>; + }; + + gph2: gph2 { + gpio-controller; + #gpio-cells = <2>; + #interrupt-cells = <2>; + }; + + gph3: gph3 { + gpio-controller; + #gpio-cells = <2>; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpa0-4", "gpa0-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart3_data: uart3-data { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart_audio: uart-audio { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpb-0", "gpb-2", "gpb-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpb-4", "gpb-6", "gpb-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + i2s0_bus: i2s0-bus { + samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", + "gpi-4", "gpi-5", "gpi-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", + "gpc1-4"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + ac97_bus: ac97-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", + "gpc1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm2_bus: pcm2-bus { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", + "gpc1-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spdif_bus: spdif-bus { + samsung,pins = "gpc1-0", "gpc1-1"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; + samsung,pin-function = <5>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpd1-0", "gpd1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpd1-2", "gpd1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpd1-4", "gpd1-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <0>; + }; + + pwm0_out: pwm0-out { + samsung,pins = "gpd0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpd0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpd0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpd0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row0: keypad-row-0 { + samsung,pins = "gph3-0"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row1: keypad-row-1 { + samsung,pins = "gph3-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row2: keypad-row-2 { + samsung,pins = "gph3-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row3: keypad-row-3 { + samsung,pins = "gph3-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row4: keypad-row-4 { + samsung,pins = "gph3-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row5: keypad-row-5 { + samsung,pins = "gph3-5"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row6: keypad-row-6 { + samsung,pins = "gph3-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_row7: keypad-row-7 { + samsung,pins = "gph3-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col0: keypad-col-0 { + samsung,pins = "gph2-0"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col1: keypad-col-1 { + samsung,pins = "gph2-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col2: keypad-col-2 { + samsung,pins = "gph2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col3: keypad-col-3 { + samsung,pins = "gph2-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col4: keypad-col-4 { + samsung,pins = "gph2-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col5: keypad-col-5 { + samsung,pins = "gph2-5"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col6: keypad-col-6 { + samsung,pins = "gph2-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col7: keypad-col-7 { + samsung,pins = "gph2-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpg0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpg0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpg0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpg0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpg1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpg1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpg1-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpg1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpg2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpg2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpg2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpg2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd2_bus8: sd2-bus-width8 { + samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd3_clk: sd3-clk { + samsung,pins = "gpg3-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd3_cmd: sd3-cmd { + samsung,pins = "gpg3-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd3_cd: sd3-cd { + samsung,pins = "gpg3-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd3_bus1: sd3-bus-width1 { + samsung,pins = "gpg3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + sd3_bus4: sd3-bus-width4 { + samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <2>; + samsung,pin-drv = <3>; + }; + + eint0: ext-int0 { + samsung,pins = "gph0-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint8: ext-int8 { + samsung,pins = "gph1-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint15: ext-int15 { + samsung,pins = "gph1-7"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint16: ext-int16 { + samsung,pins = "gph2-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint31: ext-int31 { + samsung,pins = "gph3-7"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_a_io: cam-port-a-io { + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", + "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_a_clk_active: cam-port-a-clk-active { + samsung,pins = "gpe1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + cam_port_a_clk_idle: cam-port-a-clk-idle { + samsung,pins = "gpe1-3"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + + cam_port_b_io: cam-port-b-io { + samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", + "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", + "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_b_clk_active: cam-port-b-clk-active { + samsung,pins = "gpj1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + cam_port_b_clk_idle: cam-port-b-clk-idle { + samsung,pins = "gpj1-3"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + + lcd_ctrl: lcd-ctrl { + samsung,pins = "gpd0-0", "gpd0-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_sync: lcd-sync { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_clk: lcd-clk { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data24: lcd-data-width24 { + samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", + "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; +}; diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi new file mode 100644 index 000000000000..8344a0ee2b86 --- /dev/null +++ b/arch/arm/boot/dts/s5pv210.dtsi @@ -0,0 +1,633 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "skeleton.dtsi" +#include +#include + +/ { + aliases { + csis0 = &csis0; + fimc0 = &fimc0; + fimc1 = &fimc1; + fimc2 = &fimc2; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2s0 = &i2s0; + i2s1 = &i2s1; + i2s2 = &i2s2; + pinctrl0 = &pinctrl0; + spi0 = &spi0; + spi1 = &spi1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; + reg = <0>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + external-clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + xxti: oscillator@0 { + compatible = "fixed-clock"; + reg = <0>; + clock-frequency = <0>; + clock-output-names = "xxti"; + #clock-cells = <0>; + }; + + xusbxti: oscillator@1 { + compatible = "fixed-clock"; + reg = <1>; + clock-frequency = <0>; + clock-output-names = "xusbxti"; + #clock-cells = <0>; + }; + }; + + onenand: onenand@b0000000 { + compatible = "samsung,s5pv210-onenand"; + reg = <0xb0600000 0x2000>, + <0xb0000000 0x20000>, + <0xb0040000 0x20000>; + interrupt-parent = <&vic1>; + interrupts = <31>; + clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; + clock-names = "bus", "onenand"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + + chipid@e0000000 { + compatible = "samsung,s5pv210-chipid"; + reg = <0xe0000000 0x1000>; + }; + + clocks: clock-controller@e0100000 { + compatible = "samsung,s5pv210-clock", "simple-bus"; + reg = <0xe0100000 0x10000>; + clock-names = "xxti", "xusbxti"; + clocks = <&xxti>, <&xusbxti>; + #clock-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmu_syscon: syscon@e0108000 { + compatible = "samsung-s5pv210-pmu", "syscon"; + reg = <0xe0108000 0x8000>; + }; + }; + + pinctrl0: pinctrl@e0200000 { + compatible = "samsung,s5pv210-pinctrl"; + reg = <0xe0200000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <30>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupts = <16>; + interrupt-parent = <&vic0>; + }; + }; + + amba { + #address-cells = <1>; + #size-cells = <1>; + compatible = "arm,amba-bus"; + ranges; + + pdma0: dma@e0900000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xe0900000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <19>; + clocks = <&clocks CLK_PDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + pdma1: dma@e0a00000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xe0a00000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <20>; + clocks = <&clocks CLK_PDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + }; + + spi0: spi@e1300000 { + compatible = "samsung,s5pv210-spi"; + reg = <0xe1300000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <15>; + dmas = <&pdma0 7>, <&pdma0 6>; + dma-names = "tx", "rx"; + clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; + clock-names = "spi", "spi_busclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@e1400000 { + compatible = "samsung,s5pv210-spi"; + reg = <0xe1400000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <16>; + dmas = <&pdma1 7>, <&pdma1 6>; + dma-names = "tx", "rx"; + clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; + clock-names = "spi", "spi_busclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + keypad: keypad@e1600000 { + compatible = "samsung,s5pv210-keypad"; + reg = <0xe1600000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <25>; + clocks = <&clocks CLK_KEYIF>; + clock-names = "keypad"; + status = "disabled"; + }; + + i2c0: i2c@e1800000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0xe1800000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <14>; + clocks = <&clocks CLK_I2C0>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_bus>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@e1a00000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0xe1a00000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <19>; + clocks = <&clocks CLK_I2C2>; + clock-names = "i2c"; + pinctrl-0 = <&i2c2_bus>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + audio-subsystem { + compatible = "samsung,s5pv210-audss", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clk_audss: clock-controller@eee10000 { + compatible = "samsung,s5pv210-audss-clock"; + reg = <0xeee10000 0x1000>; + clock-names = "hclk", "xxti", + "fout_epll", + "sclk_audio0"; + clocks = <&clocks DOUT_HCLKP>, <&xxti>, + <&clocks FOUT_EPLL>, + <&clocks SCLK_AUDIO0>; + #clock-cells = <1>; + }; + + i2s0: i2s@eee30000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0xeee30000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <16>; + dma-names = "rx", "tx", "tx-sec"; + dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; + clock-names = "iis", + "i2s_opclk0", + "i2s_opclk1"; + clocks = <&clk_audss CLK_I2S>, + <&clk_audss CLK_I2S>, + <&clk_audss CLK_DOUT_AUD_BUS>; + samsung,idma-addr = <0xc0010000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + }; + + i2s1: i2s@e2100000 { + compatible = "samsung,s3c6410-i2s"; + reg = <0xe2100000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <17>; + dma-names = "rx", "tx"; + dmas = <&pdma1 12>, <&pdma1 13>; + clock-names = "iis", "i2s_opclk0"; + clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s2: i2s@e2a00000 { + compatible = "samsung,s3c6410-i2s"; + reg = <0xe2a00000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <18>; + dma-names = "rx", "tx"; + dmas = <&pdma1 14>, <&pdma1 15>; + clock-names = "iis", "i2s_opclk0"; + clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2_bus>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + pwm: pwm@e2500000 { + compatible = "samsung,s5pc100-pwm"; + reg = <0xe2500000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <21>, <22>, <23>, <24>, <25>; + clock-names = "timers"; + clocks = <&clocks CLK_PWM>; + #pwm-cells = <3>; + }; + + watchdog: watchdog@e2700000 { + compatible = "samsung,s3c2410-wdt"; + reg = <0xe2700000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <26>; + clock-names = "watchdog"; + clocks = <&clocks CLK_WDT>; + }; + + rtc: rtc@e2800000 { + compatible = "samsung,s3c6410-rtc"; + reg = <0xe2800000 0x100>; + interrupt-parent = <&vic0>; + interrupts = <28>, <29>; + clocks = <&clocks CLK_RTC>; + clock-names = "rtc"; + status = "disabled"; + }; + + uart0: serial@e2900000 { + compatible = "samsung,s5pv210-uart"; + reg = <0xe2900000 0x400>; + interrupt-parent = <&vic1>; + interrupts = <10>; + clock-names = "uart", "clk_uart_baud0", + "clk_uart_baud1"; + clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, + <&clocks SCLK_UART0>; + status = "disabled"; + }; + + uart1: serial@e2900400 { + compatible = "samsung,s5pv210-uart"; + reg = <0xe2900400 0x400>; + interrupt-parent = <&vic1>; + interrupts = <11>; + clock-names = "uart", "clk_uart_baud0", + "clk_uart_baud1"; + clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, + <&clocks SCLK_UART1>; + status = "disabled"; + }; + + uart2: serial@e2900800 { + compatible = "samsung,s5pv210-uart"; + reg = <0xe2900800 0x400>; + interrupt-parent = <&vic1>; + interrupts = <12>; + clock-names = "uart", "clk_uart_baud0", + "clk_uart_baud1"; + clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, + <&clocks SCLK_UART2>; + status = "disabled"; + }; + + uart3: serial@e2900c00 { + compatible = "samsung,s5pv210-uart"; + reg = <0xe2900c00 0x400>; + interrupt-parent = <&vic1>; + interrupts = <13>; + clock-names = "uart", "clk_uart_baud0", + "clk_uart_baud1"; + clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, + <&clocks SCLK_UART3>; + status = "disabled"; + }; + + sdhci0: sdhci@eb000000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0xeb000000 0x100000>; + interrupt-parent = <&vic1>; + interrupts = <26>; + clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; + clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, + <&clocks SCLK_MMC0>; + status = "disabled"; + }; + + sdhci1: sdhci@eb100000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0xeb100000 0x100000>; + interrupt-parent = <&vic1>; + interrupts = <27>; + clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; + clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, + <&clocks SCLK_MMC1>; + status = "disabled"; + }; + + sdhci2: sdhci@eb200000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0xeb200000 0x100000>; + interrupt-parent = <&vic1>; + interrupts = <28>; + clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; + clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, + <&clocks SCLK_MMC2>; + status = "disabled"; + }; + + sdhci3: sdhci@eb300000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0xeb300000 0x100000>; + interrupt-parent = <&vic3>; + interrupts = <2>; + clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; + clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, + <&clocks SCLK_MMC3>; + status = "disabled"; + }; + + hsotg: hsotg@ec000000 { + compatible = "samsung,s3c6400-hsotg"; + reg = <0xec000000 0x20000>; + interrupt-parent = <&vic1>; + interrupts = <24>; + clocks = <&clocks CLK_USB_OTG>; + clock-names = "otg"; + phy-names = "usb2-phy"; + phys = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: usbphy@ec100000 { + compatible = "samsung,s5pv210-usb2-phy"; + reg = <0xec100000 0x100>; + samsung,pmureg-phandle = <&pmu_syscon>; + clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; + clock-names = "phy", "ref"; + #phy-cells = <1>; + status = "disabled"; + }; + + ehci: ehci@ec200000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0xec200000 0x100>; + interrupts = <23>; + interrupt-parent = <&vic1>; + clocks = <&clocks CLK_USB_HOST>; + clock-names = "usbhost"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + port@0 { + reg = <0>; + phys = <&usbphy 1>; + }; + }; + + ohci: ohci@ec300000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0xec300000 0x100>; + interrupts = <23>; + clocks = <&clocks CLK_USB_HOST>; + clock-names = "usbhost"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + port@0 { + reg = <0>; + phys = <&usbphy 1>; + }; + }; + + mfc: codec@f1700000 { + compatible = "samsung,mfc-v5"; + reg = <0xf1700000 0x10000>; + interrupt-parent = <&vic2>; + interrupts = <14>; + clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; + clock-names = "sclk_mfc", "mfc"; + }; + + vic0: interrupt-controller@f2000000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0xf2000000 0x1000>; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller@f2100000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0xf2100000 0x1000>; + #interrupt-cells = <1>; + }; + + vic2: interrupt-controller@f2200000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0xf2200000 0x1000>; + #interrupt-cells = <1>; + }; + + vic3: interrupt-controller@f2300000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + reg = <0xf2300000 0x1000>; + #interrupt-cells = <1>; + }; + + fimd: fimd@f8000000 { + compatible = "samsung,exynos4210-fimd"; + interrupt-parent = <&vic2>; + reg = <0xf8000000 0x20000>; + interrupt-names = "fifo", "vsync", "lcd_sys"; + interrupts = <0>, <1>, <2>; + clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; + clock-names = "sclk_fimd", "fimd"; + status = "disabled"; + }; + + g2d: g2d@fa000000 { + compatible = "samsung,s5pv210-g2d"; + reg = <0xfa000000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <9>; + clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; + clock-names = "sclk_fimg2d", "fimg2d"; + }; + + mdma1: mdma@fa200000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xfa200000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <18>; + clocks = <&clocks CLK_MDMA>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + }; + + i2c1: i2c@fab00000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0xfab00000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <13>; + clocks = <&clocks CLK_I2C1>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_bus>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + camera: camera { + compatible = "samsung,fimc", "simple-bus"; + pinctrl-names = "default"; + pinctrl-0 = <>; + clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; + clock-names = "sclk_cam0", "sclk_cam1"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clock_cam: clock-controller { + #clock-cells = <1>; + }; + + csis0: csis@fa600000 { + compatible = "samsung,s5pv210-csis"; + reg = <0xfa600000 0x4000>; + interrupt-parent = <&vic2>; + interrupts = <29>; + clocks = <&clocks CLK_CSIS>, + <&clocks SCLK_CSIS>; + clock-names = "clk_csis", + "sclk_csis"; + bus-width = <4>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + fimc0: fimc@fb200000 { + compatible = "samsung,s5pv210-fimc"; + reg = <0xfb200000 0x1000>; + interrupts = <5>; + interrupt-parent = <&vic2>; + clocks = <&clocks CLK_FIMC0>, + <&clocks SCLK_FIMC0>; + clock-names = "fimc", + "sclk_fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,cam-if; + }; + + fimc1: fimc@fb300000 { + compatible = "samsung,s5pv210-fimc"; + reg = <0xfb300000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <6>; + clocks = <&clocks CLK_FIMC1>, + <&clocks SCLK_FIMC1>; + clock-names = "fimc", + "sclk_fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,cam-if; + }; + + fimc2: fimc@fb400000 { + compatible = "samsung,s5pv210-fimc"; + reg = <0xfb400000 0x1000>; + interrupt-parent = <&vic2>; + interrupts = <7>; + clocks = <&clocks CLK_FIMC2>, + <&clocks SCLK_FIMC2>; + clock-names = "fimc", + "sclk_fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,lcd-wb; + }; + }; + }; +}; + +#include "s5pv210-pinctrl.dtsi" -- cgit v1.2.3 From b672b27d232e337c848f51a371538b665ca4fcf3 Mon Sep 17 00:00:00 2001 From: Mateusz Krawczuk Date: Sat, 28 Sep 2013 18:25:30 +0200 Subject: ARM: dts: Add Device tree for s5pc110/s5pv210 boards Add DTS for s5pc110 boards: goni, aquila, smdkc110 s5pv210: smdkv210, tiny210, torbreck Signed-off-by: Mateusz Krawczuk Signed-off-by: Kyungmin Park [t.figa: Rebased, fixed merge conflicts, neatened.] Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/Makefile | 5 + arch/arm/boot/dts/s5pv210-aquila.dts | 392 ++++++++++++++++++++++++++++ arch/arm/boot/dts/s5pv210-goni.dts | 449 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/s5pv210-smdkc110.dts | 78 ++++++ arch/arm/boot/dts/s5pv210-smdkv210.dts | 238 +++++++++++++++++ arch/arm/boot/dts/s5pv210-torbreck.dts | 92 +++++++ 6 files changed, 1254 insertions(+) create mode 100644 arch/arm/boot/dts/s5pv210-aquila.dts create mode 100644 arch/arm/boot/dts/s5pv210-goni.dts create mode 100644 arch/arm/boot/dts/s5pv210-smdkc110.dts create mode 100644 arch/arm/boot/dts/s5pv210-smdkv210.dts create mode 100644 arch/arm/boot/dts/s5pv210-torbreck.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index adb5ed9e269e..26775c9a985e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -321,6 +321,11 @@ dtb-$(CONFIG_ARCH_QCOM) += \ dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ s3c6410-smdk6410.dtb +dtb-$(CONFIG_ARCH_S5PV210) += s5pv210-aquila.dtb \ + s5pv210-goni.dtb \ + s5pv210-smdkc110.dtb \ + s5pv210-smdkv210.dtb \ + s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts new file mode 100644 index 000000000000..aa31b84a707a --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-aquila.dts @@ -0,0 +1,392 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Board device tree source for Samsung Aquila board. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include +#include "s5pv210.dtsi" + +/ { + model = "Samsung Aquila based on S5PC110"; + compatible = "samsung,aquila", "samsung,s5pv210"; + + aliases { + i2c3 = &i2c_pmic; + }; + + chosen { + bootargs = "console=ttySAC2,115200n8 root=/dev/mmcblk1p5 rw rootwait ignore_loglevel earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x30000000 0x05000000 + 0x40000000 0x18000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vtf_reg: fixed-regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "V_TF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpios = <&mp05 4 0>; + enable-active-high; + }; + + pda_reg: fixed-regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1.8V_PDA"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + reg = <1>; + }; + + bat_reg: fixed-regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "V_BAT"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + reg = <2>; + }; + }; + + i2c_pmic: i2c-pmic { + compatible = "i2c-gpio"; + gpios = <&gpj4 0 0>, /* sda */ + <&gpj4 3 0>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + + pmic@66 { + compatible = "national,lp3974"; + reg = <0x66>; + + max8998,pmic-buck1-default-dvs-idx = <0>; + max8998,pmic-buck1-dvs-gpios = <&gph0 3 0>, + <&gph0 4 0>; + max8998,pmic-buck1-dvs-voltage = <1200000>, <1200000>, + <1200000>, <1200000>; + + max8998,pmic-buck2-default-dvs-idx = <0>; + max8998,pmic-buck2-dvs-gpio = <&gph0 5 0>; + max8998,pmic-buck2-dvs-voltage = <1200000>, <1200000>; + + regulators { + ldo2_reg: LDO2 { + regulator-name = "VALIVE_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VUSB+MIPI_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "VADC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo5_reg: LDO5 { + regulator-name = "VTF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VCC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VCC_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "VUSB+VDAC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + regulator-name = "VCC+VCAM_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "VPLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "CAM_IO_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "CAM_ISP_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "CAM_A_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo14_reg: LDO14 { + regulator-name = "CAM_CIF_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "CAM_AF_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "CAM_8M_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "VARM_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "VINT_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "VCC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "CAM_CORE_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vichg_reg: ENVICHG { + regulator-name = "VICHG"; + }; + + safeout1_reg: ESAFEOUT1 { + regulator-name = "SAFEOUT1"; + regulator-always-on; + }; + + safeout2_reg: ESAFEOUT2 { + regulator-name = "SAFEOUT2"; + regulator-boot-on; + }; + }; + }; + + }; + + gpio-keys { + compatible = "gpio-keys"; + + power-key { + gpios = <&gph2 6 1>; + linux,code = ; + label = "power"; + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +}; + +&keypad { + linux,input-no-autorepeat; + linux,input-wakeup; + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&keypad_row0>, <&keypad_row1>, <&keypad_row2>, + <&keypad_col0>, <&keypad_col1>, <&keypad_col2>; + status = "okay"; + + key_1 { + keypad,row = <0>; + keypad,column = <1>; + linux,code = ; + }; + + key_2 { + keypad,row = <0>; + keypad,column = <2>; + linux,code = ; + }; + + key_3 { + keypad,row = <1>; + keypad,column = <1>; + linux,code = ; + }; + + key_4 { + keypad,row = <1>; + keypad,column = <2>; + linux,code = ; + }; + + key_5 { + keypad,row = <2>; + keypad,column = <1>; + linux,code = ; + }; + + key_6 { + keypad,row = <2>; + keypad,column = <2>; + linux,code = ; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&sdhci0 { + bus-width = <4>; + non-removable; + status = "okay"; + vmmc-supply = <&ldo5_reg>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4>; + pinctrl-names = "default"; +}; + +&sdhci2 { + bus-width = <4>; + cd-gpios = <&gph3 4 1>; + vmmc-supply = <&vtf_reg>; + cd-inverted; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &t_flash_detect>; + pinctrl-names = "default"; + status = "okay"; +}; + +&onenand { + status = "okay"; +}; + +&hsotg { + vusb_a-supply = <&ldo3_reg>; + vusb_d-supply = <&ldo8_reg>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&fimd { + pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>; + pinctrl-names = "default"; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: timing { + clock-frequency = <0>; + hactive = <800>; + vactive = <480>; + hfront-porch = <16>; + hback-porch = <16>; + hsync-len = <2>; + vback-porch = <3>; + vfront-porch = <28>; + vsync-len = <1>; + }; + }; +}; + +&pinctrl0 { + t_flash_detect: t-flash-detect { + samsung,pins = "gph3-4"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + }; +}; diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts new file mode 100644 index 000000000000..6387c77a6f7b --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-goni.dts @@ -0,0 +1,449 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Board device tree source for Samsung Goni board. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include +#include "s5pv210.dtsi" + +/ { + model = "Samsung Goni based on S5PC110"; + compatible = "samsung,goni", "samsung,s5pv210"; + + aliases { + i2c3 = &i2c_pmic; + }; + + chosen { + bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p5 rw rootwait ignore_loglevel earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x30000000 0x05000000 + 0x40000000 0x10000000 + 0x50000000 0x08000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vtf_reg: fixed-regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "V_TF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + reg = <0>; + gpios = <&mp05 4 0>; + enable-active-high; + }; + + pda_reg: fixed-regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1.8V_PDA"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + reg = <1>; + }; + + bat_reg: fixed-regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "V_BAT"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + reg = <2>; + }; + + tsp_reg: fixed-regulator@3 { + compatible = "regulator-fixed"; + regulator-name = "TSP_VDD"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + reg = <3>; + gpios = <&gpj1 3 0>; + enable-active-high; + }; + }; + + i2c_pmic: i2c-pmic { + compatible = "i2c-gpio"; + gpios = <&gpj4 0 0>, /* sda */ + <&gpj4 3 0>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + + pmic@66 { + compatible = "national,lp3974"; + reg = <0x66>; + + max8998,pmic-buck1-default-dvs-idx = <0>; + max8998,pmic-buck1-dvs-gpios = <&gph0 3 0>, + <&gph0 4 0>; + max8998,pmic-buck1-dvs-voltage = <1200000>, <1200000>, + <1200000>, <1200000>; + + max8998,pmic-buck2-default-dvs-idx = <0>; + max8998,pmic-buck2-dvs-gpio = <&gph0 5 0>; + max8998,pmic-buck2-dvs-voltage = <1200000>, <1200000>; + + regulators { + ldo2_reg: LDO2 { + regulator-name = "VALIVE_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VUSB+MIPI_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "VADC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo5_reg: LDO5 { + regulator-name = "VTF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo6_reg: LDO6 { + regulator-name = "VCC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo7_reg: LDO7 { + regulator-name = "VLCD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "VUSB+VDAC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo9_reg: LDO9 { + regulator-name = "VCC+VCAM_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo10_reg: LDO10 { + regulator-name = "VPLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "CAM_IO_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo12_reg: LDO12 { + regulator-name = "CAM_ISP_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo13_reg: LDO13 { + regulator-name = "CAM_A_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo14_reg: LDO14 { + regulator-name = "CAM_CIF_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo15_reg: LDO15 { + regulator-name = "CAM_AF_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo16_reg: LDO16 { + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo17_reg: LDO17 { + regulator-name = "CAM_8M_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "VARM_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + buck2_reg: BUCK2 { + regulator-name = "VINT_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + buck3_reg: BUCK3 { + regulator-name = "VCC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "CAM_CORE_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power-key { + gpios = <&gph2 6 1>; + linux,code = ; + label = "power"; + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +}; + +&keypad { + linux,input-no-autorepeat; + linux,input-wakeup; + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&keypad_row0>, <&keypad_row1>, <&keypad_row2>, + <&keypad_col0>, <&keypad_col1>, <&keypad_col2>; + status = "okay"; + + key_1 { + keypad,row = <0>; + keypad,column = <1>; + linux,code = ; + }; + + key_2 { + keypad,row = <0>; + keypad,column = <2>; + linux,code = ; + }; + + key_3 { + keypad,row = <1>; + keypad,column = <1>; + linux,code = ; + }; + + key_4 { + keypad,row = <1>; + keypad,column = <2>; + linux,code = ; + }; + + key_5 { + keypad,row = <2>; + keypad,column = <1>; + linux,code = ; + }; + + key_6 { + keypad,row = <2>; + keypad,column = <2>; + linux,code = ; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&sdhci0 { + bus-width = <4>; + non-removable; + vmmc-supply = <&ldo5_reg>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus1 &sd0_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci2 { + bus-width = <4>; + cd-gpios = <&gph3 4 1>; + vmmc-supply = <&vtf_reg>; + cd-inverted; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hsotg { + vusb_a-supply = <&ldo3_reg>; + vusb_d-supply = <&ldo8_reg>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&i2c2 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <400000>; + samsung,i2c-slave-addr = <0x10>; + status = "okay"; + + tsp@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + interrupt-parent = <&gpj0>; + interrupts = <5 2>; + + atmel,x-line = <17>; + atmel,y-line = <11>; + atmel,x-size = <800>; + atmel,y-size = <480>; + atmel,burst-length = <0x21>; + atmel,threshold = <0x28>; + atmel,orientation = <1>; + + vdd-supply = <&tsp_reg>; + }; +}; + +&i2c0 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <100000>; + samsung,i2c-slave-addr = <0x10>; + status = "okay"; + + noon010pc30: sensor@30 { + compatible = "siliconfile,noon010pc30"; + reg = <0x30>; + vddio-supply = <&ldo11_reg>; + vdda-supply = <&ldo13_reg>; + vdd_core-supply = <&ldo14_reg>; + + clock-frequency = <16000000>; + clocks = <&clock_cam 0>; + clock-names = "mclk"; + nreset-gpios = <&gpb 2 0>; + nstby-gpios = <&gpb 0 0>; + + port { + noon010pc30_ep: endpoint { + remote-endpoint = <&fimc0_ep>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&camera { + pinctrl-0 = <&cam_port_a_io &cam_port_a_clk_active>; + pinctrl-1 = <&cam_port_a_io &cam_port_a_clk_idle>; + pinctrl-names = "default", "idle"; + + parallel-ports { + #address-cells = <1>; + #size-cells = <0>; + + /* camera A input */ + port@1 { + reg = <1>; + fimc0_ep: endpoint { + remote-endpoint = <&noon010pc30_ep>; + bus-width = <8>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + }; + }; + }; +}; + +&fimd { + pinctrl-0 = <&lcd_clk &lcd_data24>; + pinctrl-names = "default"; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: timing { + /* 480x800@55Hz */ + clock-frequency = <23439570>; + hactive = <480>; + hfront-porch = <16>; + hback-porch = <16>; + hsync-len = <2>; + vactive = <800>; + vback-porch = <2>; + vfront-porch = <28>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; +}; + +&onenand { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/s5pv210-smdkc110.dts b/arch/arm/boot/dts/s5pv210-smdkc110.dts new file mode 100644 index 000000000000..1eedab7ffe94 --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-smdkc110.dts @@ -0,0 +1,78 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Board device tree source for YIC System SMDC110 board. + * + * NOTE: This file is completely based on original board file for mach-smdkc110 + * available in Linux 3.15 and intends to provide equivalent level of hardware + * support. Due to lack of hardware, _no_ testing has been performed. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include +#include "s5pv210.dtsi" + +/ { + model = "YIC System SMDKC110 based on S5PC110"; + compatible = "yic,smdkc110", "samsung,s5pv210"; + + chosen { + bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x20000000 0x20000000>; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + audio-codec@1b { + compatible = "wlf,wm8580"; + reg = <0x1b>; + }; + + eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; +}; + +&i2s0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/s5pv210-smdkv210.dts b/arch/arm/boot/dts/s5pv210-smdkv210.dts new file mode 100644 index 000000000000..cb8521899ec8 --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-smdkv210.dts @@ -0,0 +1,238 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Board device tree source for YIC System SMDV210 board. + * + * NOTE: This file is completely based on original board file for mach-smdkv210 + * available in Linux 3.15 and intends to provide equivalent level of hardware + * support. Due to lack of hardware, _no_ testing has been performed. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include +#include "s5pv210.dtsi" + +/ { + model = "YIC System SMDKV210 based on S5PV210"; + compatible = "yic,smdkv210", "samsung,s5pv210"; + + chosen { + bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x20000000 0x40000000>; + }; + + ethernet@18000000 { + compatible = "davicom,dm9000"; + reg = <0xA8000000 0x2 0xA8000002 0x2>; + interrupt-parent = <&gph1>; + interrupts = <1 4>; + local-mac-address = [00 00 de ad be ef]; + davicom,no-eeprom; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 3 5000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_out>; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +}; + +&keypad { + linux,input-no-autorepeat; + linux,input-wakeup; + samsung,keypad-num-rows = <8>; + samsung,keypad-num-columns = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&keypad_row0>, <&keypad_row1>, <&keypad_row2>, + <&keypad_row3>, <&keypad_row4>, <&keypad_row5>, + <&keypad_row6>, <&keypad_row7>, + <&keypad_col0>, <&keypad_col1>, <&keypad_col2>, + <&keypad_col3>, <&keypad_col4>, <&keypad_col5>, + <&keypad_col6>, <&keypad_col7>; + status = "okay"; + + key_1 { + keypad,row = <0>; + keypad,column = <3>; + linux,code = ; + }; + + key_2 { + keypad,row = <0>; + keypad,column = <4>; + linux,code = ; + }; + + key_3 { + keypad,row = <0>; + keypad,column = <5>; + linux,code = ; + }; + + key_4 { + keypad,row = <0>; + keypad,column = <6>; + linux,code = ; + }; + + key_5 { + keypad,row = <0 + >; + keypad,column = <7>; + linux,code = ; + }; + + key_6 { + keypad,row = <1>; + keypad,column = <3>; + linux,code = ; + }; + key_7 { + keypad,row = <1>; + keypad,column = <4>; + linux,code = ; + }; + + key_8 { + keypad,row = <1>; + keypad,column = <5>; + linux,code = ; + }; + + key_9 { + keypad,row = <1>; + keypad,column = <6>; + linux,code = ; + }; + + key_10 { + keypad,row = <1>; + keypad,column = <7>; + linux,code = ; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdhci0 { + bus-width = <4>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus1 &sd0_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci1 { + bus-width = <4>; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus1 &sd1_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci2 { + bus-width = <4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci3 { + bus-width = <4>; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_cd &sd3_bus1 &sd3_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hsotg { + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&fimd { + pinctrl-0 = <&lcd_clk &lcd_data24>; + pinctrl-names = "default"; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + + timing0: timing@0 { + /* 800x480@60Hz */ + clock-frequency = <24373920>; + hactive = <800>; + vactive = <480>; + hfront-porch = <8>; + hback-porch = <13>; + hsync-len = <3>; + vback-porch = <7>; + vfront-porch = <5>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; +}; + +&pwm { + samsung,pwm-outputs = <3>; +}; + +&i2c0 { + status = "okay"; + + audio-codec@1b { + compatible = "wlf,wm8580"; + reg = <0x1b>; + }; + + eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; +}; + +&i2s0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/s5pv210-torbreck.dts b/arch/arm/boot/dts/s5pv210-torbreck.dts new file mode 100644 index 000000000000..622599fd2cfa --- /dev/null +++ b/arch/arm/boot/dts/s5pv210-torbreck.dts @@ -0,0 +1,92 @@ +/* + * Samsung's S5PV210 SoC device tree source + * + * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. + * + * Mateusz Krawczuk + * Tomasz Figa + * + * Board device tree source for Torbreck board. + * + * NOTE: This file is completely based on original board file for mach-torbreck + * available in Linux 3.15 and intends to provide equivalent level of hardware + * support. Due to lack of hardware, _no_ testing has been performed. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include +#include "s5pv210.dtsi" + +/ { + model = "aESOP Torbreck based on S5PV210"; + compatible = "aesop,torbreck", "samsung,s5pv210"; + + chosen { + bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x20000000 0x20000000>; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdhci0 { + bus-width = <4>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus1 &sd0_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci1 { + bus-width = <4>; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus1 &sd1_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci2 { + bus-width = <4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhci3 { + bus-width = <4>; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_cd &sd3_bus1 &sd3_bus4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; -- cgit v1.2.3 From 28c8331d386a0c4122501a848a8fc3680bb65427 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Wed, 2 Jul 2014 19:34:32 +0200 Subject: ARM: S5PV210: Remove support for board files Since all in-tree boards have been moved to device tree, we can now drop legacy code and make mach-s5pv210 DT-only. This patch does it. Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/Kconfig | 173 ------ arch/arm/mach-s5pv210/Makefile | 19 - arch/arm/mach-s5pv210/common.c | 281 ---------- arch/arm/mach-s5pv210/common.h | 17 - arch/arm/mach-s5pv210/dev-audio.c | 246 --------- arch/arm/mach-s5pv210/dma.c | 130 ----- arch/arm/mach-s5pv210/mach-aquila.c | 687 ----------------------- arch/arm/mach-s5pv210/mach-goni.c | 915 ------------------------------- arch/arm/mach-s5pv210/mach-smdkc110.c | 159 ------ arch/arm/mach-s5pv210/mach-smdkv210.c | 336 ------------ arch/arm/mach-s5pv210/mach-torbreck.c | 135 ----- arch/arm/mach-s5pv210/pm.c | 24 +- arch/arm/mach-s5pv210/setup-fb-24bpp.c | 49 -- arch/arm/mach-s5pv210/setup-fimc.c | 43 -- arch/arm/mach-s5pv210/setup-i2c0.c | 6 +- arch/arm/mach-s5pv210/setup-i2c1.c | 28 - arch/arm/mach-s5pv210/setup-i2c2.c | 28 - arch/arm/mach-s5pv210/setup-ide.c | 39 -- arch/arm/mach-s5pv210/setup-keypad.c | 24 - arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 103 ---- arch/arm/mach-s5pv210/setup-spi.c | 34 -- arch/arm/mach-s5pv210/setup-usb-phy.c | 95 ---- arch/arm/plat-samsung/include/plat/cpu.h | 1 - 23 files changed, 8 insertions(+), 3564 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/common.c delete mode 100644 arch/arm/mach-s5pv210/dev-audio.c delete mode 100644 arch/arm/mach-s5pv210/dma.c delete mode 100644 arch/arm/mach-s5pv210/mach-aquila.c delete mode 100644 arch/arm/mach-s5pv210/mach-goni.c delete mode 100644 arch/arm/mach-s5pv210/mach-smdkc110.c delete mode 100644 arch/arm/mach-s5pv210/mach-smdkv210.c delete mode 100644 arch/arm/mach-s5pv210/mach-torbreck.c delete mode 100644 arch/arm/mach-s5pv210/setup-fb-24bpp.c delete mode 100644 arch/arm/mach-s5pv210/setup-fimc.c delete mode 100644 arch/arm/mach-s5pv210/setup-i2c1.c delete mode 100644 arch/arm/mach-s5pv210/setup-i2c2.c delete mode 100644 arch/arm/mach-s5pv210/setup-ide.c delete mode 100644 arch/arm/mach-s5pv210/setup-keypad.c delete mode 100644 arch/arm/mach-s5pv210/setup-sdhci-gpio.c delete mode 100644 arch/arm/mach-s5pv210/setup-spi.c delete mode 100644 arch/arm/mach-s5pv210/setup-usb-phy.c (limited to 'arch/arm') diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index ed492cf10a16..d6d0f9268935 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -19,181 +19,8 @@ config CPU_S5PV210 help Enable S5PV210 CPU support -config S5PV210_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S5PV210_SETUP_I2C2 - bool - help - Common setup code for i2c bus 2. - -config S5PV210_SETUP_IDE - bool - help - Common setup code for S5PV210 IDE GPIO configurations - -config S5PV210_SETUP_FB_24BPP - bool - help - Common setup code for S5PV210 with an 24bpp RGB display helper. - -config S5PV210_SETUP_KEYPAD - bool - help - Common setup code for keypad. - -config S5PV210_SETUP_SDHCI - bool - select S5PV210_SETUP_SDHCI_GPIO - help - Internal helper functions for S5PV210 based SDHCI systems - -config S5PV210_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -config S5PV210_SETUP_FIMC - bool - help - Common setup code for the camera interfaces. - -config S5PV210_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations. - -config S5PV210_SETUP_USB_PHY - bool - help - Common setup code for USB PHY controller - -menu "S5PC110 Machines" - -config MACH_AQUILA - bool "Aquila" - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_ONENAND - help - Machine support for the Samsung Aquila target based on S5PC110 SoC - -config MACH_GONI - bool "GONI" - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_USB_HSOTG - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_FIMC - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_MFC - select S5P_DEV_ONENAND - select S5P_DEV_TV - select S5P_GPIO_INT - select SAMSUNG_DEV_KEYPAD - help - Machine support for Samsung GONI board - S5PC110(MCP) is one of package option of S5PV210 - -config MACH_SMDKC110 - bool "SMDKC110" - select CPU_S5PV210 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_MFC - select SAMSUNG_DEV_IDE - help - Machine support for Samsung SMDKC110 - S5PC110(MCP) is one of package option of S5PV210 - -endmenu - menu "S5PV210 Machines" -config MACH_SMDKV210 - bool "SMDKV210" - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_JPEG - select S5P_DEV_MFC - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_IDE - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Machine support for Samsung SMDKV210 - -config MACH_TORBRECK - bool "Torbreck" - select ARCH_SPARSEMEM_ENABLE - select CPU_S5PV210 - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_SDHCI - select SAMSUNG_DEV_IDE - help - Machine support for aESOP Torbreck - config MACH_S5PV210_DT bool "Samsung S5PV210/S5PC110 machine using Device Tree" select CLKSRC_OF diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 8d87b10ea461..83993fc87d87 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -12,30 +12,11 @@ obj- := # Core -obj-y += common.o obj-$(CONFIG_PM) += pm.o -obj-y += dma.o - # machine support -obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o -obj-$(CONFIG_MACH_GONI) += mach-goni.o -obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o -obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o -obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o obj-$(CONFIG_MACH_S5PV210_DT) += s5pv210.o # device support -obj-y += dev-audio.o - obj-y += setup-i2c0.o -obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o -obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o -obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o -obj-$(CONFIG_S5PV210_SETUP_USB_PHY) += setup-usb-phy.o diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c deleted file mode 100644 index 30bd5421aa79..000000000000 --- a/arch/arm/mach-s5pv210/common.c +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Codes for S5PV210 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "common.h" - -/* External clock frequency */ -static unsigned long xusbxti_f; - -static const char name_s5pv210[] = "S5PV210/S5PC110"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S5PV210_CPU_ID, - .idmask = S5PV210_CPU_MASK, - .map_io = s5pv210_map_io, - .init_clocks = s5pv210_init_clocks, - .init_uarts = s5pv210_init_uarts, - .init = s5pv210_init, - .name = name_s5pv210, - }, -}; - -/* Initial IO mappings */ - -static struct map_desc s5pv210_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(S5PV210_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S5PV210_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S5PV210_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PV210_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO, - .pfn = __phys_to_pfn(S5PV210_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S5PV210_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S5PV210_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC2, - .pfn = __phys_to_pfn(S5PV210_PA_VIC2), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC3, - .pfn = __phys_to_pfn(S5PV210_PA_VIC3), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(S5PV210_PA_DMC0), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC1, - .pfn = __phys_to_pfn(S5PV210_PA_DMC1), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_USB_HSPHY, - .pfn =__phys_to_pfn(S5PV210_PA_HSPHY), - .length = SZ_4K, - .type = MT_DEVICE, - } -}; - -void s5pv210_restart(enum reboot_mode mode, const char *cmd) -{ - __raw_writel(0x1, S5P_SWRESET); -} - -static struct samsung_pwm_variant s5pv210_pwm_variant = { - .bits = 32, - .div_base = 0, - .has_tint_cstat = true, - .tclk_mask = (1 << 5), -}; - -void __init samsung_set_timer_source(unsigned int event, unsigned int source) -{ - s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; - s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); -} - -void __init samsung_timer_init(void) -{ - unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { - IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, - IRQ_TIMER3_VIC, IRQ_TIMER4_VIC, - }; - - samsung_pwm_clocksource_init(S3C_VA_TIMER, - timer_irqs, &s5pv210_pwm_variant); -} - -/* - * s5pv210_map_io - * - * register the standard cpu IO areas - */ - -void __init s5pv210_init_io(struct map_desc *mach_desc, int size) -{ - /* initialize the io descriptors we need for initialization */ - iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); - if (mach_desc) - iotable_init(mach_desc, size); - - /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); - - samsung_pwm_set_platdata(&s5pv210_pwm_variant); -} - -void __init s5pv210_map_io(void) -{ - /* initialise device information early */ - s5pv210_default_sdhci0(); - s5pv210_default_sdhci1(); - s5pv210_default_sdhci2(); - s5pv210_default_sdhci3(); - - s3c_adc_setname("samsung-adc-v3"); - - s3c_cfcon_setname("s5pv210-pata"); - - s3c_fimc_setname(0, "s5pv210-fimc"); - s3c_fimc_setname(1, "s5pv210-fimc"); - s3c_fimc_setname(2, "s5pv210-fimc"); - - /* the i2c devices are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - s3c_i2c2_setname("s3c2440-i2c"); - - s3c_fb_setname("s5pv210-fb"); - - /* Use s5pv210-keypad instead of samsung-keypad */ - samsung_keypad_setname("s5pv210-keypad"); - - /* setup TV devices */ - s5p_hdmi_setname("s5pv210-hdmi"); - - s3c64xx_spi_setname("s5pv210-spi"); -} - -void __init s5pv210_init_clocks(int xtal) -{ - xusbxti_f = xtal; -} - -void __init s5pv210_init_irq(void) -{ - u32 vic[4]; /* S5PV210 supports 4 VIC */ - - s5pv210_clk_init(0, xusbxti_f, S3C_VA_SYS); - - /* All the VICs are fully populated. */ - vic[0] = ~0; - vic[1] = ~0; - vic[2] = ~0; - vic[3] = ~0; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} - -struct bus_type s5pv210_subsys = { - .name = "s5pv210-core", - .dev_name = "s5pv210-core", -}; - -static struct device s5pv210_dev = { - .bus = &s5pv210_subsys, -}; - -static int __init s5pv210_core_init(void) -{ - return subsys_system_register(&s5pv210_subsys, NULL); -} -core_initcall(s5pv210_core_init); - -int __init s5pv210_init(void) -{ - printk(KERN_INFO "S5PV210: Initializing architecture\n"); - return device_register(&s5pv210_dev); -} - -/* uart registration process */ - -void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h index 083ffe7b5079..0b694c798ad1 100644 --- a/arch/arm/mach-s5pv210/common.h +++ b/arch/arm/mach-s5pv210/common.h @@ -12,22 +12,5 @@ #ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H #define __ARCH_ARM_MACH_S5PV210_COMMON_H -#include - -void s5pv210_clk_init(unsigned long xxti_f, unsigned long xusbxti_f, - void __iomem *reg_base); - -void s5pv210_init_io(struct map_desc *mach_desc, int size); -void s5pv210_init_irq(void); - -void s5pv210_register_clocks(void); -void s5pv210_setup_clocks(void); - -void s5pv210_restart(enum reboot_mode mode, const char *cmd); - -extern int s5pv210_init(void); -extern void s5pv210_map_io(void); -extern void s5pv210_init_clocks(int xtal); -extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no); #endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */ diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c deleted file mode 100644 index 2d67361ef431..000000000000 --- a/arch/arm/mach-s5pv210/dev-audio.c +++ /dev/null @@ -1,246 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/dev-audio.c - * - * Copyright (c) 2010 Samsung Electronics Co. Ltd - * Jaswinder Singh - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include - -#include -#include - -#include -#include -#include - -#define S5PV210_AUDSS_INT_MEM (0xC0000000) - -static int s5pv210_cfg_i2s(struct platform_device *pdev) -{ - /* configure GPIO for i2s port */ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5PV210_GPI(0), 7, S3C_GPIO_SFN(2)); - break; - case 1: - s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(2)); - break; - case 2: - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(4)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata i2sv5_pdata = { - .cfg_gpio = s5pv210_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI - | QUIRK_NEED_RSTCLR, - .idma_addr = S5PV210_AUDSS_INT_MEM, - }, - }, -}; - -static struct resource s5pv210_iis0_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_IIS0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S0_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S0_RX), - [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX), -}; - -struct platform_device s5pv210_device_iis0 = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(s5pv210_iis0_resource), - .resource = s5pv210_iis0_resource, - .dev = { - .platform_data = &i2sv5_pdata, - }, -}; - -static struct s3c_audio_pdata i2sv3_pdata = { - .cfg_gpio = s5pv210_cfg_i2s, -}; - -static struct resource s5pv210_iis1_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_IIS1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S1_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S1_RX), -}; - -struct platform_device s5pv210_device_iis1 = { - .name = "samsung-i2s", - .id = 1, - .num_resources = ARRAY_SIZE(s5pv210_iis1_resource), - .resource = s5pv210_iis1_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -static struct resource s5pv210_iis2_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_IIS2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S2_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S2_RX), -}; - -struct platform_device s5pv210_device_iis2 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(s5pv210_iis2_resource), - .resource = s5pv210_iis2_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -/* PCM Controller platform_devices */ - -static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5PV210_GPI(0), 5, S3C_GPIO_SFN(3)); - break; - case 1: - s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(3)); - break; - case 2: - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(2)); - break; - default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s3c_pcm_pdata = { - .cfg_gpio = s5pv210_pcm_cfg_gpio, -}; - -static struct resource s5pv210_pcm0_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_PCM0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM0_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM0_RX), -}; - -struct platform_device s5pv210_device_pcm0 = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(s5pv210_pcm0_resource), - .resource = s5pv210_pcm0_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource s5pv210_pcm1_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_PCM1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM1_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM1_RX), -}; - -struct platform_device s5pv210_device_pcm1 = { - .name = "samsung-pcm", - .id = 1, - .num_resources = ARRAY_SIZE(s5pv210_pcm1_resource), - .resource = s5pv210_pcm1_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource s5pv210_pcm2_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_PCM2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM2_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM2_RX), -}; - -struct platform_device s5pv210_device_pcm2 = { - .name = "samsung-pcm", - .id = 2, - .num_resources = ARRAY_SIZE(s5pv210_pcm2_resource), - .resource = s5pv210_pcm2_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -/* AC97 Controller platform devices */ - -static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(4)); -} - -static struct resource s5pv210_ac97_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_AC97, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT), - [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN), - [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN), - [4] = DEFINE_RES_IRQ(IRQ_AC97), -}; - -static struct s3c_audio_pdata s3c_ac97_pdata = { - .cfg_gpio = s5pv210_ac97_cfg_gpio, -}; - -static u64 s5pv210_ac97_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pv210_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s5pv210_ac97_resource), - .resource = s5pv210_ac97_resource, - .dev = { - .platform_data = &s3c_ac97_pdata, - .dma_mask = &s5pv210_ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -/* S/PDIF Controller platform_device */ - -static int s5pv210_spdif_cfg_gpio(struct platform_device *pdev) -{ - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 2, S3C_GPIO_SFN(3)); - - return 0; -} - -static struct resource s5pv210_spdif_resource[] = { - [0] = DEFINE_RES_MEM(S5PV210_PA_SPDIF, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_SPDIF), -}; - -static struct s3c_audio_pdata samsung_spdif_pdata = { - .cfg_gpio = s5pv210_spdif_cfg_gpio, -}; - -static u64 s5pv210_spdif_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pv210_device_spdif = { - .name = "samsung-spdif", - .id = -1, - .num_resources = ARRAY_SIZE(s5pv210_spdif_resource), - .resource = s5pv210_spdif_resource, - .dev = { - .platform_data = &samsung_spdif_pdata, - .dma_mask = &s5pv210_spdif_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c deleted file mode 100644 index b8337e248b09..000000000000 --- a/arch/arm/mach-s5pv210/dma.c +++ /dev/null @@ -1,130 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/dma.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -static u8 pdma0_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_MAX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_MAX, - DMACH_PWM, - DMACH_SPDIF, -}; - -static struct dma_pl330_platdata s5pv210_pdma0_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma0_peri), - .peri_id = pdma0_peri, -}; - -static AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, - S5PV210_PA_PDMA0, {IRQ_PDMA0}, &s5pv210_pdma0_pdata); - -static u8 pdma1_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_MAX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_MSM_REQ0, - DMACH_MSM_REQ1, - DMACH_MSM_REQ2, - DMACH_MSM_REQ3, - DMACH_PCM2_RX, - DMACH_PCM2_TX, -}; - -static struct dma_pl330_platdata s5pv210_pdma1_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma1_peri), - .peri_id = pdma1_peri, -}; - -static AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, - S5PV210_PA_PDMA1, {IRQ_PDMA1}, &s5pv210_pdma1_pdata); - -static int __init s5pv210_dma_init(void) -{ - dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); - amba_device_register(&s5pv210_pdma0_device, &iomem_resource); - - dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); - amba_device_register(&s5pv210_pdma1_device, &iomem_resource); - - return 0; -} -arch_initcall(s5pv210_dma_init); diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c deleted file mode 100644 index cc37edacda26..000000000000 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ /dev/null @@ -1,687 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-aquila.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include