From 5a1dc78a38bfb04159a08cd493e5b3d844939e6c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 14 May 2012 14:57:28 +0900 Subject: sh: Support thread fault code encoding. This provides a simple interface modelled after sparc64/m32r to encode the error code in the upper byte of thread_info for finer-grained handling in the page fault path. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh3/entry.S | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index f6a389c996cb..262db6ec067b 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S @@ -2,7 +2,7 @@ * arch/sh/kernel/cpu/sh3/entry.S * * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2006 Paul Mundt + * Copyright (C) 2003 - 2012 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -17,6 +17,7 @@ #include #include #include +#include ! NOTE: ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address @@ -114,22 +115,22 @@ ENTRY(tlb_miss_load) .align 2 ENTRY(tlb_miss_store) bra call_handle_tlbmiss - mov #1, r5 + mov #FAULT_CODE_WRITE, r5 .align 2 ENTRY(initial_page_write) bra call_handle_tlbmiss - mov #2, r5 + mov #FAULT_CODE_INITIAL, r5 .align 2 ENTRY(tlb_protection_violation_load) bra call_do_page_fault - mov #0, r5 + mov #FAULT_CODE_PROT, r5 .align 2 ENTRY(tlb_protection_violation_store) bra call_do_page_fault - mov #1, r5 + mov #(FAULT_CODE_PROT | FAULT_CODE_WRITE), r5 call_handle_tlbmiss: mov.l 1f, r0 -- cgit v1.2.3