From c210c1d8f19d3a33802af1bc79934188d994e92c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 29 Jan 2022 18:55:57 +0100 Subject: arm64: dts: broadcom: align pl330 node name with dtschema Fixes dtbs_check warnings like: dma@310000: $nodename:0: 'dma@310000' does not match '^dma-controller(@.*)?$' Signed-off-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 2 +- arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi index 2cfeaf3b0a87..6da38ac317f2 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi @@ -276,7 +276,7 @@ mboxes = <&pdc3 0>; }; - dma0: dma@61360000 { + dma0: dma-controller@61360000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x61360000 0x1000>; interrupts = , diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 7b04dfe67bef..4135246b6e72 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -543,7 +543,7 @@ reg = <0x00220000 0x28>; }; - dma0: dma@310000 { + dma0: dma-controller@310000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x00310000 0x1000>; interrupts = , -- cgit v1.2.3 From 33826e9c6ba76b265d4e26cb95493fa27ed78974 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Wed, 29 Dec 2021 11:23:14 +0100 Subject: arm64: dts: broadcom: bcm4908: use proper TWD binding Block at is a TWD that contains timers, watchdog and reset. Actual timers happen to be at block beginning but they only span across the first 0x28 registers. It means the old block description was incorrect (size 0x3c). Drop timers binding for now and use documented TWD binding. Timers should be properly documented and defined as TWD subnode. Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files") Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index 984c737fa627..6e738f2a3701 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -273,9 +273,9 @@ #size-cells = <1>; ranges = <0x00 0x00 0xff800000 0x3000>; - timer: timer@400 { - compatible = "brcm,bcm6328-timer", "syscon"; - reg = <0x400 0x3c>; + twd: timer-mfd@400 { + compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; + reg = <0x400 0x4c>; }; gpio0: gpio-controller@500 { @@ -330,7 +330,7 @@ reboot { compatible = "syscon-reboot"; - regmap = <&timer>; + regmap = <&twd>; offset = <0x34>; mask = <1>; }; -- cgit v1.2.3 From 72b1c5da796ec5266f2012c36470e226cb4f09c9 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Thu, 30 Dec 2021 12:05:35 +0100 Subject: arm64: dts: broadcom: bcm4908: add pinctrl binding Describe pinmux block with its maps. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 135 ++++++++++++++++++++++ 1 file changed, 135 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index 6e738f2a3701..255c1ea2add4 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -287,6 +287,141 @@ gpio-controller; }; + pinctrl@560 { + compatible = "brcm,bcm4908-pinctrl"; + reg = <0x560 0x10>; + + pins_led_0_a: led_0-a-pins { + function = "led_0"; + groups = "led_0_grp_a"; + }; + + pins_led_1_a: led_1-a-pins { + function = "led_1"; + groups = "led_1_grp_a"; + }; + + pins_led_2_a: led_2-a-pins { + function = "led_2"; + groups = "led_2_grp_a"; + }; + + pins_led_3_a: led_3-a-pins { + function = "led_3"; + groups = "led_3_grp_a"; + }; + + pins_led_4_a: led_4-a-pins { + function = "led_4"; + groups = "led_4_grp_a"; + }; + + pins_led_5_a: led_5-a-pins { + function = "led_5"; + groups = "led_5_grp_a"; + }; + + pins_led_6_a: led_6-a-pins { + function = "led_6"; + groups = "led_6_grp_a"; + }; + + pins_led_7_a: led_7-a-pins { + function = "led_7"; + groups = "led_7_grp_a"; + }; + + pins_led_8_a: led_8-a-pins { + function = "led_8"; + groups = "led_8_grp_a"; + }; + + pins_led_9_a: led_9-a-pins { + function = "led_9"; + groups = "led_9_grp_a"; + }; + + pins_led_21_a: led_21-a-pins { + function = "led_21"; + groups = "led_21_grp_a"; + }; + + pins_led_22_a: led_22-a-pins { + function = "led_22"; + groups = "led_22_grp_a"; + }; + + pins_led_26_a: led_26-a-pins { + function = "led_26"; + groups = "led_26_grp_a"; + }; + + pins_led_27_a: led_27-a-pins { + function = "led_27"; + groups = "led_27_grp_a"; + }; + + pins_led_28_a: led_28-a-pins { + function = "led_28"; + groups = "led_28_grp_a"; + }; + + pins_led_29_a: led_29-a-pins { + function = "led_29"; + groups = "led_29_grp_a"; + }; + + pins_led_30_a: led_30-a-pins { + function = "led_30"; + groups = "led_30_grp_a"; + }; + + pins_hs_uart: hs_uart-pins { + function = "hs_uart"; + groups = "hs_uart_grp"; + }; + + pins_i2c_a: i2c-a-pins { + function = "i2c"; + groups = "i2c_grp_a"; + }; + + pins_i2c_b: i2c-b-pins { + function = "i2c"; + groups = "i2c_grp_b"; + }; + + pins_i2s: i2s-pins { + function = "i2s"; + groups = "i2s_grp"; + }; + + pins_nand_ctrl: nand_ctrl-pins { + function = "nand_ctrl"; + groups = "nand_ctrl_grp"; + }; + + pins_nand_data: nand_data-pins { + function = "nand_data"; + groups = "nand_data_grp"; + }; + + pins_emmc_ctrl: emmc_ctrl-pins { + function = "emmc_ctrl"; + groups = "emmc_ctrl_grp"; + }; + + pins_usb0_pwr: usb0_pwr-pins { + function = "usb0_pwr"; + groups = "usb0_pwr_grp"; + }; + + pins_usb1_pwr: usb1_pwr-pins { + function = "usb1_pwr"; + groups = "usb1_pwr_grp"; + }; + }; + uart0: serial@640 { compatible = "brcm,bcm6345-uart"; reg = <0x640 0x18>; -- cgit v1.2.3 From 47513f6dd93b5b7d91143219c2c1fb883664ed13 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Wed, 9 Feb 2022 21:14:17 +0100 Subject: arm64: dts: broadcom: bcm4908: add watchdog block BCM4908 has the same watchdog as BCM63xx devices. Use "brcm,bcm6345-wdt" binding which matches the first SoC with that block. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index 255c1ea2add4..f76b3dbf67ac 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -276,6 +276,15 @@ twd: timer-mfd@400 { compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; reg = <0x400 0x4c>; + ranges = <0x0 0x400 0x4c>; + + #address-cells = <1>; + #size-cells = <1>; + + watchdog@28 { + compatible = "brcm,bcm6345-wdt"; + reg = <0x28 0x8>; + }; }; gpio0: gpio-controller@500 { -- cgit v1.2.3 From ba5dfa2fd8d0aed4e4b6f650ba9e8ea7cdd6ead1 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Tue, 15 Feb 2022 07:36:39 +0100 Subject: arm64: dts: broadcom: bcm4908: add I2C block BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index f76b3dbf67ac..a4be040a00c0 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -456,6 +456,15 @@ }; }; + i2c@2100 { + compatible = "brcm,brcmper-i2c"; + reg = <0x2100 0x58>; + clock-frequency = <97500>; + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c_a>; + status = "disabled"; + }; + misc@2600 { compatible = "brcm,misc", "simple-mfd"; reg = <0x2600 0xe4>; -- cgit v1.2.3 From c953c764e505428f59ffe6afb1c73b89b5b1ac35 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Mon, 28 Feb 2022 16:39:03 +0530 Subject: arm64: dts: ns2: Fix spi-cpol and spi-cpha property Broadcom ns2 platform has spi-cpol and spi-cpho properties set incorrectly. As per spi-slave-peripheral-prop.yaml, these properties are of flag or boolean type and not integer type. Fix the values. Fixes: d69dbd9f41a7c (arm64: dts: Add ARM PL022 SPI DT nodes for NS2) Signed-off-by: Kuldeep Singh CC: Ray Jui CC: Scott Branden CC: Florian Fainelli --- arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts index ec19fbf928a1..12a4b1c03390 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts @@ -111,8 +111,8 @@ compatible = "silabs,si3226x"; reg = <0>; spi-max-frequency = <5000000>; - spi-cpha = <1>; - spi-cpol = <1>; + spi-cpha; + spi-cpol; pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; @@ -135,8 +135,8 @@ at25,byte-len = <0x8000>; at25,addr-mode = <2>; at25,page-size = <64>; - spi-cpha = <1>; - spi-cpol = <1>; + spi-cpha; + spi-cpol; pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; -- cgit v1.2.3 From 55927cb44db43a57699fa652e2437a91620385dc Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Tue, 1 Mar 2022 16:24:18 +0100 Subject: arm64: dts: broadcom: Fix sata nodename After converting ahci-platform txt binding to yaml nodename is reported as not matching the standard: arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dt.yaml: ahci@663f2000: $nodename:0: 'ahci@663f2000' does not match '^sata(@.*)?$' Fix it to match binding. Fixes: ac9aae00f0fc ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2") Signed-off-by: Frank Wunderlich Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi index 6da38ac317f2..60c1f64e9617 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi @@ -687,7 +687,7 @@ }; }; - sata: ahci@663f2000 { + sata: sata@663f2000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x663f2000 0x1000>; dma-coherent; -- cgit v1.2.3 From bb8555fe87154e90dcd5a05082fd499d46c93fb5 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Mon, 7 Mar 2022 23:51:00 +0530 Subject: arm64: dts: ns2: Fix spi clock name SPI clock name for pl022 is "sspclk" and not "spiclk". Also fix below dtc warning: clock-names:0: 'spiclk' is not one of ['SSPCLK', 'sspclk'] Signed-off-by: Kuldeep Singh Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi index 60c1f64e9617..f59fa3979a04 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi @@ -644,7 +644,7 @@ reg = <0x66180000 0x1000>; interrupts = ; clocks = <&iprocslow>, <&iprocslow>; - clock-names = "spiclk", "apb_pclk"; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -655,7 +655,7 @@ reg = <0x66190000 0x1000>; interrupts = ; clocks = <&iprocslow>, <&iprocslow>; - clock-names = "spiclk", "apb_pclk"; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- cgit v1.2.3 From 66435063c5f31caa70ecadb3de4fe4d17b141b51 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Mon, 7 Mar 2022 23:51:01 +0530 Subject: arm64: dts: stingray: Fix spi clock name SPI clock name for pl022 is "sspclk" and not "spiclk". Also fix below dtc warning: clock-names:0: 'spiclk' is not one of ['SSPCLK', 'sspclk'] Signed-off-by: Kuldeep Singh Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 4135246b6e72..7f1b8efd0883 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -519,7 +519,7 @@ reg = <0x00180000 0x1000>; interrupts = ; clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; - clock-names = "spiclk", "apb_pclk"; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -531,7 +531,7 @@ reg = <0x00190000 0x1000>; interrupts = ; clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; - clock-names = "spiclk", "apb_pclk"; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3