From 701190fd7419f6757c19cdc6473830c79debb3ae Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Fri, 18 Jan 2013 13:46:00 +0000 Subject: clk: x86: add support for Lynxpoint LPSS clocks Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and SPI controllers. For most of these there is a configuration register that allows software to enable and disable the functional clock. Disabling the clock while the peripheral is not used saves power. In order to take advantage of this we add a new clock gate of type lpss_gate that just re-uses the ordinary clk_gate but in addition is able to enumerate the base address register of the device using ACPI. We then create a clock tree that models the Lynxpoint LPSS clocks using these gates and fixed clocks so that we can pass clock rate to the drivers as well. Signed-off-by: Heikki Krogerus Signed-off-by: Mika Westerberg Reviewed-by: Mark Brown Acked-by: Mike Turquette Signed-off-by: Rafael J. Wysocki --- drivers/clk/x86/Makefile | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 drivers/clk/x86/Makefile (limited to 'drivers/clk/x86/Makefile') diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile new file mode 100644 index 000000000000..f9ba4fab0ddc --- /dev/null +++ b/drivers/clk/x86/Makefile @@ -0,0 +1,2 @@ +clk-x86-lpss-objs := clk-lpss.o clk-lpt.o +obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o -- cgit v1.2.3