From 268e2519f5b7101d707a0df32e628e9990bc0da6 Mon Sep 17 00:00:00 2001 From: Ujjal Singh Date: Tue, 22 Aug 2017 20:31:18 -0400 Subject: dmaengine: ioatdma: Add intr_coalesce sysfs entry We observed performance increase with DMA copy from memory to MMIO by changing the interrupt coalescing value to 0. The previous set value was projected on the C5xxx Xeon platform and no longer holds true. Removing hard coded value and providing a tune-able in sysfs in order to allow user to tune this on a per channel basis. By default this value will be set to 0. Example of sysfs variable importing for interrupt coalescing value from command line: echo 5> /sys/devices/pci0000:00/0000:00:04.0/dma/dma0chan0/ quickdata/intr_coalesce Reported-by: Nithin Sujir Signed-off-by: Ujjal Singh Acked-by: Dave Jiang Signed-off-by: Vinod Koul --- drivers/dma/ioat/dma.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'drivers/dma/ioat/dma.c') diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c index a371b07a0981..f70cc74032ea 100644 --- a/drivers/dma/ioat/dma.c +++ b/drivers/dma/ioat/dma.c @@ -644,9 +644,13 @@ static void __cleanup(struct ioatdma_chan *ioat_chan, dma_addr_t phys_complete) mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT); } - /* 5 microsecond delay per pending descriptor */ - writew(min((5 * (active - i)), IOAT_INTRDELAY_MASK), - ioat_chan->ioat_dma->reg_base + IOAT_INTRDELAY_OFFSET); + /* microsecond delay by sysfs variable per pending descriptor */ + if (ioat_chan->intr_coalesce != ioat_chan->prev_intr_coalesce) { + writew(min((ioat_chan->intr_coalesce * (active - i)), + IOAT_INTRDELAY_MASK), + ioat_chan->ioat_dma->reg_base + IOAT_INTRDELAY_OFFSET); + ioat_chan->prev_intr_coalesce = ioat_chan->intr_coalesce; + } } static void ioat_cleanup(struct ioatdma_chan *ioat_chan) -- cgit v1.2.3