From 388291c3a1eb6fec7ec673939fdc2a8e4bce550f Mon Sep 17 00:00:00 2001 From: Lad, Prabhakar Date: Wed, 11 Dec 2013 23:22:07 +0530 Subject: gpio: davinci: use {readl|writel}_relaxed() instead of __raw_* This patch replaces the __raw_readl/writel with {readl|writel}_relaxed(), Altough the code runs on ARMv5 based SOCs, changing this will help using code for other use cases (like with big-endian machines). Signed-off-by: Lad, Prabhakar Acked-by: Linus Walleij Signed-off-by: Sekhar Nori --- drivers/gpio/gpio-davinci.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 84be70157ad6..805552c9c0ef 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -82,14 +82,14 @@ static inline int __davinci_direction(struct gpio_chip *chip, u32 mask = 1 << offset; spin_lock_irqsave(&d->lock, flags); - temp = __raw_readl(&g->dir); + temp = readl_relaxed(&g->dir); if (out) { temp &= ~mask; - __raw_writel(mask, value ? &g->set_data : &g->clr_data); + writel_relaxed(mask, value ? &g->set_data : &g->clr_data); } else { temp |= mask; } - __raw_writel(temp, &g->dir); + writel_relaxed(temp, &g->dir); spin_unlock_irqrestore(&d->lock, flags); return 0; @@ -118,7 +118,7 @@ static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_regs __iomem *g = d->regs; - return (1 << offset) & __raw_readl(&g->in_data); + return (1 << offset) & readl_relaxed(&g->in_data); } /* @@ -130,7 +130,7 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_regs __iomem *g = d->regs; - __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); + writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); } static int davinci_gpio_probe(struct platform_device *pdev) @@ -227,8 +227,8 @@ static void gpio_irq_disable(struct irq_data *d) struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); u32 mask = (u32) irq_data_get_irq_handler_data(d); - __raw_writel(mask, &g->clr_falling); - __raw_writel(mask, &g->clr_rising); + writel_relaxed(mask, &g->clr_falling); + writel_relaxed(mask, &g->clr_rising); } static void gpio_irq_enable(struct irq_data *d) @@ -242,9 +242,9 @@ static void gpio_irq_enable(struct irq_data *d) status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (status & IRQ_TYPE_EDGE_FALLING) - __raw_writel(mask, &g->set_falling); + writel_relaxed(mask, &g->set_falling); if (status & IRQ_TYPE_EDGE_RISING) - __raw_writel(mask, &g->set_rising); + writel_relaxed(mask, &g->set_rising); } static int gpio_irq_type(struct irq_data *d, unsigned trigger) @@ -286,10 +286,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) int res; /* ack any irqs */ - status = __raw_readl(&g->intstat) & mask; + status = readl_relaxed(&g->intstat) & mask; if (!status) break; - __raw_writel(status, &g->intstat); + writel_relaxed(status, &g->intstat); /* now demux them to the right lowlevel handler */ n = d->irq_base; @@ -346,9 +346,9 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger) if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) + writel_relaxed(mask, (trigger & IRQ_TYPE_EDGE_FALLING) ? &g->set_falling : &g->clr_falling); - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) + writel_relaxed(mask, (trigger & IRQ_TYPE_EDGE_RISING) ? &g->set_rising : &g->clr_rising); return 0; @@ -432,8 +432,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) /* default trigger: both edges */ g = gpio2regs(0); - __raw_writel(~0, &g->set_falling); - __raw_writel(~0, &g->set_rising); + writel_relaxed(~0, &g->set_falling); + writel_relaxed(~0, &g->set_rising); /* set the direct IRQs up to use that irqchip */ for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) { @@ -456,8 +456,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) /* disabled by default, enabled only as needed */ g = gpio2regs(gpio); - __raw_writel(~0, &g->clr_falling); - __raw_writel(~0, &g->clr_rising); + writel_relaxed(~0, &g->clr_falling); + writel_relaxed(~0, &g->clr_rising); /* set up all irqs in this bank */ irq_set_chained_handler(bank_irq, gpio_irq_handler); @@ -485,7 +485,7 @@ done: * BINTEN -- per-bank interrupt enable. genirq would also let these * bits be set/cleared dynamically. */ - __raw_writel(binten, gpio_base + BINTEN); + writel_relaxed(binten, gpio_base + BINTEN); printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); -- cgit v1.2.3 From c21d500bdcf1cc0e8b7fd293195270cfa88bf963 Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Thu, 21 Nov 2013 17:34:35 +0200 Subject: gpio: davinci: get rid of DAVINCI_N_GPIO Since Davinci GPIO driver is moved to support gpiolib it has to use ARCH_NR_GPIOS (can be configured using CONFIG_ARCH_NR_GPIO Kconfig option) configuration instead of any mach/platform specific options. Hence, replace private DAVINCI_N_GPIO with common ARCH_NR_GPIOS. This is safe because default value for ARCH_NR_GPIOS=256 and maximum number of supported GPIOs for Davinci is DAVINCI_N_GPIO=144. More over, this is one of steps to re-use Davinci GPIO driver by other mach/platform. Signed-off-by: Grygorii Strashko Acked-by: Lad, Prabhakar Acked-by: Linus Walleij Acked-by: Santosh Shilimkar Signed-off-by: Sekhar Nori --- drivers/gpio/gpio-davinci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 805552c9c0ef..23c187c01659 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -160,8 +160,8 @@ static int davinci_gpio_probe(struct platform_device *pdev) return -EINVAL; } - if (WARN_ON(DAVINCI_N_GPIO < ngpio)) - ngpio = DAVINCI_N_GPIO; + if (WARN_ON(ARCH_NR_GPIOS < ngpio)) + ngpio = ARCH_NR_GPIOS; chips = devm_kzalloc(dev, ngpio * sizeof(struct davinci_gpio_controller), -- cgit v1.2.3 From ee89cf63a1274a597fc2616d575251f88b3072b6 Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Thu, 21 Nov 2013 17:34:36 +0200 Subject: gpio: introduce GPIO_DAVINCI kconfig option The compatible to Davinci GPIO HW block is used by other TI SoCs, like Keystone, where GPIO support is declared as optional. Hence, introduce GPIO_DAVINCI Kconfig option which will allow to enable Davinci GPIO driver for Keystone SoCs when needed. At same time, kept Davinci GPIO driver enabled for Davinci SoCs by default. Signed-off-by: Grygorii Strashko Acked-by: Santosh Shilimkar Acked-by: Linus Walleij Acked-by: Lad, Prabhakar Signed-off-by: Sekhar Nori --- drivers/gpio/Kconfig | 7 +++++++ drivers/gpio/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 0f0444475bf0..7c75f5a442b0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -115,6 +115,13 @@ config GPIO_CLPS711X help Say yes here to support GPIO on CLPS711X SoCs. +config GPIO_DAVINCI + bool "TI Davinci/Keystone GPIO support" + default y if ARCH_DAVINCI + depends on ARM && (ARCH_DAVINCI || ARCH_KEYSTONE) + help + Say yes here to enable GPIO support for TI Davinci/Keystone SoCs. + config GPIO_GENERIC_PLATFORM tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" select GPIO_GENERIC diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 7971e36b8b12..28a0ffc12c87 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -22,7 +22,7 @@ obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o -obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o +obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_EM) += gpio-em.o obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o -- cgit v1.2.3 From 9211ff3140f24f6372f4627fc8b473aa08249104 Mon Sep 17 00:00:00 2001 From: Lad, Prabhakar Date: Thu, 21 Nov 2013 23:45:27 +0530 Subject: gpio: davinci: convert to use irqdomain support. Convert the davinci gpio driver to use irqdomain support. Signed-off-by: Lad, Prabhakar [grygorii.strashko@ti.com: - switch to use one irq-domain per all GPIO banks - keep irq_create_mapping() call in gpio_to_irq_banked() as it simply transformed to irq_find_mapping() if IRQ mapping exist already] Signed-off-by: Grygorii Strashko Acked-by: Linus Walleij Signed-off-by: Sekhar Nori --- drivers/gpio/gpio-davinci.c | 80 ++++++++++++++++++------------ include/linux/platform_data/gpio-davinci.h | 2 +- 2 files changed, 48 insertions(+), 34 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 23c187c01659..92d9922cfcc7 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -282,8 +283,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); while (1) { u32 status; - int n; - int res; + int bit; /* ack any irqs */ status = readl_relaxed(&g->intstat) & mask; @@ -292,17 +292,13 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) writel_relaxed(status, &g->intstat); /* now demux them to the right lowlevel handler */ - n = d->irq_base; - if (irq & 1) { - n += 16; - status >>= 16; - } while (status) { - res = ffs(status); - n += res; - generic_handle_irq(n - 1); - status >>= res; + bit = __ffs(status); + status &= ~BIT(bit); + generic_handle_irq( + irq_find_mapping(d->irq_domain, + d->chip.base + bit)); } } desc->irq_data.chip->irq_unmask(&desc->irq_data); @@ -313,10 +309,7 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) { struct davinci_gpio_controller *d = chip2controller(chip); - if (d->irq_base >= 0) - return d->irq_base + offset; - else - return -ENODEV; + return irq_create_mapping(d->irq_domain, d->chip.base + offset); } static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) @@ -354,6 +347,27 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger) return 0; } +static int +davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + struct davinci_gpio_regs __iomem *g = gpio2regs(hw); + + irq_set_chip_and_handler_name(irq, &gpio_irqchip, handle_simple_irq, + "davinci_gpio"); + irq_set_irq_type(irq, IRQ_TYPE_NONE); + irq_set_chip_data(irq, (__force void *)g); + irq_set_handler_data(irq, (void *)__gpio_mask(hw)); + set_irq_flags(irq, IRQF_VALID); + + return 0; +} + +static const struct irq_domain_ops davinci_gpio_irq_ops = { + .map = davinci_gpio_irq_map, + .xlate = irq_domain_xlate_onetwocell, +}; + /* * NOTE: for suspend/resume, probably best to make a platform_device with * suspend_late/resume_resume calls hooking into results of the set_wake() @@ -373,6 +387,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) struct davinci_gpio_controller *chips = platform_get_drvdata(pdev); struct davinci_gpio_platform_data *pdata = dev->platform_data; struct davinci_gpio_regs __iomem *g; + struct irq_domain *irq_domain; ngpio = pdata->ngpio; res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); @@ -396,6 +411,20 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) } clk_prepare_enable(clk); + irq = irq_alloc_descs(-1, 0, ngpio, 0); + if (irq < 0) { + dev_err(dev, "Couldn't allocate IRQ numbers\n"); + return irq; + } + + irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0, + &davinci_gpio_irq_ops, + chips); + if (!irq_domain) { + dev_err(dev, "Couldn't register an IRQ domain\n"); + return -ENODEV; + } + /* * Arrange gpio_to_irq() support, handling either direct IRQs or * banked IRQs. Having GPIOs in the first GPIO bank use direct @@ -404,9 +433,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) */ for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { chips[bank].chip.to_irq = gpio_to_irq_banked; - chips[bank].irq_base = pdata->gpio_unbanked - ? -EINVAL - : (pdata->intc_irq_num + gpio); + if (!pdata->gpio_unbanked) + chips[bank].irq_domain = irq_domain; } /* @@ -449,11 +477,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we * then chain through our own handler. */ - for (gpio = 0, irq = gpio_to_irq(0), bank = 0; - gpio < ngpio; - bank++, bank_irq++) { - unsigned i; - + for (gpio = 0, bank = 0; gpio < ngpio; bank++, bank_irq++, gpio += 16) { /* disabled by default, enabled only as needed */ g = gpio2regs(gpio); writel_relaxed(~0, &g->clr_falling); @@ -469,14 +493,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) */ irq_set_handler_data(bank_irq, &chips[gpio / 32]); - for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { - irq_set_chip(irq, &gpio_irqchip); - irq_set_chip_data(irq, (__force void *)g); - irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); - irq_set_handler(irq, handle_simple_irq); - set_irq_flags(irq, IRQF_VALID); - } - binten |= BIT(bank); } @@ -487,8 +503,6 @@ done: */ writel_relaxed(binten, gpio_base + BINTEN); - printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); - return 0; } diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h index 6efd20264585..0c3551bb671f 100644 --- a/include/linux/platform_data/gpio-davinci.h +++ b/include/linux/platform_data/gpio-davinci.h @@ -34,7 +34,7 @@ struct davinci_gpio_platform_data { struct davinci_gpio_controller { struct gpio_chip chip; - int irq_base; + struct irq_domain *irq_domain; /* Serialize access to GPIO registers */ spinlock_t lock; void __iomem *regs; -- cgit v1.2.3 From c770844c3e30bed3c269efff1bbb9a14c2318e39 Mon Sep 17 00:00:00 2001 From: KV Sujith Date: Thu, 21 Nov 2013 23:45:29 +0530 Subject: gpio: davinci: add OF support This patch adds OF parser support for davinci gpio driver and also appropriate documentation in gpio-davinci.txt located at Documentation/devicetree/bindings/gpio/. Acked-by: Linus Walleij Acked-by: Rob Herring Signed-off-by: KV Sujith Signed-off-by: Philip Avinash [prabhakar.csengg@gmail.com: simplified the OF code, removed unnecessary DT property and also simplified the commit message] Signed-off-by: Lad, Prabhakar Signed-off-by: Sekhar Nori --- .../devicetree/bindings/gpio/gpio-davinci.txt | 41 ++++++++++++++++ drivers/gpio/gpio-davinci.c | 57 ++++++++++++++++++++-- 2 files changed, 95 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-davinci.txt (limited to 'drivers/gpio') diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt new file mode 100644 index 000000000000..a2e839d6e338 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt @@ -0,0 +1,41 @@ +Davinci GPIO controller bindings + +Required Properties: +- compatible: should be "ti,dm6441-gpio" + +- reg: Physical base address of the controller and the size of memory mapped + registers. + +- gpio-controller : Marks the device node as a gpio controller. + +- interrupt-parent: phandle of the parent interrupt controller. + +- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are + supported at a time. + +- ti,ngpio: The number of GPIO pins supported. + +- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt + line to processor. + +The GPIO controller also acts as an interrupt controller. It uses the default +two cells specifier as described in Documentation/devicetree/bindings/ +interrupt-controller/interrupts.txt. + +Example: + +gpio: gpio@1e26000 { + compatible = "ti,dm6441-gpio"; + gpio-controller; + reg = <0x226000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH + 44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH + 46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH + 48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH + 50 IRQ_TYPE_EDGE_BOTH>; + ti,ngpio = <144>; + ti,davinci-gpio-unbanked = <0>; + interrupt-controller; + #interrupt-cells = <2>; +}; diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 92d9922cfcc7..37cf95254df1 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -17,6 +17,9 @@ #include #include #include +#include +#include +#include #include #include @@ -134,6 +137,40 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); } +static struct davinci_gpio_platform_data * +davinci_gpio_get_pdata(struct platform_device *pdev) +{ + struct device_node *dn = pdev->dev.of_node; + struct davinci_gpio_platform_data *pdata; + int ret; + u32 val; + + if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) + return pdev->dev.platform_data; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + ret = of_property_read_u32(dn, "ti,ngpio", &val); + if (ret) + goto of_err; + + pdata->ngpio = val; + + ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked", &val); + if (ret) + goto of_err; + + pdata->gpio_unbanked = val; + + return pdata; + +of_err: + dev_err(&pdev->dev, "Populating pdata from DT failed: err %d\n", ret); + return NULL; +} + static int davinci_gpio_probe(struct platform_device *pdev) { int i, base; @@ -144,12 +181,14 @@ static int davinci_gpio_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct resource *res; - pdata = dev->platform_data; + pdata = davinci_gpio_get_pdata(pdev); if (!pdata) { dev_err(dev, "No platform data found\n"); return -EINVAL; } + dev->platform_data = pdata; + /* * The gpio banks conceptually expose a segmented bitmap, * and "ngpio" is one more than the largest zero-based @@ -195,6 +234,9 @@ static int davinci_gpio_probe(struct platform_device *pdev) if (chips[i].chip.ngpio > 32) chips[i].chip.ngpio = 32; +#ifdef CONFIG_OF_GPIO + chips[i].chip.of_node = dev->of_node; +#endif spin_lock_init(&chips[i].lock); regs = gpio2regs(base); @@ -506,11 +548,20 @@ done: return 0; } +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id davinci_gpio_ids[] = { + { .compatible = "ti,dm6441-gpio", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, davinci_gpio_ids); +#endif + static struct platform_driver davinci_gpio_driver = { .probe = davinci_gpio_probe, .driver = { - .name = "davinci_gpio", - .owner = THIS_MODULE, + .name = "davinci_gpio", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(davinci_gpio_ids), }, }; -- cgit v1.2.3 From 0d978eb7349941139241a99acf05de6dd49b78d1 Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Tue, 26 Nov 2013 21:40:09 +0200 Subject: gpio: davinci: use chained_irq_enter/chained_irq_exit API It's unsafe to call IRQ chip callbacks (.irq_mask/irq_unmask/irq_ack) from chained IRQ handler directly. Because, Davinci GPIO block is used by different SoCs, which, in turn, have different Main IRQ controllers (Davinci - aintc, cp-intc; Keystone - arm-gic) which may introduce diffrent set of IRQ chip callbacks. As result, call of gpio_irq_handler() on Keysone will simply cause crash the system, because ARM-GIC implements .irq_eoi() instead of .irq_ack(). Hence, fix it by using Kernel chained_irq_enter/chained_irq_exit APIs as they are intended to handle exact such cases. Signed-off-by: Grygorii Strashko Acked-by: Linus Walleij Acked-by: Santosh Shilimkar Signed-off-by: Sekhar Nori --- drivers/gpio/gpio-davinci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 37cf95254df1..5d163c0d0a74 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -22,6 +22,7 @@ #include #include #include +#include struct davinci_gpio_regs { u32 dir; @@ -321,8 +322,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ - desc->irq_data.chip->irq_mask(&desc->irq_data); - desc->irq_data.chip->irq_ack(&desc->irq_data); + chained_irq_enter(irq_desc_get_chip(desc), desc); while (1) { u32 status; int bit; @@ -343,7 +343,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) d->chip.base + bit)); } } - desc->irq_data.chip->irq_unmask(&desc->irq_data); + chained_irq_exit(irq_desc_get_chip(desc), desc); /* now it may re-trigger */ } -- cgit v1.2.3 From 6075a8b2b6c32ddcb99b85189ae41ab2903e560f Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Wed, 18 Dec 2013 12:07:51 +0200 Subject: gpio: davinci: don't create irq_domain in case of unbanked irqs The system may crash if: - there are more than 1 banks - unbanked irqs are enabled - someone will call gpio_to_irq() for GPIO from bank2 or above Hence, fix it by not creating irq_domain if unbanked irqs are enabled and correct gpio_to_irq_banked() to handle this properly. Cc: Linus Walleij Cc: Alexandre Courbot Cc: Sekhar Nori Acked-by: Santosh Shilimkar Acked-by: Linus Walleij Acked-by: Lad, Prabhakar Signed-off-by: Grygorii Strashko Signed-off-by: Sekhar Nori --- drivers/gpio/gpio-davinci.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 5d163c0d0a74..7629b4f12b7f 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -351,7 +351,10 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) { struct davinci_gpio_controller *d = chip2controller(chip); - return irq_create_mapping(d->irq_domain, d->chip.base + offset); + if (d->irq_domain) + return irq_create_mapping(d->irq_domain, d->chip.base + offset); + else + return -ENXIO; } static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) @@ -429,7 +432,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) struct davinci_gpio_controller *chips = platform_get_drvdata(pdev); struct davinci_gpio_platform_data *pdata = dev->platform_data; struct davinci_gpio_regs __iomem *g; - struct irq_domain *irq_domain; + struct irq_domain *irq_domain = NULL; ngpio = pdata->ngpio; res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); @@ -453,18 +456,20 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) } clk_prepare_enable(clk); - irq = irq_alloc_descs(-1, 0, ngpio, 0); - if (irq < 0) { - dev_err(dev, "Couldn't allocate IRQ numbers\n"); - return irq; - } + if (!pdata->gpio_unbanked) { + irq = irq_alloc_descs(-1, 0, ngpio, 0); + if (irq < 0) { + dev_err(dev, "Couldn't allocate IRQ numbers\n"); + return irq; + } - irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0, - &davinci_gpio_irq_ops, - chips); - if (!irq_domain) { - dev_err(dev, "Couldn't register an IRQ domain\n"); - return -ENODEV; + irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0, + &davinci_gpio_irq_ops, + chips); + if (!irq_domain) { + dev_err(dev, "Couldn't register an IRQ domain\n"); + return -ENODEV; + } } /* @@ -475,8 +480,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) */ for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { chips[bank].chip.to_irq = gpio_to_irq_banked; - if (!pdata->gpio_unbanked) - chips[bank].irq_domain = irq_domain; + chips[bank].irq_domain = irq_domain; } /* -- cgit v1.2.3