From ca8cc0fe0e55866dee5009aff5f4740b5daf790b Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Tue, 12 Jul 2016 15:46:14 +0800 Subject: mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly Disable DLL delay line settings explicitly during driver initialization in case ROM/uBoot had set an invalid delay. e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021, the uSDHC clock timing will become marginal when works on DDR mode due to default delay and will possibly see CRC errors in case the board is not perfectly designed on the eMMC chip layout. Acked-by: Adrian Hunter Signed-off-by: Dong Aisheng Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/mmc/host/sdhci-esdhc-imx.c') diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 91c6a6864e15..874d5105f83c 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) */ writel(readl(host->ioaddr + 0x6c) | BIT(7), host->ioaddr + 0x6c); + + /* disable DLL_CTRL delay line settings */ + writel(0x0, host->ioaddr + ESDHC_DLL_CTRL); } if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) -- cgit v1.2.3