From 3586b02663f098a9b0a3df13bcb3ea2d67635562 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 21 Jul 2022 12:31:26 +0200 Subject: pwm: sifive: Enable clk only after period check in .apply() For the period check and the initial calculations of register values there is no hardware access needed. So delay enabling the clk a bit to simplify the code flow a bit. Signed-off-by: Uwe Kleine-König Tested-by: Emil Renner Berthing Signed-off-by: Thierry Reding --- drivers/pwm/pwm-sifive.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) (limited to 'drivers/pwm') diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index 6017e311a879..d833536b5e7a 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -139,12 +139,6 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->polarity != PWM_POLARITY_INVERSED) return -EINVAL; - ret = clk_enable(ddata->clk); - if (ret) { - dev_err(ddata->chip.dev, "Enable clk failed\n"); - return ret; - } - cur_state = pwm->state; enabled = cur_state.enabled; @@ -167,14 +161,19 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->period != ddata->approx_period) { if (ddata->user_count != 1) { mutex_unlock(&ddata->lock); - ret = -EBUSY; - goto exit; + return -EBUSY; } ddata->approx_period = state->period; pwm_sifive_update_clock(ddata, clk_get_rate(ddata->clk)); } mutex_unlock(&ddata->lock); + ret = clk_enable(ddata->clk); + if (ret) { + dev_err(ddata->chip.dev, "Enable clk failed\n"); + return ret; + } + writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); if (state->enabled != enabled) { @@ -186,9 +185,8 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, } } -exit: clk_disable(ddata->clk); - return ret; + return 0; } static const struct pwm_ops pwm_sifive_ops = { -- cgit v1.2.3