From 8bb6617427761c04b9670f8554fa63a1ef2d2807 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Tue, 14 Apr 2020 13:43:25 +0900 Subject: riscv: K210: Add a built-in device tree The K210's bootloader does not provide a device tree. Give the ability to providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option. If selected, this option result in the definition of a builtin DTB entry in the k210 sysctl driver. If defined, the builtin DTB entry points to the default k210.dts device tree file and is keyed with the vendor ID 0x4B5, the arch ID 0xE59889E6A5A04149 ("Canaan AI" in UTF-8 coded Chinese) and the impl ID 0x4D41495832303030 ("MAIX200"). These values are reported by the SiPEED MAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board. [Thanks to Damien for the K210 IDs] Signed-off-by: Damien Le Moal Signed-off-by: Palmer Dabbelt --- drivers/soc/kendryte/k210-sysctl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers/soc') diff --git a/drivers/soc/kendryte/k210-sysctl.c b/drivers/soc/kendryte/k210-sysctl.c index 4608fbca20e1..707019223dd8 100644 --- a/drivers/soc/kendryte/k210-sysctl.c +++ b/drivers/soc/kendryte/k210-sysctl.c @@ -246,3 +246,15 @@ static void __init k210_soc_early_init(const void *fdt) iounmap(regs); } SOC_EARLY_INIT_DECLARE(generic_k210, "kendryte,k210", k210_soc_early_init); + +#ifdef CONFIG_SOC_KENDRYTE_K210_DTB_BUILTIN +/* + * Generic entry for the default k210.dtb embedded DTB for boards with: + * - Vendor ID: 0x4B5 + * - Arch ID: 0xE59889E6A5A04149 (= "Canaan AI" in UTF-8 encoded Chinese) + * - Impl ID: 0x4D41495832303030 (= "MAIX2000") + * These values are reported by the SiPEED MAXDUINO, SiPEED MAIX GO and + * SiPEED Dan dock boards. + */ +SOC_BUILTIN_DTB_DECLARE(k210, 0x4B5, 0xE59889E6A5A04149, 0x4D41495832303030); +#endif -- cgit v1.2.3 From 4a3a37331248d85df9e05e9b1d8210dc5ec81f4e Mon Sep 17 00:00:00 2001 From: Yash Shah Date: Thu, 20 Feb 2020 10:45:19 +0530 Subject: riscv: Add support to determine no. of L2 cache way enabled In order to determine the number of L2 cache ways enabled at runtime, implement a private attribute ("number_of_ways_enabled"). Reading this attribute returns the number of enabled L2 cache ways at runtime. Using riscv_set_cacheinfo_ops() hook a custom function, that returns this private attribute, to the generic ops structure which is used by cache_get_priv_group() in cacheinfo framework. Signed-off-by: Yash Shah Reviewed-by: Anup Patel Signed-off-by: Palmer Dabbelt --- drivers/soc/sifive/sifive_l2_cache.c | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'drivers/soc') diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c index a5069394cd61..d5f266551880 100644 --- a/drivers/soc/sifive/sifive_l2_cache.c +++ b/drivers/soc/sifive/sifive_l2_cache.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #define SIFIVE_L2_DIRECCFIX_LOW 0x100 @@ -31,6 +33,7 @@ static void __iomem *l2_base; static int g_irq[SIFIVE_L2_MAX_ECCINTR]; +static struct riscv_cacheinfo_ops l2_cache_ops; enum { DIR_CORR = 0, @@ -107,6 +110,38 @@ int unregister_sifive_l2_error_notifier(struct notifier_block *nb) } EXPORT_SYMBOL_GPL(unregister_sifive_l2_error_notifier); +static int l2_largest_wayenabled(void) +{ + return readl(l2_base + SIFIVE_L2_WAYENABLE) & 0xFF; +} + +static ssize_t number_of_ways_enabled_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%u\n", l2_largest_wayenabled()); +} + +static DEVICE_ATTR_RO(number_of_ways_enabled); + +static struct attribute *priv_attrs[] = { + &dev_attr_number_of_ways_enabled.attr, + NULL, +}; + +static const struct attribute_group priv_attr_group = { + .attrs = priv_attrs, +}; + +const struct attribute_group *l2_get_priv_group(struct cacheinfo *this_leaf) +{ + /* We want to use private group for L2 cache only */ + if (this_leaf->level == 2) + return &priv_attr_group; + else + return NULL; +} + static irqreturn_t l2_int_handler(int irq, void *device) { unsigned int add_h, add_l; @@ -170,6 +205,9 @@ static int __init sifive_l2_init(void) l2_config_read(); + l2_cache_ops.get_priv_group = l2_get_priv_group; + riscv_set_cacheinfo_ops(&l2_cache_ops); + #ifdef CONFIG_DEBUG_FS setup_sifive_debug(); #endif -- cgit v1.2.3 From b4a4f036e84662bb5fca53ed09d65ac4f736be67 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Thu, 28 May 2020 14:18:12 -0700 Subject: soc: sifive: l2 cache: Eliminate an unsigned zero compare warning GCC warns about this comparison, which is unnecessary. Signed-off-by: Palmer Dabbelt --- drivers/soc/sifive/sifive_l2_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/soc') diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c index d5f266551880..51e198880a8d 100644 --- a/drivers/soc/sifive/sifive_l2_cache.c +++ b/drivers/soc/sifive/sifive_l2_cache.c @@ -51,7 +51,7 @@ static ssize_t l2_write(struct file *file, const char __user *data, if (kstrtouint_from_user(data, count, 0, &val)) return -EINVAL; - if ((val >= 0 && val < 0xFF) || (val >= 0x10000 && val < 0x100FF)) + if ((val < 0xFF) || (val >= 0x10000 && val < 0x100FF)) writel(val, l2_base + SIFIVE_L2_ECCINJECTERR); else return -EINVAL; -- cgit v1.2.3 From 09c0533d129ce460e6214c14f744ddbac3733889 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Thu, 28 May 2020 15:39:20 -0700 Subject: soc: sifive: l2 cache: Mark l2_get_priv_group as static The kbuild test robot is firing a warning over a missing prototype. The function can just be static. Reported-by: kbuild test robot Signed-off-by: Palmer Dabbelt --- drivers/soc/sifive/sifive_l2_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/soc') diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c index 51e198880a8d..44d7e1951da3 100644 --- a/drivers/soc/sifive/sifive_l2_cache.c +++ b/drivers/soc/sifive/sifive_l2_cache.c @@ -133,7 +133,7 @@ static const struct attribute_group priv_attr_group = { .attrs = priv_attrs, }; -const struct attribute_group *l2_get_priv_group(struct cacheinfo *this_leaf) +static const struct attribute_group *l2_get_priv_group(struct cacheinfo *this_leaf) { /* We want to use private group for L2 cache only */ if (this_leaf->level == 2) -- cgit v1.2.3