From 730bc8ba5e9ec103065142975015a793558f09a0 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Thu, 28 Jul 2022 11:14:55 -0500 Subject: spi: spi-gxp: Add support for HPE GXP SoCs The GXP supports 3 separate SPI interfaces to accommodate the system flash, core flash, and other functions. The SPI engine supports variable clock frequency, selectable 3-byte or 4-byte addressing and a configurable x1, x2, and x4 command/address/data modes. The memory buffer for reading and writing ranges between 256 bytes and 8KB. This driver supports access to the core flash and bios part. Signed-off-by: Nick Hawkins Link: https://lore.kernel.org/r/20220728161459.7738-2-nick.hawkins@hpe.com Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/spi/Kconfig') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 2d034459e79f..9987c3f2bd1c 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -371,6 +371,13 @@ config SPI_FSL_QUADSPI This controller does not support generic SPI messages. It only supports the high-level SPI memory interface. +config SPI_GXP + tristate "GXP SPI driver" + depends on ARCH_HPE || COMPILE_TEST + help + This enables support for the driver for GXP bus attached SPI + controllers. + config SPI_HISI_KUNPENG tristate "HiSilicon SPI Controller for Kunpeng SoCs" depends on (ARM64 && ACPI) || COMPILE_TEST -- cgit v1.2.3