From 0486d9f91d373e7f47276f30898ee0cb12656a70 Mon Sep 17 00:00:00 2001 From: leilk.liu Date: Sun, 7 Feb 2021 11:09:52 +0800 Subject: spi: support CS timing for HW & SW mode this patch supports the controller's HW CS and SW CS via use cs_gpio. Signed-off-by: leilk.liu Link: https://lore.kernel.org/r/20210207030953.9297-3-leilk.liu@mediatek.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 21ea3e8a00e2..a247fcac0dc7 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -810,7 +810,8 @@ static void spi_set_cs(struct spi_device *spi, bool enable) spi->controller->last_cs_enable = enable; spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH; - if (!spi->controller->set_cs_timing) { + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) || + !spi->controller->set_cs_timing) { if (enable1) spi_delay_exec(&spi->controller->cs_setup, NULL); else @@ -841,7 +842,8 @@ static void spi_set_cs(struct spi_device *spi, bool enable) spi->controller->set_cs(spi, !enable); } - if (!spi->controller->set_cs_timing) { + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) || + !spi->controller->set_cs_timing) { if (!enable1) spi_delay_exec(&spi->controller->cs_inactive, NULL); } @@ -3464,7 +3466,8 @@ int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup, size_t len; int status; - if (spi->controller->set_cs_timing) { + if (spi->controller->set_cs_timing && + !(spi->cs_gpiod || gpio_is_valid(spi->cs_gpio))) { if (spi->controller->auto_runtime_pm) { status = pm_runtime_get_sync(parent); if (status < 0) { -- cgit v1.2.3