From f4ac6476945ff62939420bcf8266e39f8d5d54bd Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 14 Sep 2017 12:35:36 +0200 Subject: libata: Add new med_power_with_dipm link_power_management_policy setting As described by Matthew Garret quite a while back: https://mjg59.dreamwidth.org/34868.html Intel CPUs starting with the Haswell generation need SATA links to power down for the "package" part of the CPU to reach low power-states like PC7 / P8 which bring a significant power-saving with them. The default max_performance lpm policy does not allow for these high PC states, both the medium_power and min_power policies do allow this. The min_power policy saves significantly more power, but there are some reports of some disks / SSDs not liking min_power leading to system crashes and in some cases even data corruption has been reported. Matthew has found a document documenting the default settings of Intel's IRST Windows driver with which most laptops ship: https://www-ssl.intel.com/content/dam/doc/reference-guide/sata-devices-implementation-recommendations.pdf Matthew wrote a patch changing med_power to match those defaults, but that never got anywhere as some people where reporting issues with the patch-set that patch was a part of. This commit is another attempt to make the default IRST driver settings available under Linux, but instead of changing medium_power and potentially introducing regressions, this commit adds a new med_power_with_dipm setting which is identical to the existing medium_power accept that it enables dipm on top, which makes it match the Windows IRST driver settings, which should hopefully be safe to use on most devices. The med_power_with_dipm setting is close to min_power, except that: a) It does not use host-initiated slumber mode (ASP not set), but it does allow device-initiated slumber b) It does not enable DevSlp mode On my T440s test laptop I get the following power savings when idle: medium_power 0.9W med_power_with_dipm 1.2W min_power 1.2W Suggested-by: Matthew Garrett Cc: Matthew Garrett Signed-off-by: Hans de Goede Signed-off-by: Tejun Heo --- drivers/ata/libata-core.c | 1 + drivers/ata/libata-eh.c | 10 +++++----- drivers/ata/libata-scsi.c | 9 +++++---- 3 files changed, 11 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index ee4c1ec9dca0..65f7574afc55 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -3964,6 +3964,7 @@ int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy, scontrol &= ~(0x1 << 8); scontrol |= (0x6 << 8); break; + case ATA_LPM_MED_POWER_WITH_DIPM: case ATA_LPM_MIN_POWER: if (ata_link_nr_enabled(link) > 0) /* no restrictions on LPM transitions */ diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index e4effef0c83f..49b3745d2c1f 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c @@ -3454,9 +3454,9 @@ static int ata_eh_maybe_retry_flush(struct ata_device *dev) * @r_failed_dev: out parameter for failed device * * Enable SATA Interface power management. This will enable - * Device Interface Power Management (DIPM) for min_power - * policy, and then call driver specific callbacks for - * enabling Host Initiated Power management. + * Device Interface Power Management (DIPM) for min_power and + * medium_power_with_dipm policies, and then call driver specific + * callbacks for enabling Host Initiated Power management. * * LOCKING: * EH context. @@ -3502,7 +3502,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, hints &= ~ATA_LPM_HIPM; /* disable DIPM before changing link config */ - if (policy != ATA_LPM_MIN_POWER && dipm) { + if (policy < ATA_LPM_MED_POWER_WITH_DIPM && dipm) { err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_DISABLE, SATA_DIPM); if (err_mask && err_mask != AC_ERR_DEV) { @@ -3545,7 +3545,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, /* host config updated, enable DIPM if transitioning to MIN_POWER */ ata_for_each_dev(dev, link, ENABLED) { - if (policy == ATA_LPM_MIN_POWER && !no_dipm && + if (policy >= ATA_LPM_MED_POWER_WITH_DIPM && !no_dipm && ata_id_has_dipm(dev->id)) { err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE, SATA_DIPM); diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 44ba292f2cd7..673e72f438eb 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -106,10 +106,11 @@ static const u8 def_control_mpage[CONTROL_MPAGE_LEN] = { }; static const char *ata_lpm_policy_names[] = { - [ATA_LPM_UNKNOWN] = "max_performance", - [ATA_LPM_MAX_POWER] = "max_performance", - [ATA_LPM_MED_POWER] = "medium_power", - [ATA_LPM_MIN_POWER] = "min_power", + [ATA_LPM_UNKNOWN] = "max_performance", + [ATA_LPM_MAX_POWER] = "max_performance", + [ATA_LPM_MED_POWER] = "medium_power", + [ATA_LPM_MED_POWER_WITH_DIPM] = "med_power_with_dipm", + [ATA_LPM_MIN_POWER] = "min_power", }; static ssize_t ata_scsi_lpm_store(struct device *device, -- cgit v1.2.3 From 01bb12e49b85ee99fa8445cbbc450092cd34afc9 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 14 Sep 2017 19:54:18 +0100 Subject: ata: pata_artop: remove redundant initialization of pio pio is initialized and the data is never read, instead it is almost immediately being updated to a new value. Fix this by removing the initialization. Detected by scan-build: "warning: Value stored to 'pio' during its initialization is never read" Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers") Signed-off-by: Colin Ian King Signed-off-by: Tejun Heo --- drivers/ata/pata_artop.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c index 96c05c9494fa..6b3355343542 100644 --- a/drivers/ata/pata_artop.c +++ b/drivers/ata/pata_artop.c @@ -242,7 +242,7 @@ static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev) static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) { - unsigned int pio = adev->pio_mode - XFER_PIO_0; + unsigned int pio; struct pci_dev *pdev = to_pci_dev(ap->host->dev); u8 ultra; -- cgit v1.2.3 From e94f7914fa8731cc64260c0a3a0b7b9957523730 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Tue, 19 Sep 2017 09:39:52 +0100 Subject: libata: make static arrays const, reduces object code size Don't populate const arrayis on the stack, instead make them static. Makes the object code smaller by over 260 bytes: Before: text data bss dec hex filename 64864 5948 4128 74940 124bc drivers/ata/libata-scsi.o After: text data bss dec hex filename 64183 6364 4128 74675 123b3 drivers/ata/libata-scsi.o Signed-off-by: Colin Ian King Signed-off-by: Tejun Heo --- drivers/ata/libata-scsi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 673e72f438eb..66be961c93a4 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -2146,7 +2146,7 @@ static void ata_scsi_rbuf_fill(struct ata_scsi_args *args, */ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) { - const u8 versions[] = { + static const u8 versions[] = { 0x00, 0x60, /* SAM-3 (no version claimed) */ @@ -2156,7 +2156,7 @@ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) 0x03, 0x00 /* SPC-3 (no version claimed) */ }; - const u8 versions_zbc[] = { + static const u8 versions_zbc[] = { 0x00, 0xA0, /* SAM-5 (no version claimed) */ @@ -2228,7 +2228,7 @@ static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf) static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf) { int num_pages; - const u8 pages[] = { + static const u8 pages[] = { 0x00, /* page 0x00, this page */ 0x80, /* page 0x80, unit serial no page */ 0x83, /* page 0x83, device ident page */ @@ -2259,7 +2259,7 @@ static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf) */ static unsigned int ata_scsiop_inq_80(struct ata_scsi_args *args, u8 *rbuf) { - const u8 hdr[] = { + static const u8 hdr[] = { 0, 0x80, /* this page code */ 0, @@ -2581,7 +2581,7 @@ static unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf) { struct ata_device *dev = args->dev; u8 *scsicmd = args->cmd->cmnd, *p = rbuf; - const u8 sat_blk_desc[] = { + static const u8 sat_blk_desc[] = { 0, 0, 0, 0, /* number of blocks: sat unspecified */ 0, 0, 0x2, 0x0 /* block length: 512 bytes */ -- cgit v1.2.3 From 8df82c13a3756f831b0d748226ce932515728e04 Mon Sep 17 00:00:00 2001 From: Bhumika Goyal Date: Sat, 30 Sep 2017 22:10:40 +0530 Subject: libata: make ata_port_type const Make this const as it is only stored in the const field of a device structure. Make the declaration in header const too. Structure found using Coccinelle and changes done by hand. Signed-off-by: Bhumika Goyal Signed-off-by: Tejun Heo --- drivers/ata/libata-core.c | 2 +- drivers/ata/libata.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 65f7574afc55..29e351669353 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -5824,7 +5824,7 @@ void ata_host_resume(struct ata_host *host) } #endif -struct device_type ata_port_type = { +const struct device_type ata_port_type = { .name = "ata_port", #ifdef CONFIG_PM .pm = &ata_port_pm_ops, diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h index 839d487394b7..18bf1e995a18 100644 --- a/drivers/ata/libata.h +++ b/drivers/ata/libata.h @@ -51,7 +51,7 @@ extern int atapi_passthru16; extern int libata_fua; extern int libata_noacpi; extern int libata_allow_tpm; -extern struct device_type ata_port_type; +extern const struct device_type ata_port_type; extern struct ata_link *ata_dev_phys_link(struct ata_device *dev); extern void ata_force_cbl(struct ata_port *ap); extern u64 ata_tf_to_lba(const struct ata_taskfile *tf); -- cgit v1.2.3 From 03b623fbc5d8d24d45d4e8cd4ba245b0170891f3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 4 Oct 2017 14:13:07 +0200 Subject: ata: sata_rcar: Use of_device_get_match_data() helper Use the of_device_get_match_data() helper instead of open coding. Note that the sata_rcar driver is used with DT only, so there's always a valid match. Signed-off-by: Geert Uytterhoeven Acked-by: Sergei Shtylyov Signed-off-by: Tejun Heo --- drivers/ata/sata_rcar.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c index 537d11869069..80ee2f2a50d0 100644 --- a/drivers/ata/sata_rcar.c +++ b/drivers/ata/sata_rcar.c @@ -872,7 +872,6 @@ MODULE_DEVICE_TABLE(of, sata_rcar_match); static int sata_rcar_probe(struct platform_device *pdev) { - const struct of_device_id *of_id; struct ata_host *host; struct sata_rcar_priv *priv; struct resource *mem; @@ -888,11 +887,7 @@ static int sata_rcar_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - of_id = of_match_device(sata_rcar_match, &pdev->dev); - if (!of_id) - return -ENODEV; - - priv->type = (enum sata_rcar_type)of_id->data; + priv->type = (enum sata_rcar_type)of_device_get_match_data(&pdev->dev); priv->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(priv->clk)) { dev_err(&pdev->dev, "failed to get access to sata clock\n"); -- cgit v1.2.3 From b1314e3f85b36ce1311d7242085f6dd93709c694 Mon Sep 17 00:00:00 2001 From: Radha Mohan Chintakuntla Date: Tue, 10 Oct 2017 22:37:51 -0700 Subject: ahci: Add support for Cavium's fifth generation SATA controller This patch adds support for Cavium's fifth generation SATA controller. It is an on-chip controller and complies with AHCI 1.3.1. As the controller uses 64-bit addresses it cannot use the standard AHCI BAR5 and so uses BAR4. Signed-off-by: Radha Mohan Chintakuntla Signed-off-by: Tejun Heo --- drivers/ata/ahci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index cb9b0e9090e3..6e26c1c2d18c 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -57,6 +57,7 @@ enum { AHCI_PCI_BAR_STA2X11 = 0, AHCI_PCI_BAR_CAVIUM = 0, AHCI_PCI_BAR_ENMOTUS = 2, + AHCI_PCI_BAR_CAVIUM_GEN5 = 4, AHCI_PCI_BAR_STANDARD = 5, }; @@ -1567,8 +1568,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ahci_pci_bar = AHCI_PCI_BAR_STA2X11; else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) ahci_pci_bar = AHCI_PCI_BAR_ENMOTUS; - else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) - ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; + else if (pdev->vendor == PCI_VENDOR_ID_CAVIUM) { + if (pdev->device == 0xa01c) + ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; + if (pdev->device == 0xa084) + ahci_pci_bar = AHCI_PCI_BAR_CAVIUM_GEN5; + } /* acquire resources */ rc = pcim_enable_device(pdev); -- cgit v1.2.3 From 14d7045c7f3b0a9d3b00274c23d7d516fc6d44d9 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Mon, 16 Oct 2017 12:00:11 +0100 Subject: ata: sata_mv: remove a redundant assignment to pointer ehi The pointer ehi is being assigned to a value that is never read and is redundant. Clean up the code and move the ehi declaration and initialization to the code block where it is used. Cleans up clang warning: Value stored to 'ehi' is never read Signed-off-by: Colin Ian King Signed-off-by: Tejun Heo --- drivers/ata/sata_mv.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 3b2246dded74..dbb62b508213 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -2478,20 +2478,18 @@ static unsigned int mv_get_err_pmp_map(struct ata_port *ap) static void mv_pmp_eh_prep(struct ata_port *ap, unsigned int pmp_map) { - struct ata_eh_info *ehi; unsigned int pmp; /* * Initialize EH info for PMPs which saw device errors */ - ehi = &ap->link.eh_info; for (pmp = 0; pmp_map != 0; pmp++) { unsigned int this_pmp = (1 << pmp); if (pmp_map & this_pmp) { struct ata_link *link = &ap->pmp_link[pmp]; + struct ata_eh_info *ehi = &link->eh_info; pmp_map &= ~this_pmp; - ehi = &link->eh_info; ata_ehi_clear_desc(ehi); ata_ehi_push_desc(ehi, "dev err"); ehi->err_mask |= AC_ERR_DEV; -- cgit v1.2.3 From 05b83605992b3d6cd53f8d339842a3b4530ab6e8 Mon Sep 17 00:00:00 2001 From: Gustavo A. R. Silva Date: Thu, 12 Oct 2017 14:19:16 -0500 Subject: ata: mark expected switch fall-throughs In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. In cases where a "drop through" comment was already in place, I replaced it with a proper "fall through" comment, which is what GCC is expecting to find. Signed-off-by: Gustavo A. R. Silva Signed-off-by: Tejun Heo --- drivers/ata/libahci_platform.c | 1 + drivers/ata/libata-core.c | 3 +++ drivers/ata/libata-eh.c | 2 ++ drivers/ata/pata_atp867x.c | 2 ++ drivers/ata/sata_mv.c | 4 ++-- 5 files changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index a270a1173c8c..341d0ef82cbd 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -295,6 +295,7 @@ static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, node->name); break; } + /* fall through */ case -ENODEV: /* continue normally */ hpriv->phys[port] = NULL; diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 29e351669353..5b1851056ec4 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -1879,6 +1879,7 @@ retry: switch (class) { case ATA_DEV_SEMB: class = ATA_DEV_ATA; /* some hard drives report SEMB sig */ + /* fall through */ case ATA_DEV_ATA: case ATA_DEV_ZAC: tf.command = ATA_CMD_ID_ATA; @@ -2975,6 +2976,7 @@ int ata_bus_probe(struct ata_port *ap) case -ENODEV: /* give it just one more chance */ tries[dev->devno] = min(tries[dev->devno], 1); + /* fall through */ case -EIO: if (tries[dev->devno] == 1) { /* This is the last chance, better to slow @@ -3462,6 +3464,7 @@ int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) case ATA_DNXFER_FORCE_PIO0: pio_mask &= 1; + /* fall through */ case ATA_DNXFER_FORCE_PIO: mwdma_mask = 0; udma_mask = 0; diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index 49b3745d2c1f..e070fe8267ff 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c @@ -3711,9 +3711,11 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) case -ENODEV: /* device missing or wrong IDENTIFY data, schedule probing */ ehc->i.probe_mask |= (1 << dev->devno); + /* fall through */ case -EINVAL: /* give it just one more chance */ ehc->tries[dev->devno] = min(ehc->tries[dev->devno], 1); + /* fall through */ case -EIO: if (ehc->tries[dev->devno] == 1) { /* This is the last chance, better to slow diff --git a/drivers/ata/pata_atp867x.c b/drivers/ata/pata_atp867x.c index 3ea50dc5ea47..3729e2448eb6 100644 --- a/drivers/ata/pata_atp867x.c +++ b/drivers/ata/pata_atp867x.c @@ -171,6 +171,7 @@ static int atp867x_get_active_clocks_shifted(struct ata_port *ap, default: printk(KERN_WARNING "ATP867X: active %dclk is invalid. " "Using 12clk.\n", clk); + /* fall through */ case 9 ... 12: clocks = 7; /* 12 clk */ break; @@ -203,6 +204,7 @@ static int atp867x_get_recover_clocks_shifted(unsigned int clk) default: printk(KERN_WARNING "ATP867X: recover %dclk is invalid. " "Using default 12clk.\n", clk); + /* fall through */ case 12: /* default 12 clk */ clocks = 0; break; diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index dbb62b508213..cc208b72b199 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -2387,7 +2387,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) ": attempting PIO w/multiple DRQ: " "this may fail due to h/w errata\n"); } - /* drop through */ + /* fall through */ case ATA_PROT_NODATA: case ATAPI_PROT_PIO: case ATAPI_PROT_NODATA: @@ -3875,7 +3875,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) " and avoid the final two gigabytes on" " all RocketRAID BIOS initialized drives.\n"); } - /* drop through */ + /* fall through */ case chip_6042: hpriv->ops = &mv6xxx_ops; hp_flags |= MV_HP_GEN_IIE; -- cgit v1.2.3 From fe8365bbf8ac58f98a9a85105a6df468e1a4d489 Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:17 +0200 Subject: ata: ceva: Move sata port phy oob settings to device-tree In SATA Speed negotiation happens with OOB(Out of Band) signals. These OOB signal timing values are configured through vendor specific registers in the SATA controller. These OOB timings depends on the generator and detector clock frequency, which varies from board to board (ex: ep108 and zc1751 has different clock frequencies). To avoid maintaing these OOB settings in the driver, it is better to move these settings to the device-tree node and read from the device-tree. This patch does the same. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 84 +++++++++++++++++++++++++++++++++++-------------- 1 file changed, 61 insertions(+), 23 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index 207649d323c5..59de2ca1885c 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -50,21 +50,6 @@ #define PPCFG_PSS_EN (1 << 29) #define PPCFG_ESDF_EN (1 << 31) -#define PP2C_CIBGMN 0x0F -#define PP2C_CIBGMX (0x25 << 8) -#define PP2C_CIBGN (0x18 << 16) -#define PP2C_CINMP (0x29 << 24) - -#define PP3C_CWBGMN 0x04 -#define PP3C_CWBGMX (0x0B << 8) -#define PP3C_CWBGN (0x08 << 16) -#define PP3C_CWNMP (0x0F << 24) - -#define PP4C_BMX 0x0a -#define PP4C_BNM (0x08 << 8) -#define PP4C_SFD (0x4a << 16) -#define PP4C_PTST (0x06 << 24) - #define PP5C_RIT 0x60216 #define PP5C_RCT (0x7f0 << 20) @@ -87,6 +72,11 @@ struct ceva_ahci_priv { struct platform_device *ahci_pdev; + /* Port Phy2Cfg Register */ + u32 pp2c[NR_PORTS]; + u32 pp3c[NR_PORTS]; + u32 pp4c[NR_PORTS]; + u32 pp5c[NR_PORTS]; int flags; }; @@ -131,20 +121,16 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) writel(tmp, mmio + AHCI_VEND_PPCFG); /* Phy Control OOB timing parameters COMINIT */ - tmp = PP2C_CIBGMN | PP2C_CIBGMX | PP2C_CIBGN | PP2C_CINMP; - writel(tmp, mmio + AHCI_VEND_PP2C); + writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C); /* Phy Control OOB timing parameters COMWAKE */ - tmp = PP3C_CWBGMN | PP3C_CWBGMX | PP3C_CWBGN | PP3C_CWNMP; - writel(tmp, mmio + AHCI_VEND_PP3C); + writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C); /* Phy Control Burst timing setting */ - tmp = PP4C_BMX | PP4C_BNM | PP4C_SFD | PP4C_PTST; - writel(tmp, mmio + AHCI_VEND_PP4C); + writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C); /* Rate Change Timer and Retry Interval Timer setting */ - tmp = PP5C_RIT | PP5C_RCT; - writel(tmp, mmio + AHCI_VEND_PP5C); + writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C); /* Rx Watermark setting */ tmp = PTC_RX_WM_VAL | PTC_RSVD; @@ -187,6 +173,58 @@ static int ceva_ahci_probe(struct platform_device *pdev) if (of_property_read_bool(np, "ceva,broken-gen2")) cevapriv->flags = CEVA_FLAG_BROKEN_GEN2; + /* Read OOB timing value for COMINIT from device-tree */ + if (of_property_read_u8_array(np, "ceva,p0-cominit-params", + (u8 *)&cevapriv->pp2c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-cominit-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-cominit-params", + (u8 *)&cevapriv->pp2c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-cominit-params property not defined\n"); + return -EINVAL; + } + + /* Read OOB timing value for COMWAKE from device-tree*/ + if (of_property_read_u8_array(np, "ceva,p0-comwake-params", + (u8 *)&cevapriv->pp3c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-comwake-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-comwake-params", + (u8 *)&cevapriv->pp3c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-comwake-params property not defined\n"); + return -EINVAL; + } + + /* Read phy BURST timing value from device-tree */ + if (of_property_read_u8_array(np, "ceva,p0-burst-params", + (u8 *)&cevapriv->pp4c[0], 4) < 0) { + dev_warn(dev, "ceva,p0-burst-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u8_array(np, "ceva,p1-burst-params", + (u8 *)&cevapriv->pp4c[1], 4) < 0) { + dev_warn(dev, "ceva,p1-burst-params property not defined\n"); + return -EINVAL; + } + + /* Read phy RETRY interval timing value from device-tree */ + if (of_property_read_u16_array(np, "ceva,p0-retry-params", + (u16 *)&cevapriv->pp5c[0], 2) < 0) { + dev_warn(dev, "ceva,p0-retry-params property not defined\n"); + return -EINVAL; + } + + if (of_property_read_u16_array(np, "ceva,p1-retry-params", + (u16 *)&cevapriv->pp5c[1], 2) < 0) { + dev_warn(dev, "ceva,p1-retry-params property not defined\n"); + return -EINVAL; + } + hpriv->plat_data = cevapriv; /* CEVA specific initialization */ -- cgit v1.2.3 From e8fc8b858cd85de20350bfc72df18306129305b8 Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:18 +0200 Subject: ata: ceva: Add gen 3 mode support in driver This patch sets gen 3 mode as default mode in ahci_ceva driver. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index 59de2ca1885c..aa32c8a0f083 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -60,6 +60,7 @@ #define PORT1_BASE 0x180 /* Port Control Register Bit Definitions */ +#define PORT_SCTL_SPD_GEN3 (0x3 << 4) #define PORT_SCTL_SPD_GEN2 (0x2 << 4) #define PORT_SCTL_SPD_GEN1 (0x1 << 4) #define PORT_SCTL_IPM (0x3 << 8) @@ -136,8 +137,8 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) tmp = PTC_RX_WM_VAL | PTC_RSVD; writel(tmp, mmio + AHCI_VEND_PTC); - /* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */ - tmp = PORT_SCTL_SPD_GEN2 | PORT_SCTL_IPM; + /* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */ + tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM; if (cevapriv->flags & CEVA_FLAG_BROKEN_GEN2) tmp = PORT_SCTL_SPD_GEN1 | PORT_SCTL_IPM; writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); -- cgit v1.2.3 From ff0d63778ca0c2cec9ce33d69b69fe5f8567169b Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:19 +0200 Subject: ata: ceva: Disable Device Sleep capability Since CEVA controller does not support Device Sleep capability, we need to clear that feature by clearing the DEVSLP bit in word78 of IDENTIFY DEVICE data. This patch does the same. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index aa32c8a0f083..b63fab2507fa 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -81,8 +81,26 @@ struct ceva_ahci_priv { int flags; }; +static unsigned int ceva_ahci_read_id(struct ata_device *dev, + struct ata_taskfile *tf, u16 *id) +{ + u32 err_mask; + + err_mask = ata_do_dev_read_id(dev, tf, id); + if (err_mask) + return err_mask; + /* + * Since CEVA controller does not support device sleep feature, we + * need to clear DEVSLP (bit 8) in word78 of the IDENTIFY DEVICE data. + */ + id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8)); + + return 0; +} + static struct ata_port_operations ahci_ceva_ops = { .inherits = &ahci_platform_ops, + .read_id = ceva_ahci_read_id, }; static const struct ata_port_info ahci_ceva_port_info = { -- cgit v1.2.3 From 05e890d8438651777cf05a19aa3c29519cd762ea Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:20 +0200 Subject: ata: ceva: Make RxWaterMark value as module parameter This patch updates the driver to make Rx Fifo water mark value as a module parameter. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index b63fab2507fa..eff40ec86065 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -71,6 +71,10 @@ #define DRV_NAME "ahci-ceva" #define CEVA_FLAG_BROKEN_GEN2 1 +static unsigned int rx_watermark = PTC_RX_WM_VAL; +module_param(rx_watermark, uint, 0644); +MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)"); + struct ceva_ahci_priv { struct platform_device *ahci_pdev; /* Port Phy2Cfg Register */ @@ -152,7 +156,7 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C); /* Rx Watermark setting */ - tmp = PTC_RX_WM_VAL | PTC_RSVD; + tmp = rx_watermark | PTC_RSVD; writel(tmp, mmio + AHCI_VEND_PTC); /* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */ -- cgit v1.2.3 From 3bc867de85b5bfb2c1ba04b509783b92360af07d Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:21 +0200 Subject: ata: ceva: Add CCI support for SATA if CCI is enabled This patch adds support for CCI in SATA controller if CCI is enabled in design. This patch will add CCI settings for SATA if "dma-coherent" dts property is added. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index eff40ec86065..ec9cfb52c6f6 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -32,6 +32,7 @@ #define AHCI_VEND_PP3C 0xB0 #define AHCI_VEND_PP4C 0xB4 #define AHCI_VEND_PP5C 0xB8 +#define AHCI_VEND_AXICC 0xBC #define AHCI_VEND_PAXIC 0xC0 #define AHCI_VEND_PTC 0xC8 @@ -41,6 +42,15 @@ #define PAXIC_MARIDD (1 << 16) #define PAXIC_OTL (0x4 << 20) +/* Register bit definitions for cache control */ +#define AXICC_ARCA_VAL (0xF << 0) +#define AXICC_ARCF_VAL (0xF << 4) +#define AXICC_ARCH_VAL (0xF << 8) +#define AXICC_ARCP_VAL (0xF << 12) +#define AXICC_AWCFD_VAL (0xF << 16) +#define AXICC_AWCD_VAL (0xF << 20) +#define AXICC_AWCF_VAL (0xF << 24) + #define PCFG_TPSS_VAL (0x32 << 16) #define PCFG_TPRS_VAL (0x2 << 12) #define PCFG_PAD_VAL 0x2 @@ -82,6 +92,9 @@ struct ceva_ahci_priv { u32 pp3c[NR_PORTS]; u32 pp4c[NR_PORTS]; u32 pp5c[NR_PORTS]; + /* Axi Cache Control Register */ + u32 axicc; + bool is_cci_enabled; int flags; }; @@ -139,6 +152,16 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i); writel(tmp, mmio + AHCI_VEND_PCFG); + /* Set AXI cache control register if CCi is enabled */ + if (cevapriv->is_cci_enabled) { + tmp = readl(mmio + AHCI_VEND_AXICC); + tmp |= AXICC_ARCA_VAL | AXICC_ARCF_VAL | + AXICC_ARCH_VAL | AXICC_ARCP_VAL | + AXICC_AWCFD_VAL | AXICC_AWCD_VAL | + AXICC_AWCF_VAL; + writel(tmp, mmio + AHCI_VEND_AXICC); + } + /* Port Phy Cfg register enables */ tmp = PPCFG_TTA | PPCFG_PSS_EN | PPCFG_ESDF_EN; writel(tmp, mmio + AHCI_VEND_PPCFG); @@ -177,6 +200,7 @@ static int ceva_ahci_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct ahci_host_priv *hpriv; struct ceva_ahci_priv *cevapriv; + enum dev_dma_attr attr; int rc; cevapriv = devm_kzalloc(dev, sizeof(*cevapriv), GFP_KERNEL); @@ -248,6 +272,13 @@ static int ceva_ahci_probe(struct platform_device *pdev) return -EINVAL; } + /* + * Check if CCI is enabled for SATA. The DEV_DMA_COHERENT is returned + * if CCI is enabled, so check for DEV_DMA_COHERENT. + */ + attr = device_get_dma_attr(dev); + cevapriv->is_cci_enabled = (attr == DEV_DMA_COHERENT); + hpriv->plat_data = cevapriv; /* CEVA specific initialization */ -- cgit v1.2.3 From 6e037fb7708653035adbcd739ac295b9744e06cf Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:22 +0200 Subject: ata: ceva: Correct the AXI bus configuration for SATA ports Previously PAXIC register was programmed before configuring PCFG register. PCFG should be programmed with the address of the port for which PAXIC should be configured for. This was not happening before, so only one port PAXIC was written correctly and the other port was having wrong value. This patch moves the PXAIC register write after configuring PCFG, doing so will correct the axi bus settings for sata port0 & port1. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index ec9cfb52c6f6..113c1f617da9 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -134,14 +134,6 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) u32 tmp; int i; - /* - * AXI Data bus width to 64 - * Set Mem Addr Read, Write ID for data transfers - * Transfer limit to 72 DWord - */ - tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; - writel(tmp, mmio + AHCI_VEND_PAXIC); - /* Set AHCI Enable */ tmp = readl(mmio + HOST_CTL); tmp |= HOST_AHCI_EN; @@ -152,6 +144,14 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i); writel(tmp, mmio + AHCI_VEND_PCFG); + /* + * AXI Data bus width to 64 + * Set Mem Addr Read, Write ID for data transfers + * Transfer limit to 72 DWord + */ + tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; + writel(tmp, mmio + AHCI_VEND_PAXIC); + /* Set AXI cache control register if CCi is enabled */ if (cevapriv->is_cci_enabled) { tmp = readl(mmio + AHCI_VEND_AXICC); -- cgit v1.2.3 From 26bf3b6658a2137cd6a88b2f14f36d3c31c7b2ee Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:23 +0200 Subject: ata: ceva: Correct the suspend and resume logic for SATA The present suspend code disables the port interrupts and stops the HBA. On resume it enables the interrupts and HBA. This works fine until the FPD power domain is not off. If FPD is off then the ceva vendor specific configurations like OOB, AXI settings are lost, they need to be re-programmed and also since SERDES is also in FPD , SATA lane phy init needs to be called again (which is not happening in the present sequence) Because of this incorrect sequence SATA fails to work on resume. This patch corrects the code to make Suspend & Resume work in normal and FPD off cases. Signed-off-by: Anurag Kumar Vulisha Reviewed-by: Shubhrajyoti Datta Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index 113c1f617da9..c0742cbe4faa 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -298,12 +298,37 @@ disable_resources: static int __maybe_unused ceva_ahci_suspend(struct device *dev) { - return ahci_platform_suspend_host(dev); + return ahci_platform_suspend(dev); } static int __maybe_unused ceva_ahci_resume(struct device *dev) { - return ahci_platform_resume_host(dev); + struct ata_host *host = dev_get_drvdata(dev); + struct ahci_host_priv *hpriv = host->private_data; + int rc; + + rc = ahci_platform_enable_resources(hpriv); + if (rc) + return rc; + + /* Configure CEVA specific config before resuming HBA */ + ahci_ceva_setup(hpriv); + + rc = ahci_platform_resume_host(dev); + if (rc) + goto disable_resources; + + /* We resumed so update PM runtime state */ + pm_runtime_disable(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + return 0; + +disable_resources: + ahci_platform_disable_resources(hpriv); + + return rc; } static SIMPLE_DEV_PM_OPS(ahci_ceva_pm_ops, ceva_ahci_suspend, ceva_ahci_resume); -- cgit v1.2.3 From f0a559aae57cb824c8178d1042c60e5975ceb2a6 Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Mon, 21 Aug 2017 13:17:24 +0200 Subject: ata: ceva: Add SMMU support for SATA IP AXI master interface in CEVA AHCI controller requires two unique Write/Read ID tags per port. This is because, ahci controller uses different AXI ID[3:0] bits for identifying non-data transfers(like reading descriptors, updating PRD tables, etc) and data transfers (like sending/receiving FIS).To make SMMU work with SATA we need to add correct SMMU stream id for SATA. SMMU stream id for SATA is determined based on the AXI ID[1:0] as shown below SATA SMMU ID = , 0011, 00, 00, AXI ID[1:0] Note: SATA in ZynqMp uses TBU1 so TBU number = 0x1, so SMMU ID = 001, 0011, 00, 00, AXI ID[1:0] Since we have four different AXI ID[3:0] (2 for port0 & 2 for port1 as said above) we get four different SMMU stream id's combinations for SATA. These AXI ID can be configured using PAXIC register. In this patch we assumed the below AXI ID values Read ID/ Write ID for Non-Data Port0 transfers = 0 Read ID/ Write ID for Data Port0 transfers = 1 Read ID/ Write ID for Non-Data Port1 transfers = 2 Read ID/ Write ID for Data Port1 transfers = 3 Based on the above values,SMMU stream ID's for SATA will be 0x4c0 & 0x4c1 for PORT0, 0x4c2 & 0x4c3 for PORT1. These values needed to be added to iommus dts property. This patch does the same. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek Signed-off-by: Tejun Heo --- drivers/ata/ahci_ceva.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c index c0742cbe4faa..5ecc9d46cb54 100644 --- a/drivers/ata/ahci_ceva.c +++ b/drivers/ata/ahci_ceva.c @@ -38,8 +38,10 @@ /* Vendor Specific Register bit definitions */ #define PAXIC_ADBW_BW64 0x1 -#define PAXIC_MAWIDD (1 << 8) -#define PAXIC_MARIDD (1 << 16) +#define PAXIC_MAWID(i) (((i) * 2) << 4) +#define PAXIC_MARID(i) (((i) * 2) << 12) +#define PAXIC_MARIDD(i) ((((i) * 2) + 1) << 16) +#define PAXIC_MAWIDD(i) ((((i) * 2) + 1) << 8) #define PAXIC_OTL (0x4 << 20) /* Register bit definitions for cache control */ @@ -147,9 +149,11 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv) /* * AXI Data bus width to 64 * Set Mem Addr Read, Write ID for data transfers + * Set Mem Addr Read ID, Write ID for non-data transfers * Transfer limit to 72 DWord */ - tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; + tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD(i) | PAXIC_MARIDD(i) | + PAXIC_MAWID(i) | PAXIC_MARID(i) | PAXIC_OTL; writel(tmp, mmio + AHCI_VEND_PAXIC); /* Set AXI cache control register if CCi is enabled */ -- cgit v1.2.3 From 9de55351eeb82106e3b70a282d86a5aa367a6d2e Mon Sep 17 00:00:00 2001 From: Arvind Yadav Date: Sat, 28 Oct 2017 23:51:47 +0530 Subject: libata: fix spelling mistake: 'ambigious' -> 'ambiguous' Trivial fix to spelling mistakes in ata_parse_force_one(). Signed-off-by: Arvind Yadav Signed-off-by: Tejun Heo --- drivers/ata/libata-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 5b1851056ec4..36ea7b59e88d 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -6908,7 +6908,7 @@ static int __init ata_parse_force_one(char **cur, return -EINVAL; } if (nr_matches > 1) { - *reason = "ambigious value"; + *reason = "ambiguous value"; return -EINVAL; } -- cgit v1.2.3 From e00b19e28c35f28332dce1af05c7ae46a80e696a Mon Sep 17 00:00:00 2001 From: Arvind Yadav Date: Mon, 30 Oct 2017 21:34:19 +0530 Subject: ata: pata_pdc2027x: Fix space before '[' error. Fix checkpatch.pl error: ERROR: space prohibited before open square bracket '['. Signed-off-by: Arvind Yadav Signed-off-by: Tejun Heo --- drivers/ata/pata_pdc2027x.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index 82bfd51692f3..ffd8d33c6e0f 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c @@ -84,7 +84,7 @@ static int pdc2027x_set_mode(struct ata_link *link, struct ata_device **r_failed */ static struct pdc2027x_pio_timing { u8 value0, value1, value2; -} pdc2027x_pio_timing_tbl [] = { +} pdc2027x_pio_timing_tbl[] = { { 0xfb, 0x2b, 0xac }, /* PIO mode 0 */ { 0x46, 0x29, 0xa4 }, /* PIO mode 1 */ { 0x23, 0x26, 0x64 }, /* PIO mode 2 */ @@ -94,7 +94,7 @@ static struct pdc2027x_pio_timing { static struct pdc2027x_mdma_timing { u8 value0, value1; -} pdc2027x_mdma_timing_tbl [] = { +} pdc2027x_mdma_timing_tbl[] = { { 0xdf, 0x5f }, /* MDMA mode 0 */ { 0x6b, 0x27 }, /* MDMA mode 1 */ { 0x69, 0x25 }, /* MDMA mode 2 */ @@ -102,7 +102,7 @@ static struct pdc2027x_mdma_timing { static struct pdc2027x_udma_timing { u8 value0, value1, value2; -} pdc2027x_udma_timing_tbl [] = { +} pdc2027x_udma_timing_tbl[] = { { 0x4a, 0x0f, 0xd5 }, /* UDMA mode 0 */ { 0x3a, 0x0a, 0xd0 }, /* UDMA mode 1 */ { 0x2a, 0x07, 0xcd }, /* UDMA mode 2 */ -- cgit v1.2.3 From f1601113ddc0339a745e702f4fb1ca37d4875e65 Mon Sep 17 00:00:00 2001 From: Rameshwar Prasad Sahu Date: Thu, 2 Nov 2017 16:31:07 +0530 Subject: ata: fixes kernel crash while tracing ata_eh_link_autopsy event When tracing ata link error event, the kernel crashes when the disk is removed due to NULL pointer access by trace_ata_eh_link_autopsy API. This occurs as the dev is NULL when the disk disappeared. This patch fixes this crash by calling trace_ata_eh_link_autopsy only if "dev" is not NULL. v2 changes: Removed direct passing "link" pointer instead of "dev" in trace API. Signed-off-by: Rameshwar Prasad Sahu Signed-off-by: Tejun Heo Fixes: 255c03d15a29 ("libata: Add tracepoints") Cc: stable@vger.kernel.org # v4.1+ --- drivers/ata/libata-eh.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index e070fe8267ff..6d45bfa6d611 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c @@ -2264,8 +2264,8 @@ static void ata_eh_link_autopsy(struct ata_link *link) if (dev->flags & ATA_DFLAG_DUBIOUS_XFER) eflags |= ATA_EFLAG_DUBIOUS_XFER; ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask); + trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask); } - trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask); DPRINTK("EXIT\n"); } -- cgit v1.2.3 From 47e46613d84d2750eb70a7ff07a03ed8ffbec5af Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 10 Nov 2017 19:59:37 +0200 Subject: ata: sata_dwc_460ex: Propagate platform device ID to DMA driver Propagate platform device ID to DMA driver to distinguish relationship between DMA and SATA instances. Signed-off-by: Andy Shevchenko Signed-off-by: Tejun Heo --- drivers/ata/sata_dwc_460ex.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index ce128d5a6ded..6af4ec3c88c3 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -248,6 +248,7 @@ static int sata_dwc_dma_init_old(struct platform_device *pdev, return -ENOMEM; hsdev->dma->dev = &pdev->dev; + hsdev->dma->id = pdev->id; /* Get SATA DMA interrupt number */ hsdev->dma->irq = irq_of_parse_and_map(np, 1); -- cgit v1.2.3 From 5bca462d2d18b1c9ec86c7985753134f06fa5cd2 Mon Sep 17 00:00:00 2001 From: Egor Starkov Date: Mon, 13 Nov 2017 10:31:01 +0000 Subject: ahci: imx: Handle increased read failures for IMX53 temperature sensor in low frequency mode. Extended testing has shown that the imx ahci driver sometimes requires more than the 100 attempts currently alotted in the driver to perform a successful temperature reading when running at minimum (throttled) CPU frequency. Debugging suggests that the read cycle can take 160 attempts (which given that the driver averages 80 readings from the ADC equates to one failure on each read). Increase the attempt limit to 200 in order to greatly reduce the likelihood of the driver failing to perform a temperature reading, especially at low CPU frequency. Signed-off-by: Egor Starkov Signed-off-by: Martyn Welch Signed-off-by: Tejun Heo --- drivers/ata/ahci_imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c index 787567e840bd..a58bcc069c54 100644 --- a/drivers/ata/ahci_imx.c +++ b/drivers/ata/ahci_imx.c @@ -230,7 +230,7 @@ static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio) { u16 adc_out_reg, read_sum; u32 index, read_attempt; - const u32 attempt_limit = 100; + const u32 attempt_limit = 200; imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio); imx_phy_reg_write(rtune_ctl_reg, mmio); -- cgit v1.2.3