From 52e3124f248e9ada990cd2aeafe250a53713c6f0 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 17 Oct 2011 17:59:54 +0900 Subject: sh: intc: Add IRQ trigger bit field check R-Mobile SoCs such as sh73a0 include PINT blocks in INTC that come with 2-bit IRQ trigger support. Add code to make sure the bit width is checked so 4-bit only modes like for instance EDGE_BOTH will fail for PINT. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- drivers/sh/intc/chip.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/sh/intc/chip.c b/drivers/sh/intc/chip.c index 33b2ed451e09..e0ada3773786 100644 --- a/drivers/sh/intc/chip.c +++ b/drivers/sh/intc/chip.c @@ -202,11 +202,16 @@ static int intc_set_type(struct irq_data *data, unsigned int type) if (!value) return -EINVAL; + value &= ~SENSE_VALID_FLAG; + ihp = intc_find_irq(d->sense, d->nr_sense, irq); if (ihp) { + /* PINT has 2-bit sense registers, should fail on EDGE_BOTH */ + if (value >= (1 << _INTC_WIDTH(ihp->handle))) + return -EINVAL; + addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0); - intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, - value & ~SENSE_VALID_FLAG); + intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value); } return 0; -- cgit v1.2.3 From c63bcc6ff135397b38cdb510c173e4a6629cede5 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 17 Oct 2011 18:01:19 +0900 Subject: sh: pfc: get_config_reg() shift clean up Clean up the f_width shift code in get_config_reg(). Reported-by: Ryusuke Sakato Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- drivers/sh/pfc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c index 75934e3ea34e..de5e3d65a6fa 100644 --- a/drivers/sh/pfc.c +++ b/drivers/sh/pfc.c @@ -217,7 +217,7 @@ static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id, if (!r_width) break; - for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) { + for (n = 0; n < (r_width / f_width) * (1 << f_width); n++) { if (config_reg->enum_ids[n] == enum_id) { *crp = config_reg; *indexp = n; -- cgit v1.2.3 From ad2a8e7ea4128af984a98537b1b9484722b6b4bb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 28 Sep 2011 16:50:58 +0900 Subject: sh: pfc: Add GPIO IRQ support Add GPIO IRQ support to the shared PFC code in drivers/sh/pfc.c The enums pointed out by a certain GPIO will be matched against a table for IRQ to enum mappings. Only the shared PFC code is updated by this patch. SoC specific changes are also needed to allow platforms to make use of this feature. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- drivers/sh/pfc.c | 27 +++++++++++++++++++++++++++ include/linux/sh_pfc.h | 11 +++++++++++ 2 files changed, 38 insertions(+) (limited to 'drivers') diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c index de5e3d65a6fa..e67fe170d8d5 100644 --- a/drivers/sh/pfc.c +++ b/drivers/sh/pfc.c @@ -577,6 +577,32 @@ static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value) sh_gpio_set_value(chip_to_pinmux(chip), offset, value); } +static int sh_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct pinmux_info *gpioc = chip_to_pinmux(chip); + pinmux_enum_t enum_id; + pinmux_enum_t *enum_ids; + int i, k, pos; + + pos = 0; + enum_id = 0; + while (1) { + pos = get_gpio_enum_id(gpioc, offset, pos, &enum_id); + if (pos <= 0 || !enum_id) + break; + + for (i = 0; i < gpioc->gpio_irq_size; i++) { + enum_ids = gpioc->gpio_irq[i].enum_ids; + for (k = 0; enum_ids[k]; k++) { + if (enum_ids[k] == enum_id) + return gpioc->gpio_irq[i].irq; + } + } + } + + return -ENOSYS; +} + int register_pinmux(struct pinmux_info *pip) { struct gpio_chip *chip = &pip->chip; @@ -592,6 +618,7 @@ int register_pinmux(struct pinmux_info *pip) chip->get = sh_gpio_get; chip->direction_output = sh_gpio_direction_output; chip->set = sh_gpio_set; + chip->to_irq = sh_gpio_to_irq; WARN_ON(pip->first_gpio != 0); /* needs testing */ diff --git a/include/linux/sh_pfc.h b/include/linux/sh_pfc.h index 12f351991701..bc8c9208f7e2 100644 --- a/include/linux/sh_pfc.h +++ b/include/linux/sh_pfc.h @@ -61,6 +61,14 @@ struct pinmux_data_reg { .reg = r, .reg_width = r_width, \ .enum_ids = (pinmux_enum_t [r_width]) \ +struct pinmux_irq { + int irq; + pinmux_enum_t *enum_ids; +}; + +#define PINMUX_IRQ(irq_nr, ids...) \ + { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \ + struct pinmux_range { pinmux_enum_t begin; pinmux_enum_t end; @@ -87,6 +95,9 @@ struct pinmux_info { pinmux_enum_t *gpio_data; unsigned int gpio_data_size; + struct pinmux_irq *gpio_irq; + unsigned int gpio_irq_size; + struct gpio_chip chip; }; -- cgit v1.2.3 From a102a0888799d389c033fe22db3f1e153390fcc5 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 4 Oct 2011 10:17:21 +0900 Subject: sh: userimask.c needs linux/stat.h This fix the problem that S_IRUSR and S_IWUSR are not solved in userimask.c. ----- CC drivers/usb/host/r8a66597-hcd.o drivers/sh/intc/userimask.c:57: error: ‘S_IRUSR’ undeclared here (not in a function) drivers/sh/intc/userimask.c:57: error: ‘S_IWUSR’ undeclared here (not in a function) CC drivers/watchdog/shwdt.o ----- Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- drivers/sh/intc/userimask.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/sh/intc/userimask.c b/drivers/sh/intc/userimask.c index e32304b66cf1..56bf9336b92b 100644 --- a/drivers/sh/intc/userimask.c +++ b/drivers/sh/intc/userimask.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "internals.h" -- cgit v1.2.3