1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C for Atmel/Microchip platforms
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
properties:
compatible:
oneOf:
- items:
- enum:
- atmel,at91rm9200-i2c
- atmel,at91sam9261-i2c
- atmel,at91sam9260-i2c
- atmel,at91sam9g20-i2c
- atmel,at91sam9g10-i2c
- atmel,at91sam9x5-i2c
- atmel,sama5d4-i2c
- atmel,sama5d2-i2c
- microchip,sam9x60-i2c
- items:
- const: microchip,sama7g5-i2c
- const: microchip,sam9x60-i2c
reg:
maxItems: 1
interrupts:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
clocks:
maxItems: 1
clock-frequency:
default: 100000
dmas:
items:
- description: TX DMA Channel Specifier
- description: RX DMA Channel Specifier
dma-names:
items:
- const: tx
- const: rx
atmel,fifo-size:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Maximum number of data the RX and TX FIFOs can store for
FIFO capable I2C controllers.
scl-gpios: true
sda-gpios: true
required:
- compatible
- reg
- interrupts
- "#address-cells"
- "#size-cells"
- clocks
allOf:
- $ref: "i2c-controller.yaml"
- if:
properties:
compatible:
contains:
enum:
- atmel,sama5d4-i2c
- atmel,sama5d2-i2c
- microchip,sam9x60-i2c
- microchip,sama7g5-i2c
then:
properties:
i2c-sda-hold-time-ns:
description:
TWD hold time
maxItems: 1
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/gpio/gpio.h>
i2c0: i2c@fff84000 {
compatible = "atmel,at91sam9g20-i2c";
reg = <0xfff84000 0x100>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clock-frequency = <400000>;
eeprom@50 {
compatible = "atmel,24c512";
reg = <0x50>;
pagesize = <128>;
};
};
i2c1: i2c@f8034600 {
compatible = "atmel,sama5d2-i2c";
reg = <0xf8034600 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
AT91_XDMAC_DT_PERID(11)>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
AT91_XDMAC_DT_PERID(12)>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx0>;
atmel,fifo-size = <16>;
i2c-sda-hold-time-ns = <336>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c0>;
pinctrl-1 = <&pinctrl_i2c0_gpio>;
sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
eeprom@54 {
compatible = "atmel,24c02";
reg = <0x54>;
pagesize = <16>;
};
};
|
