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|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
description: |
This binding represents the on-chip eFuse OTP controller found on
i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.
allOf:
- $ref: "nvmem.yaml#"
properties:
compatible:
oneOf:
- items:
- enum:
- fsl,imx6q-ocotp
- fsl,imx6sl-ocotp
- fsl,imx6sx-ocotp
- fsl,imx6ul-ocotp
- fsl,imx6ull-ocotp
- fsl,imx7d-ocotp
- fsl,imx6sll-ocotp
- fsl,imx7ulp-ocotp
- fsl,imx8mq-ocotp
- fsl,imx8mm-ocotp
- const: syscon
- items:
- enum:
- fsl,imx8mn-ocotp
# i.MX8MP not really compatible with fsl,imx8mm-ocotp, however
# the code for getting SoC revision depends on fsl,imx8mm-ocotp
# compatible.
- fsl,imx8mp-ocotp
- const: fsl,imx8mm-ocotp
- const: syscon
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
clocks:
maxItems: 1
required:
- "#address-cells"
- "#size-cells"
- compatible
- reg
patternProperties:
"^.*@[0-9a-f]+$":
type: object
properties:
reg:
maxItems: 1
description:
Offset and size in bytes within the storage device.
required:
- reg
additionalProperties: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/imx6sx-clock.h>
ocotp: efuse@21bc000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx6sx-ocotp", "syscon";
reg = <0x021bc000 0x4000>;
clocks = <&clks IMX6SX_CLK_OCOTP>;
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
tempmon_calib: calib@38 {
reg = <0x38 4>;
};
tempmon_temp_grade: temp-grade@20 {
reg = <0x20 4>;
};
};
...
|
