Documentation/devicetree/bindings/phy/renesas,rcar-gen3-pcie-phy.yaml


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/renesas,rcar-gen3-pcie-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car Generation 3 PCIe PHY

maintainers:
  - Sergei Shtylyov <sergei.shtylyov@gmail.com>

properties:
  compatible:
    const: renesas,r8a77980-pcie-phy

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  '#phy-cells':
    const: 0

required:
  - compatible
  - reg
  - clocks
  - power-domains
  - resets
  - '#phy-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
    #include <dt-bindings/power/r8a77980-sysc.h>

    pcie-phy@e65d0000 {
            compatible = "renesas,r8a77980-pcie-phy";
            reg = <0xe65d0000 0x8000>;
            #phy-cells = <0>;
            clocks = <&cpg CPG_MOD 319>;
            power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
            resets = <&cpg 319>;
    };