aboutsummaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
blob: 436f6cd9d07cdfc6cdc4dc93416329e3db7ecdad (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
NVIDIA Tegra audio complex

Required properties:
- compatible : "nvidia,tegra-audio-wm9712"
- clocks : Must contain an entry for each entry in clock-names.
  See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
  - pll_a
  - pll_a_out0
  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
  Each entry is a pair of strings, the first being the connection's sink,
  the second being the connection's source. Valid names for sources and
  sinks are the WM9712's pins, and the jacks on the board:

  WM9712 pins:

  * MONOOUT
  * HPOUTL
  * HPOUTR
  * LOUT2
  * ROUT2
  * OUT3
  * LINEINL
  * LINEINR
  * PHONE
  * PCBEEP
  * MIC1
  * MIC2
  * Mic Bias

  Board connectors:

  * Headphone
  * LineIn
  * Mic

- nvidia,ac97-controller : The phandle of the Tegra AC97 controller


Example:

sound {
	compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
		         "nvidia,tegra-audio-wm9712";
	nvidia,model = "Toradex Colibri T20";

	nvidia,audio-routing =
		"Headphone", "HPOUTL",
		"Headphone", "HPOUTR",
		"LineIn", "LINEINL",
		"LineIn", "LINEINR",
		"Mic", "MIC1";

	nvidia,ac97-controller = <&ac97>;

	clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
	clock-names = "pll_a", "pll_a_out0", "mclk";
};