aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx7-mba7.dtsi
blob: 5e6bef230dc757615ef46359ccd377392f040dc5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Device Tree Include file for TQ Systems MBa7 carrier board.
 *
 * Copyright (C) 2016 TQ Systems GmbH
 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
 *
 * Note: This file does not include nodes for all peripheral devices.
 * As device driver coverage increases additional nodes can be added.
 */

#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc1;
		/delete-property/ mmc2;
	};

	beeper {
		compatible = "gpio-beeper";
		gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
	};

	chosen {
		stdout-path = &uart6;
	};

	gpio_buttons: gpio-keys {
		compatible = "gpio-keys";

		button-0 {
			/* #SWITCH_A */
			label = "S11";
			linux,code = <KEY_1>;
			gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
		};

		button-1 {
			/* #SWITCH_B */
			label = "S12";
			linux,code = <KEY_2>;
			gpios = <&pca9555 14 GPIO_ACTIVE_LOW>;
		};

		button-2 {
			/* #SWITCH_C */
			label = "S13";
			linux,code = <KEY_3>;
			gpios = <&pca9555 15 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led1 {
			label = "led1";
			gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
		};

		led2 {
			label = "led2";
			gpios = <&pca9555 9 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	reg_sd1_vmmc: regulator-sd1-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_SD1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	reg_fec1_pwdn: regulator-fec1-pwdn {
		compatible = "regulator-fixed";
		regulator-name = "PWDN_FEC1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_fec2_pwdn: regulator-fec2-pwdn {
		compatible = "regulator-fixed";
		regulator-name = "PWDN_FEC2";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_USBOTG1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_USBOTG2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_mpcie_1v5: regulator-mpcie-1v5 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V5_MPCIE";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_mpcie_3v3: regulator-mpcie-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_MPCIE";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	reg_mba_12v0: regulator-mba-12v0 {
		compatible = "regulator-fixed";
		regulator-name = "VCC12V0_MBA7";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		gpio = <&pca9555 11 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_lvds_transmitter: regulator-lvds-transmitter {
		compatible = "regulator-fixed";
		regulator-name = "#SHTDN_LVDS";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V8_REF";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&sw2_reg>;
	};

	reg_audio_3v3: regulator-audio-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_AUDIO";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	sound {
		compatible = "fsl,imx-audio-tlv320aic32x4";
		model = "imx-audio-tlv320aic32x4";
		ssi-controller = <&sai1>;
		audio-codec = <&tlv320aic32x4>;
		audio-routing =
			"IN3_L", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"IN1_L", "Line In Jack",
			"IN1_R", "Line In Jack",
			"Line Out Jack", "LOL",
			"Line Out Jack", "LOR";
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
		   <&gpio4 2 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <1>;
	phy-supply = <&reg_fec1_pwdn>;
	phy-handle = <&ethphy1_0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy1_0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
		};
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	status = "okay";
};

&i2c1 {
	lm75: temperature-sensor@49 {
		compatible = "national,lm75";
		reg = <0x49>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	tlv320aic32x4: audio-codec@18 {
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
		clock-names = "mclk";
		ldoin-supply = <&reg_audio_3v3>;
		iov-supply = <&reg_audio_3v3>;
	};

	pca9555: gpio-expander@20 {
		compatible = "nxp,pca9555";
		reg = <0x20>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pca9555>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_mba7_1>;

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO		0x7c
			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI		0x74
			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK		0x74
			MX7D_PAD_UART1_RX_DATA__GPIO4_IO0		0x74
			MX7D_PAD_UART1_TX_DATA__GPIO4_IO1		0x74
			MX7D_PAD_UART2_RX_DATA__GPIO4_IO2		0x74
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO		0x7c
			MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI		0x74
			MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK		0x74
			MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0			0x74
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x02
			MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x00
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x71
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x71
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x71
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x71
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x71
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x71
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x79
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x79
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x79
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x79
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x79
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x79
			/* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */
			MX7D_PAD_ENET1_COL__GPIO7_IO15		0x40000070
			/* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */
			MX7D_PAD_GPIO1_IO09__GPIO1_IO9		0x40000078
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX	0x5a
			MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX	0x52
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x5a
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x52
		>;
	};

	pinctrl_hog_mba7_1: hogmba71grp {
		fsl,pins = <
			/* Limitation: WDOG2_B / WDOG2_RESET not usable */
			MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13	0x4000007c
			MX7D_PAD_ENET1_CRS__GPIO7_IO14		0x40000074
			/* #BOOT_EN */
			MX7D_PAD_UART2_TX_DATA__GPIO4_IO3	0x40000010
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x40000078
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x40000078
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SCL__I2C3_SCL		0x40000078
			MX7D_PAD_I2C3_SDA__I2C3_SDA		0x40000078
		>;
	};

	pinctrl_pca9555: pca95550grp {
		fsl,pins = <
			MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12	0x78
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX7D_PAD_SAI1_MCLK__SAI1_MCLK		0x11
			MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK	0x1c
			MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	0x1c
			MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC	0x1c

			MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK	0x1c
			MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0	0x14
			MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	0x14
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x7e
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x76
			MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS	0x76
			MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS	0x7e
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX	0x7e
			MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX	0x76
			MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS	0x76
			MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS	0x7e
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SCL__UART5_DCE_RX		0x7e
			MX7D_PAD_I2C4_SDA__UART5_DCE_TX		0x76
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA08__UART6_DCE_RX	0x7d
			MX7D_PAD_EPDC_DATA09__UART6_DCE_TX	0x75
			MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS	0x75
			MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS	0x7d
		>;
	};

	pinctrl_uart7: uart7grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA12__UART7_DCE_RX	0x7e
			MX7D_PAD_EPDC_DATA13__UART7_DCE_TX	0x76
			MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS	0x76
			/* Limitation: RTS is not connected */
			MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS	0x7e
		>;
	};

	pinctrl_usdhc1_gpio: usdhc1grp_gpio {
		fsl,pins = <
			/* WP */
			MX7D_PAD_SD1_WP__GPIO5_IO1		0x7c
			/* CD */
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x7c
			/* VSELECT */
			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5e
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5e
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5e
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5e
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5e
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5a
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5a
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5a
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5a
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5a
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x5b
			MX7D_PAD_SD1_CLK__SD1_CLK		0x57
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5b
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5b
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5b
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5b
		>;
	};
};

&iomuxc_lpsr {
	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			/* LCD_CONTRAST */
			MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT	0x50
		>;
	};

	pinctrl_usbotg1: usbotg1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC	0x5c
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x59
		>;
	};

	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x30
		>;
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
			  <&clks IMX7D_SAI1_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
	assigned-clock-rates = <0>, <36864000>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart7 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart7>;
	assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	uart-has-rtscts;
	linux,rs485-enabled-at-boot-time;
	rs485-rts-active-low;
	rs485-rx-during-tx;
	status = "okay";
};

&usbh {
	status = "okay";
};

&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;
	vbus-supply = <&reg_usb_otg1_vbus>;
	srp-disable;
	hnp-disable;
	adp-disable;
	over-current-active-low;
	dr_mode = "otg";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_sd1_vmmc>;
	bus-width = <4>;
	no-1-8-v;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	fsl,ext-reset-output;
};