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/*
* Device Tree Source for the GR-Peach board
*
* Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
* Copyright (C) 2016 Renesas Electronics
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r7s72100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
model = "GR-Peach";
compatible = "renesas,gr-peach", "renesas,r7s72100";
aliases {
serial0 = &scif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/mtdblock0";
stdout-path = "serial0:115200n8";
};
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x00a00000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
flash@18000000 {
compatible = "mtd-rom";
probe-type = "map_rom";
reg = <0x18000000 0x00800000>;
bank-width = <4>;
device-width = <1>;
#address-cells = <1>;
#size-cells = <1>;
rootfs@600000 {
label = "rootfs";
reg = <0x00600000 0x00200000>;
};
};
leds {
status = "okay";
compatible = "gpio-leds";
led1 {
gpios = <&port6 12 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
scif2_pins: serial2 {
/* P6_2 as RxD2; P6_3 as TxD2 */
pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
};
};
&extal_clk {
clock-frequency = <13333000>;
};
&usb_x1_clk {
clock-frequency = <48000000>;
};
&scif2 {
pinctrl-names = "default";
pinctrl-0 = <&scif2_pins>;
status = "okay";
};
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