aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/socfpga_arria5.dtsi
blob: 6c87b7070ca77d0379e03b214a7a0f6601973bfc (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
/*
 *  Copyright (C) 2013 Altera Corporation <www.altera.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/dts-v1/;
/include/ "socfpga.dtsi"

/ {
	soc {
		clkmgr@ffd04000 {
			clocks {
				osc1 {
					clock-frequency = <25000000>;
				};
			};
		};

		dwmmc0@ff704000 {
			num-slots = <1>;
			supports-highspeed;
			broken-cd;

			slot@0 {
				reg = <0>;
				bus-width = <4>;
			};
		};

		serial0@ffc02000 {
			clock-frequency = <100000000>;
		};

		serial1@ffc03000 {
			clock-frequency = <100000000>;
		};

		sysmgr@ffd08000 {
			cpu1-start-addr = <0xffd080c4>;
		};

		timer0@ffc08000 {
			clock-frequency = <100000000>;
		};

		timer1@ffc09000 {
			clock-frequency = <100000000>;
		};

		timer2@ffd00000 {
			clock-frequency = <25000000>;
		};

		timer3@ffd01000 {
			clock-frequency = <25000000>;
		};
	};
};