blob: c290d1ce2b037dc870ea4f897cfeb81465753720 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle Overdrive Development Board
* Note: For Seattle Rev.B0
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*/
/dts-v1/;
/include/ "amd-seattle-soc.dtsi"
/include/ "amd-seattle-cpus.dtsi"
/ {
model = "AMD Seattle (Rev.B0) Development Board (Overdrive)";
compatible = "amd,seattle-overdrive", "amd,seattle";
chosen {
stdout-path = &serial0;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
};
&ccp0 {
status = "ok";
amd,zlib-support = <1>;
};
/**
* NOTE: In Rev.B, gpio0 is reserved.
*/
&gpio1 {
status = "ok";
};
&gpio4 {
status = "ok";
};
&i2c0 {
status = "ok";
};
&i2c1 {
status = "ok";
};
&pcie0 {
status = "ok";
};
&spi0 {
status = "ok";
};
&spi1 {
status = "ok";
sdcard0: sdcard@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
voltage-ranges = <3200 3400>;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,com-mode = <0x0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
};
};
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};
|
