1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
|
/***************************************************************************/
/*
* linux/arch/m68knommu/platform/5249/config.c
*
* Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
*/
/***************************************************************************/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/param.h>
#include <linux/init.h>
#include <asm/irq.h>
#include <asm/dma.h>
#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcftimer.h>
#include <asm/mcfsim.h>
#include <asm/mcfdma.h>
/***************************************************************************/
void coldfire_tick(void);
void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
unsigned long coldfire_timer_offset(void);
void coldfire_trap_init(void);
void coldfire_reset(void);
/***************************************************************************/
/*
* DMA channel base address table.
*/
unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
MCF_MBAR + MCFDMA_BASE0,
MCF_MBAR + MCFDMA_BASE1,
MCF_MBAR + MCFDMA_BASE2,
MCF_MBAR + MCFDMA_BASE3,
};
unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
/***************************************************************************/
void mcf_autovector(unsigned int vec)
{
volatile unsigned char *mbar;
if ((vec >= 25) && (vec <= 31)) {
mbar = (volatile unsigned char *) MCF_MBAR;
vec = 0x1 << (vec - 24);
*(mbar + MCFSIM_AVR) |= vec;
mcf_setimr(mcf_getimr() & ~vec);
}
}
/***************************************************************************/
void mcf_settimericr(unsigned int timer, unsigned int level)
{
volatile unsigned char *icrp;
unsigned int icr, imr;
if (timer <= 2) {
switch (timer) {
case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
}
icrp = (volatile unsigned char *) (MCF_MBAR + icr);
*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
mcf_setimr(mcf_getimr() & ~imr);
}
}
/***************************************************************************/
int mcf_timerirqpending(int timer)
{
unsigned int imr = 0;
switch (timer) {
case 1: imr = MCFSIM_IMR_TIMER1; break;
case 2: imr = MCFSIM_IMR_TIMER2; break;
default: break;
}
return (mcf_getipr() & imr);
}
/***************************************************************************/
void config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
#if defined(CONFIG_BOOTPARAM)
strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
commandp[size-1] = 0;
#else
memset(commandp, 0, size);
#endif
mach_sched_init = coldfire_timer_init;
mach_tick = coldfire_tick;
mach_gettimeoffset = coldfire_timer_offset;
mach_trap_init = coldfire_trap_init;
mach_reset = coldfire_reset;
}
/***************************************************************************/
|
