aboutsummaryrefslogtreecommitdiff
path: root/drivers/ssb/driver_gpio.c
blob: f92e266d48f88980e546e0add7ab26205d81c127 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
/*
 * Sonics Silicon Backplane
 * GPIO driver
 *
 * Copyright 2011, Broadcom Corporation
 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/export.h>
#include <linux/ssb/ssb.h>

#include "ssb_private.h"


/**************************************************
 * Shared
 **************************************************/

static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
{
	return container_of(chip, struct ssb_bus, gpio);
}

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	if (bus->bustype == SSB_BUSTYPE_SSB)
		return irq_find_mapping(bus->irq_domain, gpio);
	else
		return -EINVAL;
}
#endif

/**************************************************
 * ChipCommon
 **************************************************/

static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
}

static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
				      int value)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
}

static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
					   unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
	return 0;
}

static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
					    unsigned gpio, int value)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
	return 0;
}

static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
	/* clear pulldown */
	ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
	/* Set pullup */
	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);

	return 0;
}

static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	/* clear pullup */
	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);

	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
}

static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);
	u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));

	ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
}

static struct irq_chip ssb_gpio_irq_chipco_chip = {
	.name		= "SSB-GPIO-CC",
	.irq_mask	= ssb_gpio_irq_chipco_mask,
	.irq_unmask	= ssb_gpio_irq_chipco_unmask,
};

static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
{
	struct ssb_bus *bus = dev_id;
	struct ssb_chipcommon *chipco = &bus->chipco;
	u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
	u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
	u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
	unsigned long irqs = (val ^ pol) & mask;
	int gpio;

	if (!irqs)
		return IRQ_NONE;

	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
		generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);

	return IRQ_HANDLED;
}

static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
{
	struct ssb_chipcommon *chipco = &bus->chipco;
	struct gpio_chip *chip = &bus->gpio;
	int gpio, hwirq, err;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return 0;

	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
						&irq_domain_simple_ops, chipco);
	if (!bus->irq_domain) {
		err = -ENODEV;
		goto err_irq_domain;
	}
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_create_mapping(bus->irq_domain, gpio);

		irq_set_chip_data(irq, bus);
		irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
					 handle_simple_irq);
	}

	hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
	err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
			  "gpio", bus);
	if (err)
		goto err_req_irq;

	ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
	chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);

	return 0;

err_req_irq:
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
err_irq_domain:
	return err;
}

static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
{
	struct ssb_chipcommon *chipco = &bus->chipco;
	struct gpio_chip *chip = &bus->gpio;
	int gpio;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return;

	chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
	free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
}
#else
static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
{
	return 0;
}

static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
{
}
#endif

static int ssb_gpio_chipco_init(struct ssb_bus *bus)
{
	struct gpio_chip *chip = &bus->gpio;
	int err;

	chip->label		= "ssb_chipco_gpio";
	chip->owner		= THIS_MODULE;
	chip->request		= ssb_gpio_chipco_request;
	chip->free		= ssb_gpio_chipco_free;
	chip->get		= ssb_gpio_chipco_get_value;
	chip->set		= ssb_gpio_chipco_set_value;
	chip->direction_input	= ssb_gpio_chipco_direction_input;
	chip->direction_output	= ssb_gpio_chipco_direction_output;
#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	chip->to_irq		= ssb_gpio_to_irq;
#endif
	chip->ngpio		= 16;
	/* There is just one SoC in one device and its GPIO addresses should be
	 * deterministic to address them more easily. The other buses could get
	 * a random base number. */
	if (bus->bustype == SSB_BUSTYPE_SSB)
		chip->base		= 0;
	else
		chip->base		= -1;

	err = ssb_gpio_irq_chipco_domain_init(bus);
	if (err)
		return err;

	err = gpiochip_add(chip);
	if (err) {
		ssb_gpio_irq_chipco_domain_exit(bus);
		return err;
	}

	return 0;
}

/**************************************************
 * EXTIF
 **************************************************/

#ifdef CONFIG_SSB_DRIVER_EXTIF

static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
}

static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
				     int value)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
}

static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
					  unsigned gpio)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
	return 0;
}

static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
					   unsigned gpio, int value)
{
	struct ssb_bus *bus = ssb_gpio_get_bus(chip);

	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
	return 0;
}

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static void ssb_gpio_irq_extif_mask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);

	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
}

static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);
	u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));

	ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
}

static struct irq_chip ssb_gpio_irq_extif_chip = {
	.name		= "SSB-GPIO-EXTIF",
	.irq_mask	= ssb_gpio_irq_extif_mask,
	.irq_unmask	= ssb_gpio_irq_extif_unmask,
};

static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
{
	struct ssb_bus *bus = dev_id;
	struct ssb_extif *extif = &bus->extif;
	u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
	u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
	u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
	unsigned long irqs = (val ^ pol) & mask;
	int gpio;

	if (!irqs)
		return IRQ_NONE;

	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
		generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	ssb_extif_gpio_polarity(extif, irqs, val & irqs);

	return IRQ_HANDLED;
}

static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
{
	struct ssb_extif *extif = &bus->extif;
	struct gpio_chip *chip = &bus->gpio;
	int gpio, hwirq, err;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return 0;

	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
						&irq_domain_simple_ops, extif);
	if (!bus->irq_domain) {
		err = -ENODEV;
		goto err_irq_domain;
	}
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_create_mapping(bus->irq_domain, gpio);

		irq_set_chip_data(irq, bus);
		irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
					 handle_simple_irq);
	}

	hwirq = ssb_mips_irq(bus->extif.dev) + 2;
	err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
			  "gpio", bus);
	if (err)
		goto err_req_irq;

	ssb_extif_gpio_intmask(&bus->extif, ~0, 0);

	return 0;

err_req_irq:
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
err_irq_domain:
	return err;
}

static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
{
	struct ssb_extif *extif = &bus->extif;
	struct gpio_chip *chip = &bus->gpio;
	int gpio;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return;

	free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
}
#else
static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
{
	return 0;
}

static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
{
}
#endif

static int ssb_gpio_extif_init(struct ssb_bus *bus)
{
	struct gpio_chip *chip = &bus->gpio;
	int err;

	chip->label		= "ssb_extif_gpio";
	chip->owner		= THIS_MODULE;
	chip->get		= ssb_gpio_extif_get_value;
	chip->set		= ssb_gpio_extif_set_value;
	chip->direction_input	= ssb_gpio_extif_direction_input;
	chip->direction_output	= ssb_gpio_extif_direction_output;
#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	chip->to_irq		= ssb_gpio_to_irq;
#endif
	chip->ngpio		= 5;
	/* There is just one SoC in one device and its GPIO addresses should be
	 * deterministic to address them more easily. The other buses could get
	 * a random base number. */
	if (bus->bustype == SSB_BUSTYPE_SSB)
		chip->base		= 0;
	else
		chip->base		= -1;

	err = ssb_gpio_irq_extif_domain_init(bus);
	if (err)
		return err;

	err = gpiochip_add(chip);
	if (err) {
		ssb_gpio_irq_extif_domain_exit(bus);
		return err;
	}

	return 0;
}

#else
static int ssb_gpio_extif_init(struct ssb_bus *bus)
{
	return -ENOTSUPP;
}
#endif

/**************************************************
 * Init
 **************************************************/

int ssb_gpio_init(struct ssb_bus *bus)
{
	if (ssb_chipco_available(&bus->chipco))
		return ssb_gpio_chipco_init(bus);
	else if (ssb_extif_available(&bus->extif))
		return ssb_gpio_extif_init(bus);
	else
		SSB_WARN_ON(1);

	return -1;
}

int ssb_gpio_unregister(struct ssb_bus *bus)
{
	if (ssb_chipco_available(&bus->chipco) ||
	    ssb_extif_available(&bus->extif)) {
		gpiochip_remove(&bus->gpio);
		return 0;
	} else {
		SSB_WARN_ON(1);
	}

	return -1;
}