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When booting as a coreboot payload, the framebuffer details are
passed from coreboot via configuration tables. We save these
information into vesa_mode_info structure for future use.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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It looks that x86 chipset always contains a host bridge at pci
b.d.f 0.0.0, so enable this for all boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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When running U-Boot bare-metal, the cbfs command is useless.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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This is useful once Andrew's PXA I2C driver gets merged.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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Add optional LCD support. Note that depending on the toolchain used
one might have to drop some other features to stay within the 0x40000
size limit.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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Add some more NOR flash details like size, bus width and lock/unlock
time outs.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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Looks like the define CONFIG_SYS_LCD_PXA_NO_L_BIAS is not used anywhere
else throughout the U-Boot sources any more. Drop it.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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Conflicts:
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig
Merged these by hand and re-ran savedefconfig on them.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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Move config for the E1000 Ethernet driver to Kconfig and tidy up affected
boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Also move the spi flash configurations to the at91-sama5_common.h.
Current at91 zImage size is about 3.3M, the old mapping is not
suitable. So update the spi flash map as following:
0x0 ~ 0x004000: at91bootstrap(16k)
0x04000 ~ 0x008000: u-boot env(16k)
0x08000 ~ 0x060000: u-boot(352k)
0x60000 ~ 0x06c000: dtb (48k)
0x6c000 ~ 0x400000: kernel (3M+592k)
In AT91Bootstrap, the U-Boot in spi flash also update to 0x8000, refer
to following commit in AT91Bootstrap:
3e91e54 Kconfig: fix spi flash address
So also update SPL's u-boot load address to 0x8000 in spi flash.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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As all sama5 nandflash env configurations are same, so move them to
at91-sama5_common.h.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
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Since sama5d3xek boards has different type of dtb blobs, so we need to detect
the cpu type in runtime.
So we add a new variable $dtb_name. if $dtb_name is not defined, we just use
at91-${board_name}.dtb
as the $dtb_name. Otherwise, we will just load the dtb with
$dtb_name.
For sama5d3xek, we will detect cpu type and make up $dtb_name in
runtime.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
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As almost all sama5 sd/mmc env configurations are same, so move them to
at91-sama5_common.h.
Also define CONFIG_ENV_VARS_UBOOT_CONFIG to have the varaible: $board_name.
Then we can use 'at91-${board_name}.dtb' as the dtb name.
TODO: since sama5d3xek has different dtb name, we need to some extra
stuff to make it work on sama5d3xek boards.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
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Bootlog:
U-Boot SPL 2015.10-rc1-00452-g96a7ed1 (Aug 17 2015 - 10:32:21)
mci: setting clock 258000 Hz, block size 512
mci: setting clock 258000 Hz, block size 512
mci: setting clock 258000 Hz, block size 512
mci: setting clock 33024000 Hz, block size 512
reading u-boot.img
reading u-boot.img
U-Boot 2015.10-rc1-00452-g96a7ed1 (Aug 17 2015 - 10:32:21 +0000)
CPU: AT91SAM9G45
Crystal frequency: 12 MHz
CPU clock : 400 MHz
Master clock : 133.333 MHz
Watchdog enabled
DRAM: 256 MiB
WARNING: Caches not enabled
MMC: mci: 0
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
mci: setting clock 33333333 Hz, block size 512
reading uboot.env
In: serial
Out: serial
Err: serial
Net: macb0
Error: macb0 address not set.
Hit any key to stop autoboot: 0
U-Boot>
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
[add 'picosam9g45_defconfig' to MAINTAINERS]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller.
This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10).
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
[remove 'new blank line at EOF']
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
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Use embedded DTB to let users use u-boot instead of u-boot-dtb.bin.
And fix SPL to use this target.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Added usb dwc3 driver support for zynqmp
this also supports the DFU and LTHOR to download
the linux images on to RAM and cen be booted from
those linux images.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable gem0 and setup phy addr for EP.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL
# if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
# endif
#else
# define OF_CONTROL 0
#endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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As we discussed a couple of times, negative CONFIG options make our
life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ...
and here is another one.
Now, there are three boards enabling OF_CONTROL on SPL:
- socfpga_arria5_defconfig
- socfpga_cyclone5_defconfig
- socfpga_socrates_defconfig
This commit adds CONFIG_SPL_OF_CONTROL for them and deletes
CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert
the logic.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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There is no case where defined(SPL_DISABLE_OF_CONTROL) is true.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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We do not want to compile the DM remove code for SPL. Currently,
we undef it in include/config_uncmd_spl.h (for C files) and in
scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly.
This commit demonstrates how we can deprecate those two files.
Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED()
in C files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The previous commit introduced a useful macro used in makefiles,
in order to reference to different variables (CONFIG_... or
CONFIG_SPL_...) depending on the build context.
Per-image config option control is a PITA in C sources, too.
Here are some macros useful in C/CPP expressions.
CONFIG_IS_ENABLED(FOO) can be used as a shorthand for
(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_FOO)) || \
(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FOO))
For example, it is useful to describe C code as follows,
#if CONFIG_IS_ENABLED(OF_CONTROL)
(device tree code)
#else
(board file code)
#endif
The ifdef conditional above is switched by CONFIG_OF_CONTROL during
the U-Boot proper building (CONFIG_SPL_BUILD is not defined), and by
CONFIG_SPL_OF_CONTROL during SPL building (CONFIG_SPL_BUILD is
defined).
The macro can be used in C context as well, so you can also write the
equivalent code as follows:
if (CONFIG_IS_ENABLED(OF_CONTROL)) {
(device tree code)
} else {
(board file code)
}
Another useful macro is CONFIG_VALUE().
CONFIG_VALUE(FOO) is expanded into CONFIG_FOO if CONFIG_SPL_BUILD is
undefined, and into CONFIG_SPL_FOO if CONFIG_SPL_BUILD is defined.
You can write as follows:
text_base = CONFIG_VALUE(TEXT_BASE);
instead of:
#ifdef CONFIG_SPL_BUILD
text_base = CONFIG_SPL_TEXT_BASE;
#else
text_base = CONFIG_TEXT_BASE;
#endif
This commit also adds slight hacking on fixdep so that it can
output a correct list of fixed dependencies.
If the fixdep finds CONFIG_IS_ENABLED(FOO) in a source file,
we want
$(wildcard include/config/foo.h)
in the U-boot proper building context, while we want
$(wildcard include/config/spl/foo.h)
in the SPL build context.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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A number of LPC32xx SLC NAND defines is dictated by controller
hardware limits and OOB layout is defined by operating system, the
definitions are common for all users. Since those macro are used
in out of NAND SLC driver code (simple NAND SPL framework), they can
not be placed into the driver, therefore move them from board config
files to arch/config.h
The change also adds OOB layout details specific to small page NAND
devices taken from Linux kernel.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
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This causes widespread breakage due to the operation of the low-level code
in crt0.S and cro0_64.S for ARM at least.
The fix is not complicated but it seems safer to revert this for now.
This reverts commit 2afddae07523f23f77acd066ad1719f53d289f98.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot mode
Also add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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This patch enabled the MVEBU PCIe support on the db-88f6820-gp A38x
eval board. It also enabled the Intel E1000 driver support and
adds the initialization of PCIe network controllers to the
board code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
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This patch enabled the MVEBU PCIe support on the db-mv784mp-gp AXP
eval board. It also enabled the Intel E1000 driver support and
adds the initialization of PCIe network controllers to the
board code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch moves CONFIG_SYS_TEXT_BASE to 0x00800000 for all Armada
XP / 38x boards in mainline U-Boot. This is done in preparation for
the ECC SDRAM scrubbing that needs to be done in the main U-Boot.
The SPL (previously bin_hdr) has already scrubbed the area:
0x0000.0000 - 0x0100.0000
In this area this main U-Boot needs to get loaded. The main U-Boot
then can scrub the remaining SDRAM area while running from this
location.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds support for multiple hostcontrollers to the ehci-marvell driver
and enables all 3 usb-hcs on the db-mv784mp-gp board.
It depends on the initial Armada XP usb support patch from Stefan.
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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This patch enabled the USB/EHCI support for the Marvell
DB-MV784MP-GP Armada XP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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Also update maintainer info.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Also update maintainer info.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: York Sun <yorksun@freescale.com>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
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