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authorChristoph Hellwig2021-02-10 10:56:38 +0100
committerThomas Bogendoerfer2021-02-13 09:51:45 +0100
commit14ac09a65e19528ca05df56f8e36a4a8d4949795 (patch)
tree87df70b91b37c256417ee8063edec8d82a635dd2 /arch/mips/pci
parent3440caf5f28c4e4a585dd5a7cead1b7c414973da (diff)
MIPS: refactor the runtime coherent vs noncoherent DMA indicators
Replace the global coherentio enum, and the hw_coherentio (fake) boolean variables with a single boolean dma_default_coherent flag. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/pci-alchemy.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 7285b5667568..54c86b40d304 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -429,9 +429,8 @@ static int alchemy_pci_probe(struct platform_device *pdev)
ctx->alchemy_pci_ctrl.io_map_base = (unsigned long)virt_io;
/* Au1500 revisions older than AD have borked coherent PCI */
- if ((alchemy_get_cputype() == ALCHEMY_CPU_AU1500) &&
- (read_c0_prid() < 0x01030202) &&
- (coherentio == IO_COHERENCE_DISABLED)) {
+ if (alchemy_get_cputype() == ALCHEMY_CPU_AU1500 &&
+ read_c0_prid() < 0x01030202 && !dma_default_coherent) {
val = __raw_readl(ctx->regs + PCI_REG_CONFIG);
val |= PCI_CONFIG_NC;
__raw_writel(val, ctx->regs + PCI_REG_CONFIG);