diff options
| author | Jiaxun Yang | 2023-04-04 10:33:49 +0100 |
|---|---|---|
| committer | Thomas Bogendoerfer | 2023-04-05 09:45:09 +0200 |
| commit | 78073b8f1ffe4085309808815746403209bfd6bc (patch) | |
| tree | 2a98d067e3e8647da1cc2342361dc5a080fb884d /arch/mips | |
| parent | 0c6ff92773a9c004c44af47b0609f67dcc97ba82 (diff) | |
MIPS: Octeon: Disable CVMSEG by default on other platforms
QEMU can't emulate CVMSEG on generic platform for now.
Just disable it by default.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cavium-octeon/Kconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index c1899f109e19..450e979ef5d9 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig @@ -14,7 +14,8 @@ config CAVIUM_CN63XXP1 config CAVIUM_OCTEON_CVMSEG_SIZE int "Number of L1 cache lines reserved for CVMSEG memory" range 0 54 - default 1 + default 0 if !CAVIUM_OCTEON_SOC + default 1 if CAVIUM_OCTEON_SOC help CVMSEG LM is a segment that accesses portions of the dcache as a local memory; the larger CVMSEG is, the smaller the cache is. |