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authorLinus Torvalds2022-03-21 13:03:00 -0700
committerLinus Torvalds2022-03-21 13:03:00 -0700
commit93287e28bcc8bcb3f23d46196845bf7c311cb8aa (patch)
tree0e571326237e05cd745c6f185e7fdefbb2608b3c /arch
parent84c2e17951feeea08a1f3a01e71f8fa82b66332a (diff)
parent411472ae5bb4ffe1404dc5f1505f07e0f04770a8 (diff)
Merge tag 'irq-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt updates from Thomas Gleixner: "Core code: - Provide generic_handle_irq_safe() which can be invoked from any context (hard interrupt or threaded). This allows to remove ugly workarounds in drivers all over the place. - Use generic_handle_irq_safe() in the affected drivers. - The usual cleanups and improvements. Interrupt chip drivers: - Support for new interrupt chips or not yet supported variants: STM32MP14, Meson GPIO, Apple M1 PMU, Apple M1 AICv2, Qualcomm MPM - Convert the Xilinx driver to generic interrupt domains - Cleanup the irq_chip::name handling - The usual cleanups and improvements all over the place" * tag 'irq-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits) irqchip: Add Qualcomm MPM controller driver dt-bindings: interrupt-controller: Add Qualcomm MPM support irqchip/apple-aic: Add support for AICv2 irqchip/apple-aic: Support multiple dies irqchip/apple-aic: Dynamically compute register offsets irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs irqchip/apple-aic: Add Fast IPI support dt-bindings: interrupt-controller: apple,aic2: New binding for AICv2 PCI: apple: Change MSI handling to handle 4-cell AIC fwspec form irqchip/apple-aic: Fix cpumask allocation for FIQs irqchip/meson-gpio: Add support for meson s4 SoCs irqchip/meson-gpio: add select trigger type callback irqchip/meson-gpio: support more than 8 channels gpio irq dt-bindings: interrupt-controller: New binding for Meson-S4 SoCs irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER staging: greybus: gpio: Use generic_handle_irq_safe(). net: usb: lan78xx: Use generic_handle_irq_safe(). mfd: ezx-pcap: Use generic_handle_irq_safe(). misc: hi6421-spmi-pmic: Use generic_handle_irq_safe(). irqchip/sifive-plic: Disable S-mode IRQs if running in M-mode ...
Diffstat (limited to 'arch')
-rw-r--r--arch/microblaze/Kconfig2
-rw-r--r--arch/microblaze/include/asm/irq.h3
-rw-r--r--arch/microblaze/kernel/irq.c16
3 files changed, 3 insertions, 18 deletions
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 59798e43cdb0..da568e981604 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -45,6 +45,8 @@ config MICROBLAZE
select SET_FS
select ZONE_DMA
select TRACE_IRQFLAGS_SUPPORT
+ select GENERIC_IRQ_MULTI_HANDLER
+ select HANDLE_DOMAIN_IRQ
# Endianness selection
choice
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index 0a28e80bbab0..cb6ab55d1d01 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -11,7 +11,4 @@
struct pt_regs;
extern void do_IRQ(struct pt_regs *regs);
-/* should be defined in each interrupt controller driver */
-extern unsigned int xintc_get_irq(void);
-
#endif /* _ASM_MICROBLAZE_IRQ_H */
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index 903dad822fad..1f8cb4c4f74f 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -20,27 +20,13 @@
#include <linux/irqchip.h>
#include <linux/of_irq.h>
-static u32 concurrent_irq;
-
void __irq_entry do_IRQ(struct pt_regs *regs)
{
- unsigned int irq;
struct pt_regs *old_regs = set_irq_regs(regs);
trace_hardirqs_off();
irq_enter();
- irq = xintc_get_irq();
-next_irq:
- BUG_ON(!irq);
- generic_handle_irq(irq);
-
- irq = xintc_get_irq();
- if (irq != -1U) {
- pr_debug("next irq: %d\n", irq);
- ++concurrent_irq;
- goto next_irq;
- }
-
+ handle_arch_irq(regs);
irq_exit();
set_irq_regs(old_regs);
trace_hardirqs_on();