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authorYang Yingliang2023-11-28 21:30:16 +0800
committerStephen Boyd2023-12-16 17:10:17 -0800
commit1004c346a2b7393fce37dd1f320555e0a0d71e3f (patch)
treef9ee8f4ae22b6d7afb8eb1cbc0c3da146d034d67 /drivers/clk
parentb85ea95d086471afb4ad062012a4d73cd328fa86 (diff)
clk: sp7021: fix return value check in sp7021_clk_probe()
devm_platform_ioremap_resource() never returns NULL pointer, it will return ERR_PTR() when it fails, so replace the check with IS_ERR(). Fixes: d54c1fd4a51e ("clk: Add Sunplus SP7021 clock driver") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20231128133016.2494699-1-yangyingliang@huawei.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk-sp7021.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/clk/clk-sp7021.c b/drivers/clk/clk-sp7021.c
index 01d3c4c7b0b2..7cb7d501d7a6 100644
--- a/drivers/clk/clk-sp7021.c
+++ b/drivers/clk/clk-sp7021.c
@@ -604,14 +604,14 @@ static int sp7021_clk_probe(struct platform_device *pdev)
int i;
clk_base = devm_platform_ioremap_resource(pdev, 0);
- if (!clk_base)
- return -ENXIO;
+ if (IS_ERR(clk_base))
+ return PTR_ERR(clk_base);
pll_base = devm_platform_ioremap_resource(pdev, 1);
- if (!pll_base)
- return -ENXIO;
+ if (IS_ERR(pll_base))
+ return PTR_ERR(pll_base);
sys_base = devm_platform_ioremap_resource(pdev, 2);
- if (!sys_base)
- return -ENXIO;
+ if (IS_ERR(sys_base))
+ return PTR_ERR(sys_base);
/* enable default clks */
for (i = 0; i < ARRAY_SIZE(sp_clken); i++)